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2 | ------------------------------------------------------------------------- | |
3 | Release Notes for Linux on Intel's IXP4xx Network Processor | |
4 | ||
5 | Maintained by Deepak Saxena <dsaxena@plexity.net> | |
6 | ------------------------------------------------------------------------- | |
7 | ||
8 | 1. Overview | |
9 | ||
10 | Intel's IXP4xx network processor is a highly integrated SOC that | |
11 | is targeted for network applications, though it has become popular | |
12 | in industrial control and other areas due to low cost and power | |
13 | consumption. The IXP4xx family currently consists of several processors | |
14 | that support different network offload functions such as encryption, | |
15 | routing, firewalling, etc. The IXP46x family is an updated version which | |
16 | supports faster speeds, new memory and flash configurations, and more | |
17 | integration such as an on-chip I2C controller. | |
18 | ||
19 | For more information on the various versions of the CPU, see: | |
20 | ||
21 | http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm | |
22 | ||
23 | Intel also made the IXCP1100 CPU for sometime which is an IXP4xx | |
24 | stripped of much of the network intelligence. | |
25 | ||
26 | 2. Linux Support | |
27 | ||
28 | Linux currently supports the following features on the IXP4xx chips: | |
29 | ||
30 | - Dual serial ports | |
31 | - PCI interface | |
32 | - Flash access (MTD/JFFS) | |
33 | - I2C through GPIO on IXP42x | |
34 | - GPIO for input/output/interrupts | |
a09e64fb | 35 | See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions. |
1da177e4 LT |
36 | - Timers (watchdog, OS) |
37 | ||
38 | The following components of the chips are not supported by Linux and | |
39 | require the use of Intel's propietary CSR softare: | |
40 | ||
41 | - USB device interface | |
42 | - Network interfaces (HSS, Utopia, NPEs, etc) | |
43 | - Network offload functionality | |
44 | ||
45 | If you need to use any of the above, you need to download Intel's | |
46 | software from: | |
47 | ||
48 | http://developer.intel.com/design/network/products/npfamily/ixp425swr1.htm | |
49 | ||
50 | DO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPIETARY | |
51 | SOFTWARE. | |
52 | ||
53 | There are several websites that provide directions/pointers on using | |
54 | Intel's software: | |
55 | ||
56 | http://ixp4xx-osdg.sourceforge.net/ | |
57 | Open Source Developer's Guide for using uClinux and the Intel libraries | |
58 | ||
59 | http://gatewaymaker.sourceforge.net/ | |
60 | Simple one page summary of building a gateway using an IXP425 and Linux | |
61 | ||
62 | http://ixp425.sourceforge.net/ | |
63 | ATM device driver for IXP425 that relies on Intel's libraries | |
64 | ||
65 | 3. Known Issues/Limitations | |
66 | ||
67 | 3a. Limited inbound PCI window | |
68 | ||
69 | The IXP4xx family allows for up to 256MB of memory but the PCI interface | |
70 | can only expose 64MB of that memory to the PCI bus. This means that if | |
71 | you are running with > 64MB, all PCI buffers outside of the accessible | |
72 | range will be bounced using the routines in arch/arm/common/dmabounce.c. | |
73 | ||
74 | 3b. Limited outbound PCI window | |
75 | ||
76 | IXP4xx provides two methods of accessing PCI memory space: | |
77 | ||
78 | 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB). | |
79 | To access PCI via this space, we simply ioremap() the BAR | |
80 | into the kernel and we can use the standard read[bwl]/write[bwl] | |
81 | macros. This is the preffered method due to speed but it | |
82 | limits the system to just 64MB of PCI memory. This can be | |
83 | problamatic if using video cards and other memory-heavy devices. | |
84 | ||
85 | 2) If > 64MB of memory space is required, the IXP4xx can be | |
86 | configured to use indirect registers to access PCI This allows | |
87 | for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. | |
fd245f00 | 88 | The disadvantage of this is that every PCI access requires |
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89 | three local register accesses plus a spinlock, but in some |
90 | cases the performance hit is acceptable. In addition, you cannot | |
91 | mmap() PCI devices in this case due to the indirect nature | |
92 | of the PCI window. | |
93 | ||
94 | By default, the direct method is used for performance reasons. If | |
95 | you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option. | |
96 | ||
97 | 3c. GPIO as Interrupts | |
98 | ||
99 | Currently the code only handles level-sensitive GPIO interrupts | |
100 | ||
101 | 4. Supported platforms | |
102 | ||
103 | ADI Engineering Coyote Gateway Reference Platform | |
104 | http://www.adiengineering.com/productsCoyote.html | |
105 | ||
106 | The ADI Coyote platform is reference design for those building | |
107 | small residential/office gateways. One NPE is connected to a 10/100 | |
108 | interface, one to 4-port 10/100 switch, and the third to and ADSL | |
109 | interface. In addition, it also supports to POTs interfaces connected | |
110 | via SLICs. Note that those are not supported by Linux ATM. Finally, | |
111 | the platform has two mini-PCI slots used for 802.11[bga] cards. | |
112 | Finally, there is an IDE port hanging off the expansion bus. | |
113 | ||
114 | Gateworks Avila Network Platform | |
115 | http://www.gateworks.com/avila_sbc.htm | |
116 | ||
117 | The Avila platform is basically and IXDP425 with the 4 PCI slots | |
118 | replaced with mini-PCI slots and a CF IDE interface hanging off | |
119 | the expansion bus. | |
120 | ||
121 | Intel IXDP425 Development Platform | |
122 | http://developer.intel.com/design/network/products/npfamily/ixdp425.htm | |
123 | ||
124 | This is Intel's standard reference platform for the IXDP425 and is | |
125 | also known as the Richfield board. It contains 4 PCI slots, 16MB | |
126 | of flash, two 10/100 ports and one ADSL port. | |
127 | ||
128 | Intel IXDP465 Development Platform | |
129 | http://developer.intel.com/design/network/products/npfamily/ixdp465.htm | |
130 | ||
131 | This is basically an IXDP425 with an IXP465 and 32M of flash instead | |
132 | of just 16. | |
133 | ||
134 | Intel IXDPG425 Development Platform | |
135 | ||
136 | This is basically and ADI Coyote board with a NEC EHCI controller | |
137 | added. One issue with this board is that the mini-PCI slots only | |
138 | have the 3.3v line connected, so you can't use a PCI to mini-PCI | |
139 | adapter with an E100 card. So to NFS root you need to use either | |
140 | the CSR or a WiFi card and a ramdisk that BOOTPs and then does | |
141 | a pivot_root to NFS. | |
142 | ||
143 | Motorola PrPMC1100 Processor Mezanine Card | |
144 | http://www.fountainsys.com/datasheet/PrPMC1100.pdf | |
145 | ||
146 | The PrPMC1100 is based on the IXCP1100 and is meant to plug into | |
147 | and IXP2400/2800 system to act as the system controller. It simply | |
148 | contains a CPU and 16MB of flash on the board and needs to be | |
149 | plugged into a carrier board to function. Currently Linux only | |
150 | supports the Motorola PrPMC carrier board for this platform. | |
151 | See https://mcg.motorola.com/us/ds/pdf/ds0144.pdf for info | |
152 | on the carrier board. | |
153 | ||
154 | 5. TODO LIST | |
155 | ||
156 | - Add support for Coyote IDE | |
157 | - Add support for edge-based GPIO interrupts | |
158 | - Add support for CF IDE on expansion bus | |
159 | ||
160 | 6. Thanks | |
161 | ||
162 | The IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc. | |
163 | ||
164 | The following people have contributed patches/comments/etc: | |
165 | ||
166 | Lennerty Buytenhek | |
167 | Lutz Jaenicke | |
168 | Justin Mayfield | |
169 | Robert E. Ranslam | |
170 | [I know I've forgotten others, please email me to be added] | |
171 | ||
172 | ------------------------------------------------------------------------- | |
173 | ||
174 | Last Update: 01/04/2005 |