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Commit | Line | Data |
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1da177e4 | 1 | TODO LIST |
dc7a12bd | 2 | ========= |
1da177e4 | 3 | |
dc7a12bd | 4 | :: |
1da177e4 | 5 | |
dc7a12bd MCC |
6 | POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power |
7 | RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power | |
8 | POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2) | |
9 | ||
10 | LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10 | |
11 | LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e | |
12 | EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent | |
13 | SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine | |
14 | COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine | |
15 | TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent | |
16 | ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine | |
17 | ACS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arccosine | |
18 | ATN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arctangent | |
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19 | |
20 | These are not implemented. They are not currently issued by the compiler, | |
21 | and are handled by routines in libc. These are not implemented by the FPA11 | |
dc7a12bd | 22 | hardware, but are handled by the floating point support code. They should |
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23 | be implemented in future versions. |
24 | ||
25 | There are a couple of ways to approach the implementation of these. One | |
dc7a12bd | 26 | method would be to use accurate table methods for these routines. I have |
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27 | a couple of papers by S. Gal from IBM's research labs in Haifa, Israel that |
28 | seem to promise extreme accuracy (in the order of 99.8%) and reasonable speed. | |
29 | These methods are used in GLIBC for some of the transcendental functions. | |
30 | ||
31 | Another approach, which I know little about is CORDIC. This stands for | |
dc7a12bd | 32 | Coordinate Rotation Digital Computer, and is a method of computing |
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33 | transcendental functions using mostly shifts and adds and a few |
34 | multiplications and divisions. The ARM excels at shifts and adds, | |
dc7a12bd | 35 | so such a method could be promising, but requires more research to |
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36 | determine if it is feasible. |
37 | ||
38 | Rounding Methods | |
dc7a12bd | 39 | ---------------- |
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40 | |
41 | The IEEE standard defines 4 rounding modes. Round to nearest is the | |
42 | default, but rounding to + or - infinity or round to zero are also allowed. | |
43 | Many architectures allow the rounding mode to be specified by modifying bits | |
44 | in a control register. Not so with the ARM FPA11 architecture. To change | |
45 | the rounding mode one must specify it with each instruction. | |
46 | ||
47 | This has made porting some benchmarks difficult. It is possible to | |
dc7a12bd MCC |
48 | introduce such a capability into the emulator. The FPCR contains |
49 | bits describing the rounding mode. The emulator could be altered to | |
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50 | examine a flag, which if set forced it to ignore the rounding mode in |
51 | the instruction, and use the mode specified in the bits in the FPCR. | |
52 | ||
53 | This would require a method of getting/setting the flag, and the bits | |
54 | in the FPCR. This requires a kernel call in ArmLinux, as WFC/RFC are | |
55 | supervisor only instructions. If anyone has any ideas or comments I | |
56 | would like to hear them. | |
57 | ||
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58 | NOTE: |
59 | pulled out from some docs on ARM floating point, specifically | |
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60 | for the Acorn FPE, but not limited to it: |
61 | ||
62 | The floating point control register (FPCR) may only be present in some | |
63 | implementations: it is there to control the hardware in an implementation- | |
64 | specific manner, for example to disable the floating point system. The user | |
65 | mode of the ARM is not permitted to use this register (since the right is | |
66 | reserved to alter it between implementations) and the WFC and RFC | |
67 | instructions will trap if tried in user mode. | |
68 | ||
69 | Hence, the answer is yes, you could do this, but then you will run a high | |
70 | risk of becoming isolated if and when hardware FP emulation comes out | |
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71 | |
72 | -- Russell. |