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1 | ============== |
2 | BPF Design Q&A | |
3 | ============== | |
4 | ||
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5 | BPF extensibility and applicability to networking, tracing, security |
6 | in the linux kernel and several user space implementations of BPF | |
7 | virtual machine led to a number of misunderstanding on what BPF actually is. | |
8 | This short QA is an attempt to address that and outline a direction | |
9 | of where BPF is heading long term. | |
10 | ||
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11 | .. contents:: |
12 | :local: | |
13 | :depth: 3 | |
14 | ||
15 | Questions and Answers | |
16 | ===================== | |
17 | ||
2e39748a | 18 | Q: Is BPF a generic instruction set similar to x64 and arm64? |
1a6ac1d5 | 19 | ------------------------------------------------------------- |
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20 | A: NO. |
21 | ||
22 | Q: Is BPF a generic virtual machine ? | |
1a6ac1d5 | 23 | ------------------------------------- |
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24 | A: NO. |
25 | ||
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26 | BPF is generic instruction set *with* C calling convention. |
27 | ----------------------------------------------------------- | |
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28 | |
29 | Q: Why C calling convention was chosen? | |
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30 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
31 | ||
2e39748a | 32 | A: Because BPF programs are designed to run in the linux kernel |
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33 | which is written in C, hence BPF defines instruction set compatible |
34 | with two most used architectures x64 and arm64 (and takes into | |
35 | consideration important quirks of other architectures) and | |
36 | defines calling convention that is compatible with C calling | |
37 | convention of the linux kernel on those architectures. | |
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38 | |
39 | Q: can multiple return values be supported in the future? | |
1a6ac1d5 | 40 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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41 | A: NO. BPF allows only register R0 to be used as return value. |
42 | ||
43 | Q: can more than 5 function arguments be supported in the future? | |
1a6ac1d5 | 44 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
2e39748a | 45 | A: NO. BPF calling convention only allows registers R1-R5 to be used |
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46 | as arguments. BPF is not a standalone instruction set. |
47 | (unlike x64 ISA that allows msft, cdecl and other conventions) | |
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48 | |
49 | Q: can BPF programs access instruction pointer or return address? | |
1a6ac1d5 | 50 | ----------------------------------------------------------------- |
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51 | A: NO. |
52 | ||
53 | Q: can BPF programs access stack pointer ? | |
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54 | ------------------------------------------ |
55 | A: NO. | |
56 | ||
57 | Only frame pointer (register R10) is accessible. | |
58 | From compiler point of view it's necessary to have stack pointer. | |
59 | For example LLVM defines register R11 as stack pointer in its | |
60 | BPF backend, but it makes sure that generated code never uses it. | |
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61 | |
62 | Q: Does C-calling convention diminishes possible use cases? | |
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63 | ----------------------------------------------------------- |
64 | A: YES. | |
65 | ||
66 | BPF design forces addition of major functionality in the form | |
67 | of kernel helper functions and kernel objects like BPF maps with | |
68 | seamless interoperability between them. It lets kernel call into | |
69 | BPF programs and programs call kernel helpers with zero overhead. | |
70 | As all of them were native C code. That is particularly the case | |
71 | for JITed BPF programs that are indistinguishable from | |
72 | native kernel C code. | |
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73 | |
74 | Q: Does it mean that 'innovative' extensions to BPF code are disallowed? | |
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75 | ------------------------------------------------------------------------ |
76 | A: Soft yes. | |
77 | ||
78 | At least for now until BPF core has support for | |
79 | bpf-to-bpf calls, indirect calls, loops, global variables, | |
80 | jump tables, read only sections and all other normal constructs | |
81 | that C code can produce. | |
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82 | |
83 | Q: Can loops be supported in a safe way? | |
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84 | ---------------------------------------- |
85 | A: It's not clear yet. | |
86 | ||
87 | BPF developers are trying to find a way to | |
88 | support bounded loops where the verifier can guarantee that | |
89 | the program terminates in less than 4096 instructions. | |
90 | ||
91 | Instruction level questions | |
92 | --------------------------- | |
93 | ||
94 | Q: LD_ABS and LD_IND instructions vs C code | |
95 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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96 | |
97 | Q: How come LD_ABS and LD_IND instruction are present in BPF whereas | |
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98 | C code cannot express them and has to use builtin intrinsics? |
99 | ||
2e39748a | 100 | A: This is artifact of compatibility with classic BPF. Modern |
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101 | networking code in BPF performs better without them. |
102 | See 'direct packet access'. | |
2e39748a | 103 | |
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104 | Q: BPF instructions mapping not one-to-one to native CPU |
105 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
2e39748a | 106 | Q: It seems not all BPF instructions are one-to-one to native CPU. |
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107 | For example why BPF_JNE and other compare and jumps are not cpu-like? |
108 | ||
2e39748a | 109 | A: This was necessary to avoid introducing flags into ISA which are |
1a6ac1d5 | 110 | impossible to make generic and efficient across CPU architectures. |
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111 | |
112 | Q: why BPF_DIV instruction doesn't map to x64 div? | |
1a6ac1d5 | 113 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
2e39748a | 114 | A: Because if we picked one-to-one relationship to x64 it would have made |
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115 | it more complicated to support on arm64 and other archs. Also it |
116 | needs div-by-zero runtime check. | |
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117 | |
118 | Q: why there is no BPF_SDIV for signed divide operation? | |
1a6ac1d5 | 119 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
2e39748a | 120 | A: Because it would be rarely used. llvm errors in such case and |
1a6ac1d5 | 121 | prints a suggestion to use unsigned divide instead |
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122 | |
123 | Q: Why BPF has implicit prologue and epilogue? | |
1a6ac1d5 | 124 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
2e39748a | 125 | A: Because architectures like sparc have register windows and in general |
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126 | there are enough subtle differences between architectures, so naive |
127 | store return address into stack won't work. Another reason is BPF has | |
128 | to be safe from division by zero (and legacy exception path | |
129 | of LD_ABS insn). Those instructions need to invoke epilogue and | |
130 | return implicitly. | |
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131 | |
132 | Q: Why BPF_JLT and BPF_JLE instructions were not introduced in the beginning? | |
1a6ac1d5 | 133 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
2e39748a | 134 | A: Because classic BPF didn't have them and BPF authors felt that compiler |
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135 | workaround would be acceptable. Turned out that programs lose performance |
136 | due to lack of these compare instructions and they were added. | |
137 | These two instructions is a perfect example what kind of new BPF | |
138 | instructions are acceptable and can be added in the future. | |
139 | These two already had equivalent instructions in native CPUs. | |
140 | New instructions that don't have one-to-one mapping to HW instructions | |
141 | will not be accepted. | |
142 | ||
143 | Q: BPF 32-bit subregister requirements | |
144 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
2e39748a | 145 | Q: BPF 32-bit subregisters have a requirement to zero upper 32-bits of BPF |
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146 | registers which makes BPF inefficient virtual machine for 32-bit |
147 | CPU architectures and 32-bit HW accelerators. Can true 32-bit registers | |
148 | be added to BPF in the future? | |
149 | ||
2e39748a | 150 | A: NO. The first thing to improve performance on 32-bit archs is to teach |
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151 | LLVM to generate code that uses 32-bit subregisters. Then second step |
152 | is to teach verifier to mark operations where zero-ing upper bits | |
153 | is unnecessary. Then JITs can take advantage of those markings and | |
154 | drastically reduce size of generated code and improve performance. | |
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155 | |
156 | Q: Does BPF have a stable ABI? | |
1a6ac1d5 | 157 | ------------------------------ |
2e39748a | 158 | A: YES. BPF instructions, arguments to BPF programs, set of helper |
1a6ac1d5 | 159 | functions and their arguments, recognized return codes are all part |
a769fa72 DB |
160 | of ABI. However there is one specific exception to tracing programs |
161 | which are using helpers like bpf_probe_read() to walk kernel internal | |
162 | data structures and compile with kernel internal headers. Both of these | |
163 | kernel internals are subject to change and can break with newer kernels | |
164 | such that the program needs to be adapted accordingly. | |
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165 | |
166 | Q: How much stack space a BPF program uses? | |
1a6ac1d5 | 167 | ------------------------------------------- |
2e39748a | 168 | A: Currently all program types are limited to 512 bytes of stack |
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169 | space, but the verifier computes the actual amount of stack used |
170 | and both interpreter and most JITed code consume necessary amount. | |
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171 | |
172 | Q: Can BPF be offloaded to HW? | |
1a6ac1d5 | 173 | ------------------------------ |
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174 | A: YES. BPF HW offload is supported by NFP driver. |
175 | ||
176 | Q: Does classic BPF interpreter still exist? | |
1a6ac1d5 | 177 | -------------------------------------------- |
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178 | A: NO. Classic BPF programs are converted into extend BPF instructions. |
179 | ||
180 | Q: Can BPF call arbitrary kernel functions? | |
1a6ac1d5 | 181 | ------------------------------------------- |
2e39748a | 182 | A: NO. BPF programs can only call a set of helper functions which |
1a6ac1d5 | 183 | is defined for every program type. |
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184 | |
185 | Q: Can BPF overwrite arbitrary kernel memory? | |
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186 | --------------------------------------------- |
187 | A: NO. | |
188 | ||
189 | Tracing bpf programs can *read* arbitrary memory with bpf_probe_read() | |
190 | and bpf_probe_read_str() helpers. Networking programs cannot read | |
191 | arbitrary memory, since they don't have access to these helpers. | |
192 | Programs can never read or write arbitrary memory directly. | |
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193 | |
194 | Q: Can BPF overwrite arbitrary user memory? | |
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195 | ------------------------------------------- |
196 | A: Sort-of. | |
197 | ||
198 | Tracing BPF programs can overwrite the user memory | |
199 | of the current task with bpf_probe_write_user(). Every time such | |
200 | program is loaded the kernel will print warning message, so | |
201 | this helper is only useful for experiments and prototypes. | |
202 | Tracing BPF programs are root only. | |
2e39748a | 203 | |
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204 | Q: bpf_trace_printk() helper warning |
205 | ------------------------------------ | |
2e39748a | 206 | Q: When bpf_trace_printk() helper is used the kernel prints nasty |
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207 | warning message. Why is that? |
208 | ||
2e39748a | 209 | A: This is done to nudge program authors into better interfaces when |
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210 | programs need to pass data to user space. Like bpf_perf_event_output() |
211 | can be used to efficiently stream data via perf ring buffer. | |
212 | BPF maps can be used for asynchronous data sharing between kernel | |
213 | and user space. bpf_trace_printk() should only be used for debugging. | |
2e39748a | 214 | |
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215 | Q: New functionality via kernel modules? |
216 | ---------------------------------------- | |
2e39748a | 217 | Q: Can BPF functionality such as new program or map types, new |
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218 | helpers, etc be added out of kernel module code? |
219 | ||
2e39748a | 220 | A: NO. |