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Commit | Line | Data |
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476b679a BC |
1 | * TI - MPU (Main Processor Unit) subsystem |
2 | ||
3 | The MPU subsystem contain one or several ARM cores | |
4 | depending of the version. | |
5 | The MPU contain CPUs, GIC, L2 cache and a local PRCM. | |
6 | ||
7 | Required properties: | |
8 | - compatible : Should be "ti,omap3-mpu" for OMAP3 | |
9 | Should be "ti,omap4-mpu" for OMAP4 | |
f1e8e381 | 10 | Should be "ti,omap5-mpu" for OMAP5 |
476b679a BC |
11 | - ti,hwmods: "mpu" |
12 | ||
13 | Examples: | |
14 | ||
f1e8e381 S |
15 | - For an OMAP5 SMP system: |
16 | ||
17 | mpu { | |
18 | compatible = "ti,omap5-mpu"; | |
19 | ti,hwmods = "mpu" | |
20 | }; | |
21 | ||
476b679a BC |
22 | - For an OMAP4 SMP system: |
23 | ||
24 | mpu { | |
25 | compatible = "ti,omap4-mpu"; | |
26 | ti,hwmods = "mpu"; | |
27 | }; | |
28 | ||
29 | ||
30 | - For an OMAP3 monocore system: | |
31 | ||
32 | mpu { | |
33 | compatible = "ti,omap3-mpu"; | |
34 | ti,hwmods = "mpu"; | |
35 | }; |