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85bf6d4e HS |
1 | Device tree bindings for i.MX Wireless External Interface Module (WEIM) |
2 | ||
3 | The term "wireless" does not imply that the WEIM is literally an interface | |
4 | without wires. It simply means that this module was originally designed for | |
5 | wireless and mobile applications that use low-power technology. | |
6 | ||
7 | The actual devices are instantiated from the child nodes of a WEIM node. | |
8 | ||
9 | Required properties: | |
10 | ||
8d9ee21e SG |
11 | - compatible: Should contain one of the following: |
12 | "fsl,imx1-weim" | |
13 | "fsl,imx27-weim" | |
14 | "fsl,imx51-weim" | |
15 | "fsl,imx50-weim" | |
16 | "fsl,imx6q-weim" | |
85bf6d4e HS |
17 | - reg: A resource specifier for the register space |
18 | (see the example below) | |
19 | - clocks: the clock, see the example below. | |
20 | - #address-cells: Must be set to 2 to allow memory address translation | |
21 | - #size-cells: Must be set to 1 to allow CS address passing | |
22 | - ranges: Must be set up to reflect the memory layout with four | |
23 | integer values for each chip-select line in use: | |
24 | ||
25 | <cs-number> 0 <physical address of mapping> <size> | |
26 | ||
8d9ee21e SG |
27 | Optional properties: |
28 | ||
29 | - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of | |
30 | devices, it should be the phandle to the system General | |
31 | Purpose Register controller that contains WEIM CS GPR | |
32 | register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] | |
33 | should be set up as one of the following 4 possible | |
34 | values depending on the CS space configuration. | |
35 | ||
36 | IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 | |
37 | --------------------------------------------- | |
38 | 05 128M 0M 0M 0M | |
39 | 033 64M 64M 0M 0M | |
40 | 0113 64M 32M 32M 0M | |
41 | 01111 32M 32M 32M 32M | |
42 | ||
43 | In case that the property is absent, the reset value or | |
44 | what bootloader sets up in IOMUXC_GPR1[11:0] will be | |
45 | used. | |
46 | ||
0008c1f3 SVA |
47 | - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of |
48 | devices, the presence of this property indicates that | |
49 | the weim bus should operate in Burst Clock Mode. | |
50 | ||
85bf6d4e HS |
51 | Timing property for child nodes. It is mandatory, not optional. |
52 | ||
3f98b6ba | 53 | - fsl,weim-cs-timing: The timing array, contains timing values for the |
4c783b01 SVA |
54 | child node. We get the CS indexes from the address |
55 | ranges in the child node's "reg" property. | |
56 | The number of registers depends on the selected chip: | |
3f98b6ba AS |
57 | For i.MX1, i.MX21 ("fsl,imx1-weim") there are two |
58 | registers: CSxU, CSxL. | |
59 | For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") | |
60 | there are three registers: CSCRxU, CSCRxL, CSCRxA. | |
61 | For i.MX50, i.MX53 ("fsl,imx50-weim"), | |
62 | i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") | |
63 | there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, | |
64 | CSxRCR2, CSxWCR1, CSxWCR2. | |
85bf6d4e HS |
65 | |
66 | Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: | |
67 | ||
48c926cd | 68 | weim: weim@21b8000 { |
85bf6d4e HS |
69 | compatible = "fsl,imx6q-weim"; |
70 | reg = <0x021b8000 0x4000>; | |
71 | clocks = <&clks 196>; | |
72 | #address-cells = <2>; | |
73 | #size-cells = <1>; | |
74 | ranges = <0 0 0x08000000 0x08000000>; | |
8d9ee21e | 75 | fsl,weim-cs-gpr = <&gpr>; |
85bf6d4e HS |
76 | |
77 | nor@0,0 { | |
78 | compatible = "cfi-flash"; | |
79 | reg = <0 0 0x02000000>; | |
80 | #address-cells = <1>; | |
81 | #size-cells = <1>; | |
82 | bank-width = <2>; | |
83 | fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 | |
84 | 0x0000c000 0x1404a38e 0x00000000>; | |
85 | }; | |
86 | }; | |
4c783b01 SVA |
87 | |
88 | Example for an imx6q-based board, a multi-chipselect device connected to WEIM: | |
89 | ||
90 | In this case, both chip select 0 and 1 will be configured with the same timing | |
91 | array values. | |
92 | ||
93 | weim: weim@21b8000 { | |
94 | compatible = "fsl,imx6q-weim"; | |
95 | reg = <0x021b8000 0x4000>; | |
96 | clocks = <&clks 196>; | |
97 | #address-cells = <2>; | |
98 | #size-cells = <1>; | |
99 | ranges = <0 0 0x08000000 0x02000000 | |
100 | 1 0 0x0a000000 0x02000000 | |
101 | 2 0 0x0c000000 0x02000000 | |
102 | 3 0 0x0e000000 0x02000000>; | |
103 | fsl,weim-cs-gpr = <&gpr>; | |
104 | ||
105 | acme@0 { | |
106 | compatible = "acme,whatever"; | |
107 | reg = <0 0 0x100>, <0 0x400000 0x800>, | |
108 | <1 0x400000 0x800>; | |
109 | fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 | |
110 | 0x00000000 0xa0000240 0x00000000>; | |
111 | }; | |
112 | }; |