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Commit | Line | Data |
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f95cad74 MR |
1 | # SPDX-License-Identifier: GPL-2.0 |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-ahb-clk.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
7 | title: Allwinner A80 AHB Clock Device Tree Bindings | |
8 | ||
9 | maintainers: | |
10 | - Chen-Yu Tsai <wens@csie.org> | |
11 | - Maxime Ripard <mripard@kernel.org> | |
12 | ||
13 | deprecated: true | |
14 | ||
15 | properties: | |
16 | "#clock-cells": | |
17 | const: 0 | |
18 | ||
19 | compatible: | |
20 | const: allwinner,sun9i-a80-ahb-clk | |
21 | ||
22 | reg: | |
23 | maxItems: 1 | |
24 | ||
25 | clocks: | |
26 | maxItems: 4 | |
27 | description: > | |
28 | The parent order must match the hardware programming order. | |
29 | ||
30 | clock-output-names: | |
31 | maxItems: 1 | |
32 | ||
33 | required: | |
34 | - "#clock-cells" | |
35 | - compatible | |
36 | - reg | |
37 | - clocks | |
38 | - clock-output-names | |
39 | ||
40 | additionalProperties: false | |
41 | ||
42 | examples: | |
43 | - | | |
44 | clk@6000060 { | |
45 | #clock-cells = <0>; | |
46 | compatible = "allwinner,sun9i-a80-ahb-clk"; | |
47 | reg = <0x06000060 0x4>; | |
48 | clocks = <>_clk>, <&pll4>, <&pll12>, <&pll12>; | |
49 | clock-output-names = "ahb0"; | |
50 | }; | |
51 | ||
52 | ... |