]>
Commit | Line | Data |
---|---|---|
0e646c52 LPC |
1 | Binding for the axi-clkgen clock generator |
2 | ||
3 | This binding uses the common clock binding[1]. | |
4 | ||
5 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt | |
6 | ||
7 | Required properties: | |
1887c3a6 | 8 | - compatible : shall be "adi,axi-clkgen-1.00.a" or "adi,axi-clkgen-2.00.a". |
0e646c52 LPC |
9 | - #clock-cells : from common clock binding; Should always be set to 0. |
10 | - reg : Address and length of the axi-clkgen register set. | |
62d1e782 LPC |
11 | - clocks : Phandle and clock specifier for the parent clock(s). This must |
12 | either reference one clock if only the first clock input is connected or two | |
13 | if both clock inputs are connected. For the later case the clock connected | |
14 | to the first input must be specified first. | |
0e646c52 LPC |
15 | |
16 | Optional properties: | |
17 | - clock-output-names : From common clock binding. | |
18 | ||
19 | Example: | |
4c9847b7 | 20 | clock@ff000000 { |
0e646c52 LPC |
21 | compatible = "adi,axi-clkgen"; |
22 | #clock-cells = <0>; | |
23 | reg = <0xff000000 0x1000>; | |
24 | clocks = <&osc 1>; | |
25 | }; |