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Commit | Line | Data |
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664c6588 CC |
1 | * Samsung Exynos3250 Clock Controller |
2 | ||
3 | The Exynos3250 clock controller generates and supplies clock to various | |
4 | controllers within the Exynos3250 SoC. | |
5 | ||
6 | Required Properties: | |
7 | ||
8 | - compatible: should be one of the following. | |
9 | - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC. | |
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10 | - "samsung,exynos3250-cmu-dmc" - controller compatible with |
11 | Exynos3250 SoC for Dynamic Memory Controller domain. | |
045ecad0 TF |
12 | - "samsung,exynos3250-cmu-isp" - ISP block clock controller compatible |
13 | with Exynos3250 SOC | |
664c6588 CC |
14 | |
15 | - reg: physical base address of the controller and length of memory mapped | |
16 | region. | |
17 | ||
18 | - #clock-cells: should be 1. | |
19 | ||
20 | Each clock is assigned an identifier and client nodes can use this identifier | |
21 | to specify the clock which they consume. | |
22 | ||
23 | All available clocks are defined as preprocessor macros in | |
24 | dt-bindings/clock/exynos3250.h header and can be used in device | |
25 | tree sources. | |
26 | ||
07ccf02b | 27 | Example 1: Examples of clock controller nodes are listed below. |
664c6588 CC |
28 | |
29 | cmu: clock-controller@10030000 { | |
30 | compatible = "samsung,exynos3250-cmu"; | |
31 | reg = <0x10030000 0x20000>; | |
32 | #clock-cells = <1>; | |
33 | }; | |
34 | ||
07ccf02b KK |
35 | cmu_dmc: clock-controller@105C0000 { |
36 | compatible = "samsung,exynos3250-cmu-dmc"; | |
37 | reg = <0x105C0000 0x2000>; | |
38 | #clock-cells = <1>; | |
39 | }; | |
40 | ||
045ecad0 TF |
41 | cmu_isp: clock-controller@10048000 { |
42 | compatible = "samsung,exynos3250-cmu-isp"; | |
43 | reg = <0x10048000 0x1000>; | |
44 | #clock-cells = <1>; | |
45 | }; | |
46 | ||
664c6588 CC |
47 | Example 2: UART controller node that consumes the clock generated by the clock |
48 | controller. Refer to the standard clock bindings for information | |
49 | about 'clocks' and 'clock-names' property. | |
50 | ||
51 | serial@13800000 { | |
52 | compatible = "samsung,exynos4210-uart"; | |
53 | reg = <0x13800000 0x100>; | |
54 | interrupts = <0 109 0>; | |
55 | clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; | |
56 | clock-names = "uart", "clk_uart_baud0"; | |
57 | }; |