[mirror_ubuntu-focal-kernel.git] / Documentation / devicetree / bindings / clock / exynos5410-clock.txt

* Samsung Exynos5410 Clock Controller

The Exynos5410 clock controller generates and supplies clock to various
controllers within the Exynos5410 SoC.

Required Properties:

- compatible: should be "samsung,exynos5410-clock"

- reg: physical base address of the controller and length of memory mapped
  region.

- #clock-cells: should be 1.

- clocks: should contain an entry specifying the root clock from external
  oscillator supplied through XXTI or XusbXTI pin.  This clock should be
  defined using standard clock bindings with "fin_pll" clock-output-name.
  That clock is being passed internally to the 9 PLLs.

All available clocks are defined as preprocessor macros in
dt-bindings/clock/exynos5410.h header and can be used in device
tree sources.

Example 1: An example of a clock controller node is listed below.

	fin_pll: xxti {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "fin_pll";
		#clock-cells = <0>;
	};

	clock: clock-controller@10010000 {
		compatible = "samsung,exynos5410-clock";
		reg = <0x10010000 0x30000>;
		#clock-cells = <1>;
		clocks = <&fin_pll>;
	};

Example 2: UART controller node that consumes the clock generated by the clock
	   controller. Refer to the standard clock bindings for information
	   about 'clocks' and 'clock-names' property.

	serial@12C20000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C00000 0x100>;
		interrupts = <0 51 0>;
		clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
		clock-names = "uart", "clk_uart_baud0";
	};
Commit	Line	Data
e7ef0b63 TD	1	* Samsung Exynos5410 Clock Controller
	2
	3	The Exynos5410 clock controller generates and supplies clock to various
	4	controllers within the Exynos5410 SoC.
	5
	6	Required Properties:
	7
	8	- compatible: should be "samsung,exynos5410-clock"
	9
	10	- reg: physical base address of the controller and length of memory mapped
	11	region.
	12
	13	- #clock-cells: should be 1.
	14
be95d2c7 SN	15	- clocks: should contain an entry specifying the root clock from external
	16	oscillator supplied through XXTI or XusbXTI pin. This clock should be
	17	defined using standard clock bindings with "fin_pll" clock-output-name.
	18	That clock is being passed internally to the 9 PLLs.
	19
e7ef0b63 TD	20	All available clocks are defined as preprocessor macros in
	21	dt-bindings/clock/exynos5410.h header and can be used in device
	22	tree sources.
	23
e7ef0b63 TD	24	Example 1: An example of a clock controller node is listed below.
e7ef0b63 TD	25
be95d2c7 SN	26	fin_pll: xxti {
	27	compatible = "fixed-clock";
	28	clock-frequency = <24000000>;
	29	clock-output-names = "fin_pll";
	30	#clock-cells = <0>;
	31	};
	32
4c9847b7	33	clock: clock-controller@10010000 {
e7ef0b63 TD	34	compatible = "samsung,exynos5410-clock";
	35	reg = <0x10010000 0x30000>;
	36	#clock-cells = <1>;
be95d2c7	37	clocks = <&fin_pll>;
e7ef0b63 TD	38	};
	39
	40	Example 2: UART controller node that consumes the clock generated by the clock
	41	controller. Refer to the standard clock bindings for information
	42	about 'clocks' and 'clock-names' property.
	43
	44	serial@12C20000 {
	45	compatible = "samsung,exynos4210-uart";
	46	reg = <0x12C00000 0x100>;
	47	interrupts = <0 51 0>;
	48	clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
	49	clock-names = "uart", "clk_uart_baud0";
	50	};