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Commit | Line | Data |
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036f29d5 ZG |
1 | * Hisilicon specific extensions to the Synopsys Designware Mobile |
2 | Storage Host Controller | |
3 | ||
4 | Read synopsys-dw-mshc.txt for more details | |
5 | ||
6 | The Synopsys designware mobile storage host controller is used to interface | |
7 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | |
8 | differences between the core Synopsys dw mshc controller properties described | |
9 | by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific | |
10 | extensions to the Synopsys Designware Mobile Storage Host Controller. | |
11 | ||
12 | Required Properties: | |
13 | ||
14 | * compatible: should be one of the following. | |
7d45778b | 15 | - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. |
c98be0c9 | 16 | - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. |
d9c7eb38 ZG |
17 | - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. |
18 | ||
19 | Optional Properties: | |
20 | - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. | |
036f29d5 | 21 | |
036f29d5 ZG |
22 | Example: |
23 | ||
24 | /* for Hi3620 */ | |
25 | ||
26 | /* SoC portion */ | |
27 | dwmmc_0: dwmmc0@fcd03000 { | |
28 | compatible = "hisilicon,hi4511-dw-mshc"; | |
29 | reg = <0xfcd03000 0x1000>; | |
30 | interrupts = <0 16 4>; | |
31 | #address-cells = <1>; | |
32 | #size-cells = <0>; | |
33 | clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; | |
34 | clock-names = "ciu", "biu"; | |
036f29d5 ZG |
35 | }; |
36 | ||
37 | /* Board portion */ | |
38 | dwmmc0@fcd03000 { | |
39 | num-slots = <1>; | |
40 | vmmc-supply = <&ldo12>; | |
41 | fifo-depth = <0x100>; | |
036f29d5 ZG |
42 | pinctrl-names = "default"; |
43 | pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; | |
c83c8737 JC |
44 | bus-width = <4>; |
45 | disable-wp; | |
46 | cd-gpios = <&gpio10 3 0>; | |
47 | cap-mmc-highspeed; | |
48 | cap-sd-highspeed; | |
036f29d5 | 49 | }; |
d9c7eb38 ZG |
50 | |
51 | /* for Hi6220 */ | |
52 | ||
53 | dwmmc_1: dwmmc1@f723e000 { | |
54 | compatible = "hisilicon,hi6220-dw-mshc"; | |
55 | num-slots = <0x1>; | |
56 | bus-width = <0x4>; | |
57 | disable-wp; | |
58 | cap-sd-highspeed; | |
59 | sd-uhs-sdr12; | |
60 | sd-uhs-sdr25; | |
61 | card-detect-delay = <200>; | |
62 | hisilicon,peripheral-syscon = <&ao_ctrl>; | |
63 | reg = <0x0 0xf723e000 0x0 0x1000>; | |
64 | interrupts = <0x0 0x49 0x4>; | |
65 | clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; | |
66 | clock-names = "ciu", "biu"; | |
67 | cd-gpios = <&gpio1 0 1>; | |
68 | pinctrl-names = "default", "idle"; | |
69 | pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; | |
70 | pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; | |
71 | vqmmc-supply = <&ldo7>; | |
72 | vmmc-supply = <&ldo10>; | |
73 | }; |