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Commit | Line | Data |
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d6a01661 JCPV |
1 | Atmel NAND flash |
2 | ||
3 | Required properties: | |
4 | - compatible : "atmel,at91rm9200-nand". | |
5 | - reg : should specify localbus address and size used for the chip, | |
a41b51a1 JW |
6 | and hardware ECC controller if available. |
7 | If the hardware ECC is PMECC, it should contain address and size for | |
8 | PMECC, PMECC Error Location controller and ROM which has lookup tables. | |
d6a01661 JCPV |
9 | - atmel,nand-addr-offset : offset for the address latch. |
10 | - atmel,nand-cmd-offset : offset for the command latch. | |
11 | - #address-cells, #size-cells : Must be present if the device has sub-nodes | |
12 | representing partitions. | |
13 | ||
14 | - gpios : specifies the gpio pins to control the NAND device. detect is an | |
15 | optional gpio and may be set to 0 if not present. | |
16 | ||
17 | Optional properties: | |
1b719265 | 18 | - atmel,nand-has-dma : boolean to support dma transfer for nand read/write. |
d6a01661 JCPV |
19 | - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. |
20 | Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", | |
21 | "soft_bch". | |
a41b51a1 JW |
22 | - atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware. |
23 | Only supported by at91sam9x5 or later sam9 product. | |
24 | - atmel,pmecc-cap : error correct capability for Programmable Multibit ECC | |
25 | Controller. Supported values are: 2, 4, 8, 12, 24. | |
26 | - atmel,pmecc-sector-size : sector size for ECC computation. Supported values | |
27 | are: 512, 1024. | |
28 | - atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM | |
29 | for different sector size. First one is for sector size 512, the next is for | |
30 | sector size 1024. | |
d6a01661 JCPV |
31 | - nand-bus-width : 8 or 16 bus width if not present 8 |
32 | - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false | |
7dc37de7 JW |
33 | - Nand Flash Controller(NFC) is a slave driver under Atmel nand flash |
34 | - Required properties: | |
35 | - compatible : "atmel,sama5d3-nfc". | |
36 | - reg : should specify the address and size used for NFC command registers, | |
37 | NFC registers and NFC Sram. NFC Sram address and size can be absent | |
38 | if don't want to use it. | |
d6a01661 JCPV |
39 | |
40 | Examples: | |
41 | nand0: nand@40000000,0 { | |
42 | compatible = "atmel,at91rm9200-nand"; | |
43 | #address-cells = <1>; | |
44 | #size-cells = <1>; | |
45 | reg = <0x40000000 0x10000000 | |
46 | 0xffffe800 0x200 | |
47 | >; | |
c16524e6 NF |
48 | atmel,nand-addr-offset = <21>; /* ale */ |
49 | atmel,nand-cmd-offset = <22>; /* cle */ | |
d6a01661 JCPV |
50 | nand-on-flash-bbt; |
51 | nand-ecc-mode = "soft"; | |
c16524e6 NF |
52 | gpios = <&pioC 13 0 /* rdy */ |
53 | &pioC 14 0 /* nce */ | |
54 | 0 /* cd */ | |
d6a01661 JCPV |
55 | >; |
56 | partition@0 { | |
57 | ... | |
58 | }; | |
59 | }; | |
a41b51a1 JW |
60 | |
61 | /* for PMECC supported chips */ | |
62 | nand0: nand@40000000 { | |
63 | compatible = "atmel,at91rm9200-nand"; | |
64 | #address-cells = <1>; | |
65 | #size-cells = <1>; | |
66 | reg = < 0x40000000 0x10000000 /* bus addr & size */ | |
67 | 0xffffe000 0x00000600 /* PMECC addr & size */ | |
68 | 0xffffe600 0x00000200 /* PMECC ERRLOC addr & size */ | |
69 | 0x00100000 0x00100000 /* ROM addr & size */ | |
70 | >; | |
71 | atmel,nand-addr-offset = <21>; /* ale */ | |
72 | atmel,nand-cmd-offset = <22>; /* cle */ | |
73 | nand-on-flash-bbt; | |
74 | nand-ecc-mode = "hw"; | |
75 | atmel,has-pmecc; /* enable PMECC */ | |
76 | atmel,pmecc-cap = <2>; | |
77 | atmel,pmecc-sector-size = <512>; | |
78 | atmel,pmecc-lookup-table-offset = <0x8000 0x10000>; | |
79 | gpios = <&pioD 5 0 /* rdy */ | |
80 | &pioD 4 0 /* nce */ | |
81 | 0 /* cd */ | |
82 | >; | |
83 | partition@0 { | |
84 | ... | |
85 | }; | |
86 | }; | |
7dc37de7 JW |
87 | |
88 | /* for NFC supported chips */ | |
89 | nand0: nand@40000000 { | |
90 | compatible = "atmel,at91rm9200-nand"; | |
91 | #address-cells = <1>; | |
92 | #size-cells = <1>; | |
93 | ranges; | |
94 | ... | |
95 | nfc@70000000 { | |
96 | compatible = "atmel,sama5d3-nfc"; | |
97 | #address-cells = <1>; | |
98 | #size-cells = <1>; | |
99 | reg = < | |
100 | 0x70000000 0x10000000 /* NFC Command Registers */ | |
101 | 0xffffc000 0x00000070 /* NFC HSMC regs */ | |
102 | 0x00200000 0x00100000 /* NFC SRAM banks */ | |
103 | >; | |
104 | }; | |
105 | }; |