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[mirror_ubuntu-jammy-kernel.git] / Documentation / devicetree / bindings / mtd / denali-nand.txt
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1* Denali NAND controller
2
3Required properties:
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4 - compatible : should be one of the following:
5 "altr,socfpga-denali-nand" - for Altera SOCFPGA
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6 "socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a)
7 "socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b)
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8 - reg : should contain registers location and length for data and reg.
9 - reg-names: Should contain the reg names "nand_data" and "denali_reg"
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10 - #address-cells: should be 1. The cell encodes the chip select connection.
11 - #size-cells : should be 0.
30f9f2fb 12 - interrupts : The interrupt number.
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13 - clocks: should contain phandle of the controller core clock, the bus
14 interface clock, and the ECC circuit clock.
15 - clock-names: should contain "nand", "nand_x", "ecc"
30f9f2fb 16
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17Sub-nodes:
18 Sub-nodes represent available NAND chips.
19
20 Required properties:
21 - reg: should contain the bank ID of the controller to which each chip
22 select is connected.
23
24 Optional properties:
a5f2246f 25 - nand-ecc-step-size: see nand-controller.yaml for details.
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26 If present, the value must be
27 512 for "altr,socfpga-denali-nand"
28 1024 for "socionext,uniphier-denali-nand-v5a"
29 1024 for "socionext,uniphier-denali-nand-v5b"
a5f2246f 30 - nand-ecc-strength: see nand-controller.yaml for details. Valid values are:
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31 8, 15 for "altr,socfpga-denali-nand"
32 8, 16, 24 for "socionext,uniphier-denali-nand-v5a"
33 8, 16 for "socionext,uniphier-denali-nand-v5b"
a5f2246f 34 - nand-ecc-maximize: see nand-controller.yaml for details
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35
36The chip nodes may optionally contain sub-nodes describing partitions of the
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37address space. See partition.txt for more detail.
38
39Examples:
40
41nand: nand@ff900000 {
42 #address-cells = <1>;
d8e8fd0e 43 #size-cells = <0>;
a56609c4 44 compatible = "altr,socfpga-denali-nand";
e8901f3a 45 reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
30f9f2fb 46 reg-names = "nand_data", "denali_reg";
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47 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
48 clock-names = "nand", "nand_x", "ecc";
30f9f2fb 49 interrupts = <0 144 4>;
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50
51 nand@0 {
52 reg = <0>;
53 }
30f9f2fb 54};