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1* Faraday Technology FTGMAC100 gigabit ethernet controller
2
3Required properties:
4- compatible: "faraday,ftgmac100"
5
6 Must also contain one of these if used as part of an Aspeed AST2400
7 or 2500 family SoC as they have some subtle tweaks to the
8 implementation:
9
10 - "aspeed,ast2400-mac"
11 - "aspeed,ast2500-mac"
6a3c52fe 12 - "aspeed,ast2600-mac"
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13
14- reg: Address and length of the register set for the device
15- interrupts: Should contain ethernet controller interrupt
16
17Optional properties:
9ce86dc4 18- phy-handle: See ethernet.txt file in the same directory.
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19- phy-mode: See ethernet.txt file in the same directory. If the property is
20 absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
21 aspeed parts. Other (unknown) parts will accept any value.
22- use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes
23 rmii (100bT) but kept as a separate property in case NC-SI grows support
24 for a gigabit link.
25- no-hw-checksum: Used to disable HW checksum support. Here for backward
26 compatibility as the driver now should have correct defaults based on
27 the SoC.
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28- clocks: In accordance with the generic clock bindings. Must describe the MAC
29 IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
30 required MAC clock must be the first cell.
31- clock-names:
32
33 - "MACCLK": The MAC IP clock
34 - "RCLK": Clock gate for the RMII RCLK
88a286f7 35
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36Optional subnodes:
37- mdio: See mdio.txt file in the same directory.
38
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39Example:
40
41 mac0: ethernet@1e660000 {
42 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
43 reg = <0x1e660000 0x180>;
44 interrupts = <2>;
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45 use-ncsi;
46 };
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47
48Example with phy-handle:
49
50 mac1: ethernet@1e680000 {
51 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
52 reg = <0x1e680000 0x180>;
53 interrupts = <2>;
54
55 phy-handle = <&phy>;
56 phy-mode = "rgmii";
57
58 mdio {
59 #address-cells = <1>;
60 #size-cells = <0>;
61
62 phy: ethernet-phy@1 {
63 compatible = "ethernet-phy-ieee802.3-c22";
64 reg = <1>;
65 };
66 };
67 };