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1 | # SPDX-License-Identifier: GPL-2.0 |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/net/mdio.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
7 | title: MDIO Bus Generic Binding | |
8 | ||
9 | maintainers: | |
10 | - Andrew Lunn <andrew@lunn.ch> | |
11 | - Florian Fainelli <f.fainelli@gmail.com> | |
12 | - Heiner Kallweit <hkallweit1@gmail.com> | |
13 | ||
14 | description: | |
15 | These are generic properties that can apply to any MDIO bus. Any | |
16 | MDIO bus must have a list of child nodes, one per device on the | |
17 | bus. These should follow the generic ethernet-phy.yaml document, or | |
18 | a device specific binding document. | |
19 | ||
20 | properties: | |
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21 | $nodename: |
22 | pattern: "^mdio(@.*)?" | |
23 | ||
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24 | "#address-cells": |
25 | const: 1 | |
26 | ||
27 | "#size-cells": | |
28 | const: 0 | |
29 | ||
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30 | reset-gpios: |
31 | maxItems: 1 | |
32 | description: | |
33 | The phandle and specifier for the GPIO that controls the RESET | |
34 | lines of all PHYs on that MDIO bus. | |
35 | ||
36 | reset-delay-us: | |
37 | description: | |
38 | RESET pulse width in microseconds. It applies to all PHY devices | |
39 | and must therefore be appropriately determined based on all PHY | |
40 | requirements (maximum value of all per-PHY RESET pulse widths). | |
41 | ||
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42 | patternProperties: |
43 | "^ethernet-phy@[0-9a-f]+$": | |
44 | type: object | |
45 | ||
46 | properties: | |
47 | reg: | |
48 | minimum: 0 | |
49 | maximum: 31 | |
50 | description: | |
51 | The ID number for the PHY. | |
52 | ||
53 | required: | |
54 | - reg | |
55 | ||
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56 | examples: |
57 | - | | |
58 | davinci_mdio: mdio@5c030000 { | |
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59 | reg = <0x5c030000 0x1000>; |
60 | #address-cells = <1>; | |
61 | #size-cells = <0>; | |
62 | ||
63 | reset-gpios = <&gpio2 5 1>; | |
64 | reset-delay-us = <2>; | |
65 | ||
66 | ethphy0: ethernet-phy@1 { | |
67 | reg = <1>; | |
68 | }; | |
69 | ||
70 | ethphy1: ethernet-phy@3 { | |
71 | reg = <3>; | |
72 | }; | |
73 | }; |