[mirror_ubuntu-jammy-kernel.git] / Documentation / devicetree / bindings / net / microchip,enc28j60.txt

* Microchip ENC28J60

This is a standalone 10 MBit ethernet controller with SPI interface.

For each device connected to a SPI bus, define a child node within
the SPI master node.

Required properties:
- compatible: Should be "microchip,enc28j60"
- reg: Specify the SPI chip select the ENC28J60 is wired to
- interrupts: Specify the interrupt index within the interrupt controller (referred
              to above in interrupt-parent) and interrupt type. The ENC28J60 natively
              generates falling edge interrupts, however, additional board logic
              might invert the signal.
- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
             see also generic and your platform specific pinctrl binding
             documentation.

Optional properties:
- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
  According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
  board designs may need to limit this value.

The MAC address will be determined using the optional properties
defined in ethernet.txt.

Example (for NXP i.MX28 with pin control stuff for GPIO irq):

        ssp2: ssp@80014000 {
                compatible = "fsl,imx28-spi";
                pinctrl-names = "default";
                pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;

                enc28j60: ethernet@0 {
                        compatible = "microchip,enc28j60";
                        pinctrl-names = "default";
                        pinctrl-0 = <&enc28j60_pins>;
                        reg = <0>;
                        interrupt-parent = <&gpio3>;
                        interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
                        spi-max-frequency = <12000000>;
                };
        };

        pinctrl@80018000 {
                enc28j60_pins: enc28j60_pins@0 {
                        reg = <0>;
                        fsl,pinmux-ids = <
                                MX28_PAD_AUART0_RTS__GPIO_3_3    /* Interrupt */
                        >;
                        fsl,drive-strength = <MXS_DRIVE_4mA>;
                        fsl,voltage = <MXS_VOLTAGE_HIGH>;
                        fsl,pull-up = <MXS_PULL_DISABLE>;
                };
        };
Commit	Line	Data
2dd355a0 MH	1	* Microchip ENC28J60
	2
	3	This is a standalone 10 MBit ethernet controller with SPI interface.
	4
	5	For each device connected to a SPI bus, define a child node within
	6	the SPI master node.
	7
	8	Required properties:
	9	- compatible: Should be "microchip,enc28j60"
	10	- reg: Specify the SPI chip select the ENC28J60 is wired to
2dd355a0 MH	11	- interrupts: Specify the interrupt index within the interrupt controller (referred
	12	to above in interrupt-parent) and interrupt type. The ENC28J60 natively
	13	generates falling edge interrupts, however, additional board logic
	14	might invert the signal.
	15	- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
	16	- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
	17	see also generic and your platform specific pinctrl binding
	18	documentation.
	19
	20	Optional properties:
	21	- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
	22	According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
	23	board designs may need to limit this value.
2dd355a0	24
687e3d55 PŠ	25	The MAC address will be determined using the optional properties
687e3d55 PŠ	26	defined in ethernet.txt.
2dd355a0 MH	27
	28	Example (for NXP i.MX28 with pin control stuff for GPIO irq):
	29
	30	ssp2: ssp@80014000 {
	31	compatible = "fsl,imx28-spi";
	32	pinctrl-names = "default";
	33	pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
2dd355a0 MH	34
	35	enc28j60: ethernet@0 {
	36	compatible = "microchip,enc28j60";
	37	pinctrl-names = "default";
	38	pinctrl-0 = <&enc28j60_pins>;
	39	reg = <0>;
	40	interrupt-parent = <&gpio3>;
	41	interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
	42	spi-max-frequency = <12000000>;
	43	};
	44	};
	45
	46	pinctrl@80018000 {
	47	enc28j60_pins: enc28j60_pins@0 {
	48	reg = <0>;
	49	fsl,pinmux-ids = <
	50	MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
	51	>;
	52	fsl,drive-strength = <MXS_DRIVE_4mA>;
	53	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	54	fsl,pull-up = <MXS_PULL_DISABLE>;
	55	};
	56	};