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Commit | Line | Data |
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7869fc6e PE |
1 | * Renesas RCar PCIe interface |
2 | ||
3 | Required properties: | |
a37b3eaf SH |
4 | compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; |
5 | "renesas,pcie-r8a7790" for the R8A7790 SoC; | |
6 | "renesas,pcie-r8a7791" for the R8A7791 SoC; | |
0cf1337e | 7 | "renesas,pcie-r8a7793" for the R8A7793 SoC; |
a37b3eaf | 8 | "renesas,pcie-r8a7795" for the R8A7795 SoC; |
8267b075 | 9 | "renesas,pcie-r8a7796" for the R8A7796 SoC; |
a37b3eaf | 10 | "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. |
49da2110 | 11 | "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device. |
a37b3eaf SH |
12 | |
13 | When compatible with the generic version, nodes must list the | |
14 | SoC-specific version corresponding to the platform first | |
15 | followed by the generic version. | |
16 | ||
7869fc6e PE |
17 | - reg: base address and length of the pcie controller registers. |
18 | - #address-cells: set to <3> | |
19 | - #size-cells: set to <2> | |
20 | - bus-range: PCI bus numbers covered | |
21 | - device_type: set to "pci" | |
22 | - ranges: ranges for the PCI memory and I/O regions. | |
23 | - dma-ranges: ranges for the inbound memory regions. | |
24 | - interrupts: two interrupt sources for MSI interrupts, followed by interrupt | |
25 | source for hardware related interrupts (e.g. link speed change). | |
26 | - #interrupt-cells: set to <1> | |
27 | - interrupt-map-mask and interrupt-map: standard PCI properties | |
28 | to define the mapping of the PCIe interface to interrupt | |
29 | numbers. | |
30 | - clocks: from common clock binding: clock specifiers for the PCIe controller | |
31 | and PCIe bus clocks. | |
32 | - clock-names: from common clock binding: should be "pcie" and "pcie_bus". | |
33 | ||
34 | Example: | |
35 | ||
36 | SoC specific DT Entry: | |
37 | ||
38 | pcie: pcie@fe000000 { | |
a37b3eaf | 39 | compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; |
7869fc6e PE |
40 | reg = <0 0xfe000000 0 0x80000>; |
41 | #address-cells = <3>; | |
42 | #size-cells = <2>; | |
43 | bus-range = <0x00 0xff>; | |
44 | device_type = "pci"; | |
45 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
46 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
47 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
48 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
49 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000 | |
50 | 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; | |
51 | interrupts = <0 116 4>, <0 117 4>, <0 118 4>; | |
52 | #interrupt-cells = <1>; | |
53 | interrupt-map-mask = <0 0 0 0>; | |
54 | interrupt-map = <0 0 0 0 &gic 0 116 4>; | |
55 | clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>; | |
56 | clock-names = "pcie", "pcie_bus"; | |
57 | status = "disabled"; | |
58 | }; |