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9b330341 ÁFR |
1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
7 | title: Broadcom BCM63268 pin controller | |
8 | ||
9 | maintainers: | |
10 | - Álvaro Fernández Rojas <noltari@gmail.com> | |
11 | - Jonas Gorski <jonas.gorski@gmail.com> | |
12 | ||
13 | description: | |
14 | Bindings for Broadcom's BCM63268 memory-mapped pin controller. | |
15 | ||
16 | properties: | |
17 | compatible: | |
18 | const: brcm,bcm63268-pinctrl | |
19 | ||
20 | reg: | |
21 | maxItems: 3 | |
22 | ||
23 | patternProperties: | |
24 | '-pins$': | |
25 | type: object | |
26 | $ref: pinmux-node.yaml# | |
27 | ||
28 | properties: | |
29 | function: | |
30 | enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5, | |
31 | hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi, | |
32 | vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data, | |
33 | nand, gpio35_alt, dectpd, vdsl_phy_override_0, | |
34 | vdsl_phy_override_1, vdsl_phy_override_2, | |
35 | vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ] | |
36 | ||
37 | pins: | |
38 | enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19, | |
39 | gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35 | |
40 | dectpd_grp, vdsl_phy_override_0_grp, | |
41 | vdsl_phy_override_1_grp, vdsl_phy_override_2_grp, | |
42 | vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ] | |
43 | ||
44 | required: | |
45 | - compatible | |
46 | - reg | |
47 | ||
48 | additionalProperties: false | |
49 | ||
50 | examples: | |
51 | - | | |
52 | pinctrl@10 { | |
53 | compatible = "brcm,bcm63268-pinctrl"; | |
54 | reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; | |
55 | ||
56 | pinctrl_serial_led: serial_led-pins { | |
57 | pinctrl_serial_led_clk: serial_led_clk-pins { | |
58 | function = "serial_led_clk"; | |
59 | pins = "gpio0"; | |
60 | }; | |
61 | ||
62 | pinctrl_serial_led_data: serial_led_data-pins { | |
63 | function = "serial_led_data"; | |
64 | pins = "gpio1"; | |
65 | }; | |
66 | }; | |
67 | ||
68 | pinctrl_hsspi_cs4: hsspi_cs4-pins { | |
69 | function = "hsspi_cs4"; | |
70 | pins = "gpio16"; | |
71 | }; | |
72 | ||
73 | pinctrl_hsspi_cs5: hsspi_cs5-pins { | |
74 | function = "hsspi_cs5"; | |
75 | pins = "gpio17"; | |
76 | }; | |
77 | ||
78 | pinctrl_hsspi_cs6: hsspi_cs6-pins { | |
79 | function = "hsspi_cs6"; | |
80 | pins = "gpio8"; | |
81 | }; | |
82 | ||
83 | pinctrl_hsspi_cs7: hsspi_cs7-pins { | |
84 | function = "hsspi_cs7"; | |
85 | pins = "gpio9"; | |
86 | }; | |
87 | ||
88 | pinctrl_adsl_spi: adsl_spi-pins { | |
89 | pinctrl_adsl_spi_miso: adsl_spi_miso-pins { | |
90 | function = "adsl_spi_miso"; | |
91 | pins = "gpio18"; | |
92 | }; | |
93 | ||
94 | pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { | |
95 | function = "adsl_spi_mosi"; | |
96 | pins = "gpio19"; | |
97 | }; | |
98 | }; | |
99 | ||
100 | pinctrl_vreq_clk: vreq_clk-pins { | |
101 | function = "vreq_clk"; | |
102 | pins = "gpio22"; | |
103 | }; | |
104 | ||
105 | pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { | |
106 | function = "pcie_clkreq_b"; | |
107 | pins = "gpio23"; | |
108 | }; | |
109 | ||
110 | pinctrl_robosw_led_clk: robosw_led_clk-pins { | |
111 | function = "robosw_led_clk"; | |
112 | pins = "gpio30"; | |
113 | }; | |
114 | ||
115 | pinctrl_robosw_led_data: robosw_led_data-pins { | |
116 | function = "robosw_led_data"; | |
117 | pins = "gpio31"; | |
118 | }; | |
119 | ||
120 | pinctrl_nand: nand-pins { | |
121 | function = "nand"; | |
122 | group = "nand_grp"; | |
123 | }; | |
124 | ||
125 | pinctrl_gpio35_alt: gpio35_alt-pins { | |
126 | function = "gpio35_alt"; | |
127 | pin = "gpio35"; | |
128 | }; | |
129 | ||
130 | pinctrl_dectpd: dectpd-pins { | |
131 | function = "dectpd"; | |
132 | group = "dectpd_grp"; | |
133 | }; | |
134 | ||
135 | pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { | |
136 | function = "vdsl_phy_override_0"; | |
137 | group = "vdsl_phy_override_0_grp"; | |
138 | }; | |
139 | ||
140 | pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { | |
141 | function = "vdsl_phy_override_1"; | |
142 | group = "vdsl_phy_override_1_grp"; | |
143 | }; | |
144 | ||
145 | pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { | |
146 | function = "vdsl_phy_override_2"; | |
147 | group = "vdsl_phy_override_2_grp"; | |
148 | }; | |
149 | ||
150 | pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { | |
151 | function = "vdsl_phy_override_3"; | |
152 | group = "vdsl_phy_override_3_grp"; | |
153 | }; | |
154 | ||
155 | pinctrl_dsl_gpio8: dsl_gpio8-pins { | |
156 | function = "dsl_gpio8"; | |
157 | group = "dsl_gpio8"; | |
158 | }; | |
159 | ||
160 | pinctrl_dsl_gpio9: dsl_gpio9-pins { | |
161 | function = "dsl_gpio9"; | |
162 | group = "dsl_gpio9"; | |
163 | }; | |
164 | }; |