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ae76f13b BG |
1 | == Amlogic Meson pinmux controller == |
2 | ||
3 | Required properties for the root node: | |
11ca8735 CC |
4 | - compatible: one of "amlogic,meson8-cbus-pinctrl" |
5 | "amlogic,meson8b-cbus-pinctrl" | |
03d9fbc3 | 6 | "amlogic,meson8m2-cbus-pinctrl" |
11ca8735 CC |
7 | "amlogic,meson8-aobus-pinctrl" |
8 | "amlogic,meson8b-aobus-pinctrl" | |
03d9fbc3 | 9 | "amlogic,meson8m2-aobus-pinctrl" |
551a626c CC |
10 | "amlogic,meson-gxbb-periphs-pinctrl" |
11 | "amlogic,meson-gxbb-aobus-pinctrl" | |
0f15f500 NA |
12 | "amlogic,meson-gxl-periphs-pinctrl" |
13 | "amlogic,meson-gxl-aobus-pinctrl" | |
f3dafaa3 XC |
14 | "amlogic,meson-axg-periphs-pinctrl" |
15 | "amlogic,meson-axg-aobus-pinctrl" | |
3cd3c83f YL |
16 | "amlogic,meson-g12a-periphs-pinctrl" |
17 | "amlogic,meson-g12a-aobus-pinctrl" | |
ae76f13b BG |
18 | - reg: address and size of registers controlling irq functionality |
19 | ||
20 | === GPIO sub-nodes === | |
21 | ||
11ca8735 CC |
22 | The GPIO bank for the controller is represented as a sub-node and it acts as a |
23 | GPIO controller. | |
ae76f13b BG |
24 | |
25 | Required properties for sub-nodes are: | |
cf892f38 JB |
26 | - reg: should contain a list of address and size, one tuple for each entry |
27 | in reg-names. | |
28 | - reg-names: an array of strings describing the "reg" entries. | |
29 | Must contain "mux" and "gpio". | |
30 | May contain "pull", "pull-enable" and "ds" when appropriate. | |
ae76f13b BG |
31 | - gpio-controller: identifies the node as a gpio controller |
32 | - #gpio-cells: must be 2 | |
33 | ||
ae76f13b BG |
34 | === Other sub-nodes === |
35 | ||
36 | Child nodes without the "gpio-controller" represent some desired | |
37 | configuration for a pin or a group. Those nodes can be pinmux nodes or | |
38 | configuration nodes. | |
39 | ||
40 | Required properties for pinmux nodes are: | |
41 | - groups: a list of pinmux groups. The list of all available groups | |
42 | depends on the SoC and can be found in driver sources. | |
43 | - function: the name of a function to activate for the specified set | |
44 | of groups. The list of all available functions depends on the SoC | |
45 | and can be found in driver sources. | |
46 | ||
47 | Required properties for configuration nodes: | |
48 | - pins: a list of pin names | |
49 | ||
50 | Configuration nodes support the generic properties "bias-disable", | |
51 | "bias-pull-up" and "bias-pull-down", described in file | |
52 | pinctrl-bindings.txt | |
53 | ||
54 | === Example === | |
55 | ||
56 | pinctrl: pinctrl@c1109880 { | |
11ca8735 | 57 | compatible = "amlogic,meson8-cbus-pinctrl"; |
ae76f13b BG |
58 | reg = <0xc1109880 0x10>; |
59 | #address-cells = <1>; | |
60 | #size-cells = <1>; | |
61 | ranges; | |
62 | ||
63 | gpio: banks@c11080b0 { | |
64 | reg = <0xc11080b0 0x28>, | |
65 | <0xc11080e8 0x18>, | |
66 | <0xc1108120 0x18>, | |
67 | <0xc1108030 0x30>; | |
68 | reg-names = "mux", "pull", "pull-enable", "gpio"; | |
69 | gpio-controller; | |
70 | #gpio-cells = <2>; | |
71 | }; | |
72 | ||
ae76f13b BG |
73 | nand { |
74 | mux { | |
75 | groups = "nand_io", "nand_io_ce0", "nand_io_ce1", | |
76 | "nand_io_rb0", "nand_ale", "nand_cle", | |
77 | "nand_wen_clk", "nand_ren_clk", "nand_dqs", | |
78 | "nand_ce2", "nand_ce3"; | |
79 | function = "nand"; | |
80 | }; | |
81 | }; | |
ae76f13b | 82 | }; |