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Commit | Line | Data |
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7d29ed88 | 1 | ====================== |
5f714700 | 2 | Aspeed Pin Controllers |
7d29ed88 | 3 | ====================== |
5f714700 AJ |
4 | |
5 | The Aspeed SoCs vary in functionality inside a generation but have a common mux | |
6 | device register layout. | |
7 | ||
7d29ed88 AJ |
8 | Required properties for g4: |
9 | - compatible : Should be one of the following: | |
10 | "aspeed,ast2400-pinctrl" | |
11 | "aspeed,g4-pinctrl" | |
12 | ||
13 | Required properties for g5: | |
14 | - compatible : Should be one of the following: | |
15 | "aspeed,ast2500-pinctrl" | |
16 | "aspeed,g5-pinctrl" | |
17 | ||
18 | - aspeed,external-nodes: A cell of phandles to external controller nodes: | |
19 | 0: compatible with "aspeed,ast2500-gfx", "syscon" | |
20 | 1: compatible with "aspeed,ast2500-lhc", "syscon" | |
5f714700 | 21 | |
c95b0fec | 22 | The pin controller node should be the child of a syscon node with the required |
5f714700 | 23 | property: |
c95b0fec AJ |
24 | |
25 | - compatible : Should be one of the following: | |
26 | "aspeed,ast2400-scu", "syscon", "simple-mfd" | |
27 | "aspeed,g4-scu", "syscon", "simple-mfd" | |
28 | "aspeed,ast2500-scu", "syscon", "simple-mfd" | |
29 | "aspeed,g5-scu", "syscon", "simple-mfd" | |
5f714700 AJ |
30 | |
31 | Refer to the the bindings described in | |
32 | Documentation/devicetree/bindings/mfd/syscon.txt | |
33 | ||
34 | Subnode Format | |
7d29ed88 | 35 | ============== |
5f714700 AJ |
36 | |
37 | The required properties of child nodes are (as defined in pinctrl-bindings): | |
38 | - function | |
39 | - groups | |
40 | ||
41 | Each function has only one associated pin group. Each group is named by its | |
42 | function. The following values for the function and groups properties are | |
43 | supported: | |
44 | ||
45 | aspeed,ast2400-pinctrl, aspeed,g4-pinctrl: | |
46 | ||
47 | ACPI BMCINT DDCCLK DDCDAT FLACK FLBUSY FLWP GPID0 GPIE0 GPIE2 GPIE4 GPIE6 I2C10 | |
48 | I2C11 I2C12 I2C13 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8 I2C9 LPCPD LPCPME LPCSMI MDIO1 | |
49 | MDIO2 NCTS1 NCTS3 NCTS4 NDCD1 NDCD3 NDCD4 NDSR1 NDSR3 NDTR1 NDTR3 NRI1 NRI3 | |
50 | NRI4 NRTS1 NRTS3 PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 RGMII1 RMII1 ROM16 | |
51 | ROM8 ROMCS1 ROMCS2 ROMCS3 ROMCS4 RXD1 RXD3 RXD4 SD1 SGPMI SIOPBI SIOPBO TIMER3 | |
52 | TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD3 TXD4 UART6 VGAHS VGAVS VPI18 VPI24 VPI30 | |
53 | VPO12 VPO24 | |
54 | ||
55 | aspeed,ast2500-pinctrl, aspeed,g5-pinctrl: | |
56 | ||
57 | GPID0 GPID2 GPIE0 I2C10 I2C11 I2C12 I2C13 I2C14 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8 | |
58 | I2C9 MAC1LINK MDIO1 MDIO2 OSCCLK PEWAKE PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 | |
8eb37aff AJ |
59 | RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 SPI1DEBUG SPI1PASSTHRU TIMER4 TIMER5 TIMER6 |
60 | TIMER7 TIMER8 VGABIOSROM | |
61 | ||
7d29ed88 AJ |
62 | Examples |
63 | ======== | |
5f714700 | 64 | |
7d29ed88 AJ |
65 | g4 Example |
66 | ---------- | |
5f714700 AJ |
67 | |
68 | syscon: scu@1e6e2000 { | |
c95b0fec | 69 | compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; |
5f714700 AJ |
70 | reg = <0x1e6e2000 0x1a8>; |
71 | ||
72 | pinctrl: pinctrl { | |
73 | compatible = "aspeed,g4-pinctrl"; | |
74 | ||
75 | pinctrl_i2c3_default: i2c3_default { | |
76 | function = "I2C3"; | |
77 | groups = "I2C3"; | |
78 | }; | |
79 | }; | |
80 | }; | |
81 | ||
7d29ed88 AJ |
82 | g5 Example |
83 | ---------- | |
84 | ||
85 | ahb { | |
86 | apb { | |
87 | syscon: scu@1e6e2000 { | |
88 | compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; | |
89 | reg = <0x1e6e2000 0x1a8>; | |
90 | ||
91 | pinctrl: pinctrl { | |
92 | compatible = "aspeed,g5-pinctrl"; | |
93 | aspeed,external-nodes = <&gfx &lhc>; | |
94 | ||
95 | pinctrl_i2c3_default: i2c3_default { | |
96 | function = "I2C3"; | |
97 | groups = "I2C3"; | |
98 | }; | |
99 | }; | |
100 | }; | |
101 | ||
102 | gfx: display@1e6e6000 { | |
103 | compatible = "aspeed,ast2500-gfx", "syscon"; | |
104 | reg = <0x1e6e6000 0x1000>; | |
105 | }; | |
106 | }; | |
107 | ||
108 | lpc: lpc@1e789000 { | |
109 | compatible = "aspeed,ast2500-lpc", "simple-mfd"; | |
110 | reg = <0x1e789000 0x1000>; | |
111 | ||
112 | #address-cells = <1>; | |
113 | #size-cells = <1>; | |
114 | ranges = <0x0 0x1e789000 0x1000>; | |
115 | ||
116 | lpc_host: lpc-host@80 { | |
117 | compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; | |
118 | reg = <0x80 0x1e0>; | |
119 | reg-io-width = <4>; | |
120 | ||
121 | #address-cells = <1>; | |
122 | #size-cells = <1>; | |
123 | ranges = <0x0 0x80 0x1e0>; | |
124 | ||
125 | lhc: lhc@20 { | |
126 | compatible = "aspeed,ast2500-lhc"; | |
127 | reg = <0x20 0x24 0x48 0x8>; | |
128 | }; | |
129 | }; | |
130 | }; | |
131 | }; | |
132 | ||
5f714700 AJ |
133 | Please refer to pinctrl-bindings.txt in this directory for details of the |
134 | common pinctrl bindings used by client devices. |