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Commit | Line | Data |
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d1b49b68 JP |
1 | Qualcomm MSM8996 TLMM block |
2 | ||
3 | This binding describes the Top Level Mode Multiplexer block found in the | |
4 | MSM8996 platform. | |
5 | ||
6 | - compatible: | |
7 | Usage: required | |
8 | Value type: <string> | |
9 | Definition: must be "qcom,msm8996-pinctrl" | |
10 | ||
11 | - reg: | |
12 | Usage: required | |
13 | Value type: <prop-encoded-array> | |
14 | Definition: the base address and size of the TLMM register space. | |
15 | ||
16 | - interrupts: | |
17 | Usage: required | |
18 | Value type: <prop-encoded-array> | |
19 | Definition: should specify the TLMM summary IRQ. | |
20 | ||
21 | - interrupt-controller: | |
22 | Usage: required | |
23 | Value type: <none> | |
24 | Definition: identifies this node as an interrupt controller | |
25 | ||
26 | - #interrupt-cells: | |
27 | Usage: required | |
28 | Value type: <u32> | |
29 | Definition: must be 2. Specifying the pin number and flags, as defined | |
30 | in <dt-bindings/interrupt-controller/irq.h> | |
31 | ||
32 | - gpio-controller: | |
33 | Usage: required | |
34 | Value type: <none> | |
35 | Definition: identifies this node as a gpio controller | |
36 | ||
37 | - #gpio-cells: | |
38 | Usage: required | |
39 | Value type: <u32> | |
40 | Definition: must be 2. Specifying the pin number and flags, as defined | |
41 | in <dt-bindings/gpio/gpio.h> | |
42 | ||
43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | |
44 | a general description of GPIO and interrupt bindings. | |
45 | ||
46 | Please refer to pinctrl-bindings.txt in this directory for details of the | |
47 | common pinctrl bindings used by client devices, including the meaning of the | |
48 | phrase "pin configuration node". | |
49 | ||
50 | The pin configuration nodes act as a container for an arbitrary number of | |
51 | subnodes. Each of these subnodes represents some desired configuration for a | |
52 | pin, a group, or a list of pins or groups. This configuration can include the | |
53 | mux function to select on those pin(s)/group(s), and various pin configuration | |
54 | parameters, such as pull-up, drive strength, etc. | |
55 | ||
56 | ||
57 | PIN CONFIGURATION NODES: | |
58 | ||
59 | The name of each subnode is not important; all subnodes should be enumerated | |
60 | and processed purely based on their content. | |
61 | ||
62 | Each subnode only affects those parameters that are explicitly listed. In | |
63 | other words, a subnode that lists a mux function but no pin configuration | |
64 | parameters implies no information about any pin configuration parameters. | |
65 | Similarly, a pin subnode that describes a pullup parameter implies no | |
66 | information about e.g. the mux function. | |
67 | ||
68 | ||
69 | The following generic properties as defined in pinctrl-bindings.txt are valid | |
70 | to specify in a pin configuration subnode: | |
71 | ||
72 | - pins: | |
73 | Usage: required | |
74 | Value type: <string-array> | |
75 | Definition: List of gpio pins affected by the properties specified in | |
76 | this subnode. | |
77 | ||
78 | Valid pins are: | |
79 | gpio0-gpio149 | |
80 | Supports mux, bias and drive-strength | |
81 | ||
82 | sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, | |
83 | sdc2_data sdc1_rclk | |
84 | Supports bias and drive-strength | |
85 | ||
86 | - function: | |
87 | Usage: required | |
88 | Value type: <string> | |
89 | Definition: Specify the alternative function to be configured for the | |
90 | specified pins. Functions are only valid for gpio pins. | |
91 | Valid values are: | |
92 | ||
93 | blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, | |
94 | bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, | |
95 | qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, | |
96 | dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, | |
97 | blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, | |
98 | mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, | |
99 | atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, | |
100 | cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, | |
101 | pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, | |
102 | qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, | |
103 | qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5, | |
104 | atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6, | |
105 | atest_usb20, atest_char0, dac_calib10, qdss_stm10, | |
106 | qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6, | |
107 | blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11, | |
108 | qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1, | |
109 | qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11, | |
110 | dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6, | |
111 | qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14, | |
112 | dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, | |
113 | dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, | |
114 | dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0, | |
115 | dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25, | |
116 | sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, | |
117 | qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, | |
118 | uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9, | |
119 | blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7, | |
120 | qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11, | |
121 | blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0, | |
122 | cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4, | |
123 | blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4, | |
124 | qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus, | |
125 | isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s, | |
126 | qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b, | |
127 | sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b, | |
128 | gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12, | |
129 | qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29, | |
130 | tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, | |
131 | qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, | |
132 | sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b, | |
133 | sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b, | |
134 | ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b, | |
135 | blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt, | |
136 | pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11, | |
137 | qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, | |
138 | qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3, | |
139 | gpio | |
140 | ||
141 | - bias-disable: | |
142 | Usage: optional | |
143 | Value type: <none> | |
144 | Definition: The specified pins should be configued as no pull. | |
145 | ||
146 | - bias-pull-down: | |
147 | Usage: optional | |
148 | Value type: <none> | |
149 | Definition: The specified pins should be configued as pull down. | |
150 | ||
151 | - bias-pull-up: | |
152 | Usage: optional | |
153 | Value type: <none> | |
154 | Definition: The specified pins should be configued as pull up. | |
155 | ||
156 | - output-high: | |
157 | Usage: optional | |
158 | Value type: <none> | |
159 | Definition: The specified pins are configured in output mode, driven | |
160 | high. | |
161 | Not valid for sdc pins. | |
162 | ||
163 | - output-low: | |
164 | Usage: optional | |
165 | Value type: <none> | |
166 | Definition: The specified pins are configured in output mode, driven | |
167 | low. | |
168 | Not valid for sdc pins. | |
169 | ||
170 | - drive-strength: | |
171 | Usage: optional | |
172 | Value type: <u32> | |
173 | Definition: Selects the drive strength for the specified pins, in mA. | |
174 | Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 | |
175 | ||
176 | Example: | |
177 | ||
48c926cd | 178 | tlmm: pinctrl@1010000 { |
d1b49b68 JP |
179 | compatible = "qcom,msm8996-pinctrl"; |
180 | reg = <0x01010000 0x300000>; | |
181 | interrupts = <0 208 0>; | |
182 | gpio-controller; | |
183 | #gpio-cells = <2>; | |
184 | interrupt-controller; | |
185 | #interrupt-cells = <2>; | |
186 | ||
187 | uart_console_active: uart_console_active { | |
188 | mux { | |
189 | pins = "gpio4", "gpio5"; | |
190 | function = "blsp_uart8"; | |
191 | }; | |
192 | ||
193 | config { | |
194 | pins = "gpio4", "gpio5"; | |
195 | drive-strength = <2>; | |
196 | bias-disable; | |
197 | }; | |
198 | }; | |
199 | }; |