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58e4a668 PZ |
1 | Freescale i.MX General Power Controller |
2 | ======================================= | |
3 | ||
b7a24a7d LS |
4 | The i.MX6 General Power Control (GPC) block contains DVFS load tracking |
5 | counters and Power Gating Control (PGC). | |
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6 | |
7 | Required properties: | |
47905a1b LS |
8 | - compatible: Should be one of the following: |
9 | - fsl,imx6q-gpc | |
10 | - fsl,imx6qp-gpc | |
11 | - fsl,imx6sl-gpc | |
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12 | - reg: should be register base and length as documented in the |
13 | datasheet | |
b7a24a7d LS |
14 | - interrupts: Should contain one interrupt specifier for the GPC interrupt |
15 | - clocks: Must contain an entry for each entry in clock-names. | |
16 | See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details. | |
17 | - clock-names: Must include the following entries: | |
18 | - ipg | |
58e4a668 | 19 | |
b7a24a7d LS |
20 | The power domains are generic power domain providers as documented in |
21 | Documentation/devicetree/bindings/power/power_domain.txt. They are described as | |
22 | subnodes of the power gating controller 'pgc' node of the GPC and should | |
23 | contain the following: | |
24 | ||
25 | Required properties: | |
ff693a3f | 26 | - reg: Must contain the DOMAIN_INDEX of this power domain |
b7a24a7d LS |
27 | The following DOMAIN_INDEX values are valid for i.MX6Q: |
28 | ARM_DOMAIN 0 | |
29 | PU_DOMAIN 1 | |
30 | The following additional DOMAIN_INDEX value is valid for i.MX6SL: | |
31 | DISPLAY_DOMAIN 2 | |
32 | ||
33 | - #power-domain-cells: Should be 0 | |
34 | ||
35 | Optional properties: | |
36 | - clocks: a number of phandles to clocks that need to be enabled during domain | |
37 | power-up sequencing to ensure reset propagation into devices located inside | |
38 | this power domain | |
39 | - power-supply: a phandle to the regulator powering this domain | |
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40 | |
41 | Example: | |
42 | ||
48c926cd | 43 | gpc: gpc@20dc000 { |
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44 | compatible = "fsl,imx6q-gpc"; |
45 | reg = <0x020dc000 0x4000>; | |
46 | interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, | |
47 | <0 90 IRQ_TYPE_LEVEL_HIGH>; | |
b7a24a7d LS |
48 | clocks = <&clks IMX6QDL_CLK_IPG>; |
49 | clock-names = "ipg"; | |
50 | ||
51 | pgc { | |
52 | #address-cells = <1>; | |
53 | #size-cells = <0>; | |
54 | ||
55 | power-domain@0 { | |
56 | reg = <0>; | |
57 | #power-domain-cells = <0>; | |
58 | }; | |
ff693a3f | 59 | |
b7a24a7d LS |
60 | pd_pu: power-domain@1 { |
61 | reg = <1>; | |
62 | #power-domain-cells = <0>; | |
63 | power-supply = <®_pu>; | |
64 | clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, | |
65 | <&clks IMX6QDL_CLK_GPU3D_SHADER>, | |
66 | <&clks IMX6QDL_CLK_GPU2D_CORE>, | |
67 | <&clks IMX6QDL_CLK_GPU2D_AXI>, | |
68 | <&clks IMX6QDL_CLK_OPENVG_AXI>, | |
69 | <&clks IMX6QDL_CLK_VPU_AXI>; | |
70 | }; | |
71 | }; | |
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72 | }; |
73 | ||
74 | ||
75 | Specifying power domain for IP modules | |
76 | ====================================== | |
77 | ||
78 | IP cores belonging to a power domain should contain a 'power-domains' property | |
b7a24a7d | 79 | that is a phandle pointing to the power domain the device belongs to. |
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80 | |
81 | Example of a device that is part of the PU power domain: | |
82 | ||
48c926cd | 83 | vpu: vpu@2040000 { |
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84 | reg = <0x02040000 0x3c000>; |
85 | /* ... */ | |
b7a24a7d | 86 | power-domains = <&pd_pu>; |
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87 | /* ... */ |
88 | }; |