projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 2f2cc27f YCLP |
1 | Anatop Voltage regulators |
| 2 | ||
| 3 | Required properties: | |
| 4 | - compatible: Must be "fsl,anatop-regulator" | |
| 5 | - anatop-reg-offset: Anatop MFD register offset | |
| 6 | - anatop-vol-bit-shift: Bit shift for the register | |
| 7 | - anatop-vol-bit-width: Number of bits used in the register | |
| 8 | - anatop-min-bit-val: Minimum value of this register | |
| 9 | - anatop-min-voltage: Minimum voltage of this regulator | |
| 10 | - anatop-max-voltage: Maximum voltage of this regulator | |
| 11 | ||
| 9ee417c0 AH |
12 | Optional properties: |
| 13 | - anatop-delay-reg-offset: Anatop MFD step time register offset | |
| 14 | - anatop-delay-bit-shift: Bit shift for the step time register | |
| 15 | - anatop-delay-bit-width: Number of bits used in the step time register | |
| 0d19208e | 16 | - vin-supply: The supply for this regulator |
| 9ee417c0 | 17 | |
| 2f2cc27f YCLP |
18 | Any property defined as part of the core regulator |
| 19 | binding, defined in regulator.txt, can also be used. | |
| 20 | ||
| 21 | Example: | |
| 22 | ||
| 23 | regulator-vddpu { | |
| 24 | compatible = "fsl,anatop-regulator"; | |
| 25 | regulator-name = "vddpu"; | |
| 26 | regulator-min-microvolt = <725000>; | |
| 27 | regulator-max-microvolt = <1300000>; | |
| 28 | regulator-always-on; | |
| 29 | anatop-reg-offset = <0x140>; | |
| 30 | anatop-vol-bit-shift = <9>; | |
| 31 | anatop-vol-bit-width = <5>; | |
| 9ee417c0 AH |
32 | anatop-delay-reg-offset = <0x170>; |
| 33 | anatop-delay-bit-shift = <24>; | |
| 34 | anatop-delay-bit-width = <2>; | |
| 2f2cc27f YCLP |
35 | anatop-min-bit-val = <1>; |
| 36 | anatop-min-voltage = <725000>; | |
| 37 | anatop-max-voltage = <1300000>; | |
| 38 | }; |