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Commit | Line | Data |
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04d11269 CF |
1 | Hisilicon System Reset Controller |
2 | ====================================== | |
3 | ||
4 | Please also refer to reset.txt in this directory for common reset | |
5 | controller binding usage. | |
6 | ||
7 | The reset controller registers are part of the system-ctl block on | |
8 | hi6220 SoC. | |
9 | ||
10 | Required properties: | |
50f44e89 XL |
11 | - compatible: should be one of the following: |
12 | - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller. | |
13 | - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller. | |
04d11269 CF |
14 | - reg: should be register base and length as documented in the |
15 | datasheet | |
16 | - #reset-cells: 1, see below | |
17 | ||
18 | Example: | |
19 | sys_ctrl: sys_ctrl@f7030000 { | |
20 | compatible = "hisilicon,hi6220-sysctrl", "syscon"; | |
21 | reg = <0x0 0xf7030000 0x0 0x2000>; | |
22 | #clock-cells = <1>; | |
23 | #reset-cells = <1>; | |
24 | }; | |
25 | ||
26 | Specifying reset lines connected to IP modules | |
27 | ============================================== | |
28 | example: | |
29 | ||
30 | uart1: serial@..... { | |
31 | ... | |
32 | resets = <&sys_ctrl PERIPH_RSTEN3_UART1>; | |
33 | ... | |
34 | }; | |
35 | ||
36 | The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>. |