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97927589 SH |
1 | MediaTek PMIC Wrapper Driver |
2 | ||
3 | This document describes the binding for the MediaTek PMIC wrapper. | |
4 | ||
5 | On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface | |
6 | is not directly visible to the CPU, but only through the PMIC wrapper | |
7 | inside the SoC. The communication between the SoC and the PMIC can | |
8 | optionally be encrypted. Also a non standard Dual IO SPI mode can be | |
9 | used to increase speed. | |
10 | ||
11 | IP Pairing | |
12 | ||
13 | on MT8135 the pins of some SoC internal peripherals can be on the PMIC. | |
14 | The signals of these pins are routed over the SPI bus using the pwrap | |
15 | bridge. In the binding description below the properties needed for bridging | |
16 | are marked with "IP Pairing". These are optional on SoCs which do not support | |
17 | IP Pairing | |
18 | ||
19 | Required properties in pwrap device node. | |
20 | - compatible: | |
e16cb8c2 | 21 | "mediatek,mt2701-pwrap" for MT2701/7623 SoCs |
0db3bd82 | 22 | "mediatek,mt6765-pwrap" for MT6765 SoCs |
7de7f952 | 23 | "mediatek,mt6797-pwrap" for MT6797 SoCs |
c77d3b8d | 24 | "mediatek,mt7622-pwrap" for MT7622 SoCs |
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25 | "mediatek,mt8135-pwrap" for MT8135 SoCs |
26 | "mediatek,mt8173-pwrap" for MT8173 SoCs | |
6d0ca9db | 27 | "mediatek,mt8183-pwrap" for MT8183 SoCs |
4bad8b07 | 28 | "mediatek,mt8516-pwrap" for MT8516 SoCs |
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29 | - interrupts: IRQ for pwrap in SOC |
30 | - reg-names: Must include the following entries: | |
31 | "pwrap": Main registers base | |
32 | "pwrap-bridge": bridge base (IP Pairing) | |
33 | - reg: Must contain an entry for each entry in reg-names. | |
34 | - reset-names: Must include the following entries: | |
35 | "pwrap" | |
36 | "pwrap-bridge" (IP Pairing) | |
37 | - resets: Must contain an entry for each entry in reset-names. | |
38 | - clock-names: Must include the following entries: | |
39 | "spi": SPI bus clock | |
40 | "wrap": Main module clock | |
41 | - clocks: Must contain an entry for each entry in clock-names. | |
42 | ||
43 | Optional properities: | |
c77d3b8d | 44 | - pmic: Using either MediaTek PMIC MFD as the child device of pwrap |
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45 | See the following for child node definitions: |
46 | Documentation/devicetree/bindings/mfd/mt6397.txt | |
c77d3b8d SW |
47 | or the regulator-only device as the child device of pwrap, such as MT6380. |
48 | See the following definitions for such kinds of devices. | |
49 | Documentation/devicetree/bindings/regulator/mt6380-regulator.txt | |
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50 | |
51 | Example: | |
52 | pwrap: pwrap@1000f000 { | |
53 | compatible = "mediatek,mt8135-pwrap"; | |
54 | reg = <0 0x1000f000 0 0x1000>, | |
55 | <0 0x11017000 0 0x1000>; | |
56 | reg-names = "pwrap", "pwrap-bridge"; | |
57 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; | |
58 | resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, | |
59 | <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; | |
60 | reset-names = "pwrap", "pwrap-bridge"; | |
61 | clocks = <&clk26m>, <&clk26m>; | |
62 | clock-names = "spi", "wrap"; | |
63 | ||
64 | pmic { | |
65 | compatible = "mediatek,mt6397"; | |
66 | }; | |
67 | }; |