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1* Allwinner A10 I2S controller
2
3The I2S bus (Inter-IC sound bus) is a serial link for digital
4audio data transfer between devices in the system.
5
6Required properties:
7
8- compatible: should be one of the followings
9 - "allwinner,sun4i-a10-i2s"
f55d404f 10 - "allwinner,sun6i-a31-i2s"
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11- reg: physical base address of the controller and length of memory mapped
12 region.
13- interrupts: should contain the I2S interrupt.
14- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
15 Documentation/devicetree/bindings/dma/dma.txt
16- dma-names: should include "tx" and "rx".
17- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
18- clock-names: should contain followings:
19 - "apb" : clock for the I2S bus interface
20 - "mod" : module clock for the I2S controller
21- #sound-dai-cells : Must be equal to 0
22
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23Required properties for the following compatibles:
24 - "allwinner,sun6i-a31-i2s"
25- resets: phandle to the reset line for this codec
26
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27Example:
28
29i2s0: i2s@01c22400 {
30 #sound-dai-cells = <0>;
31 compatible = "allwinner,sun4i-a10-i2s";
32 reg = <0x01c22400 0x400>;
33 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
34 clocks = <&apb0_gates 3>, <&i2s0_clk>;
35 clock-names = "apb", "mod";
36 dmas = <&dma SUN4I_DMA_NORMAL 3>,
37 <&dma SUN4I_DMA_NORMAL 3>;
38 dma-names = "rx", "tx";
39};