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Commit | Line | Data |
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7ddf7c1e CP |
1 | * Atmel Quad Serial Peripheral Interface (QSPI) |
2 | ||
3 | Required properties: | |
3a6c501e TA |
4 | - compatible: Should be one of the following: |
5 | - "atmel,sama5d2-qspi" | |
6 | - "microchip,sam9x60-qspi" | |
7ddf7c1e CP |
7 | - reg: Should contain the locations and lengths of the base registers |
8 | and the mapped memory. | |
9 | - reg-names: Should contain the resource reg names: | |
10 | - qspi_base: configuration register address space | |
11 | - qspi_mmap: memory mapped address space | |
12 | - interrupts: Should contain the interrupt for the device. | |
3a6c501e TA |
13 | - clocks: Should reference the peripheral clock and the QSPI system |
14 | clock if available. | |
15 | - clock-names: Should contain "pclk" for the peripheral clock and "qspick" | |
16 | for the system clock when available. | |
7ddf7c1e CP |
17 | - #address-cells: Should be <1>. |
18 | - #size-cells: Should be <0>. | |
19 | ||
20 | Example: | |
21 | ||
22 | spi@f0020000 { | |
23 | compatible = "atmel,sama5d2-qspi"; | |
24 | reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>; | |
25 | reg-names = "qspi_base", "qspi_mmap"; | |
26 | interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; | |
90484f9b | 27 | clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; |
18f07514 | 28 | clock-names = "pclk"; |
7ddf7c1e CP |
29 | #address-cells = <1>; |
30 | #size-cells = <0>; | |
31 | pinctrl-names = "default"; | |
32 | pinctrl-0 = <&pinctrl_spi0_default>; | |
7ddf7c1e CP |
33 | |
34 | m25p80@0 { | |
35 | ... | |
36 | }; | |
37 | }; |