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Commit | Line | Data |
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22a85e4c SG |
1 | * Freescale (Enhanced) Configurable Serial Peripheral Interface |
2 | (CSPI/eCSPI) for i.MX | |
3 | ||
4 | Required properties: | |
7f43a87e MP |
5 | - compatible : |
6 | - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1 | |
7 | - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21 | |
8 | - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27 | |
9 | - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31 | |
10 | - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35 | |
11 | - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51 | |
26e4bb86 | 12 | - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc |
22a85e4c SG |
13 | - reg : Offset and length of the register set for the device |
14 | - interrupts : Should contain CSPI/eCSPI interrupt | |
7f43a87e MP |
15 | - clocks : Clock specifiers for both ipg and per clocks. |
16 | - clock-names : Clock names should include both "ipg" and "per" | |
17 | See the clock consumer binding, | |
18 | Documentation/devicetree/bindings/clock/clock-bindings.txt | |
22a85e4c | 19 | |
8c059a46 TP |
20 | Recommended properties: |
21 | - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip | |
22 | select lines can be used, they appear to always generate a pulse between each | |
23 | word of a transfer. Most use cases will require GPIO based chip selects to | |
24 | generate a valid transaction. | |
956fff71 | 25 | |
f72efa7e | 26 | Optional properties: |
8c059a46 TP |
27 | - num-cs : Number of total chip selects, see spi-bus.txt. |
28 | - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, | |
29 | Documentation/devicetree/bindings/dma/dma.txt. | |
30 | - dma-names: DMA request names, if present, should include "tx" and "rx". | |
f72efa7e LM |
31 | - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register |
32 | controlling the SPI_READY handling. Note that to enable the DRCTL consideration, | |
33 | the SPI_READY mode-flag needs to be set too. | |
34 | Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). | |
35 | ||
8c059a46 TP |
36 | Obsolete properties: |
37 | - fsl,spi-num-chipselects : Contains the number of the chipselect | |
38 | ||
22a85e4c SG |
39 | Example: |
40 | ||
41 | ecspi@70010000 { | |
42 | #address-cells = <1>; | |
43 | #size-cells = <0>; | |
44 | compatible = "fsl,imx51-ecspi"; | |
45 | reg = <0x70010000 0x4000>; | |
46 | interrupts = <36>; | |
37797d5f FE |
47 | cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */ |
48 | <&gpio3 25 0>; /* GPIO3_25 */ | |
f62caccd RG |
49 | dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; |
50 | dma-names = "rx", "tx"; | |
f72efa7e | 51 | fsl,spi-rdy-drctl = <1>; |
22a85e4c | 52 | }; |