]>
Commit | Line | Data |
---|---|---|
cf9c86ef BH |
1 | Renesas MSIOF spi controller |
2 | ||
3 | Required properties: | |
beb74bb0 GU |
4 | - compatible : "renesas,msiof-<soctype>" for SoCs, |
5 | "renesas,sh-msiof" for SuperH, or | |
32d3b2d1 | 6 | "renesas,sh-mobile-msiof" for SH Mobile series. |
beb74bb0 | 7 | Examples with soctypes are: |
beb74bb0 GU |
8 | "renesas,msiof-r8a7790" (R-Car H2) |
9 | "renesas,msiof-r8a7791" (R-Car M2) | |
32d3b2d1 GU |
10 | - reg : Offset and length of the register set for the device |
11 | - interrupt-parent : The phandle for the interrupt controller that | |
12 | services interrupts for this device | |
13 | - interrupts : Interrupt specifier | |
14 | - #address-cells : Must be <1> | |
15 | - #size-cells : Must be <0> | |
cf9c86ef BH |
16 | |
17 | Optional properties: | |
32d3b2d1 GU |
18 | - clocks : Must contain a reference to the functional clock. |
19 | - num-cs : Total number of chip-selects (default is 1) | |
beb74bb0 GU |
20 | |
21 | Optional properties, deprecated for soctype-specific bindings: | |
32d3b2d1 GU |
22 | - renesas,tx-fifo-size : Overrides the default tx fifo size given in words |
23 | (default is 64) | |
24 | - renesas,rx-fifo-size : Overrides the default rx fifo size given in words | |
beb74bb0 | 25 | (default is 64, or 256 on R-Car H2 and M2) |
32d3b2d1 GU |
26 | |
27 | Pinctrl properties might be needed, too. See | |
28 | Documentation/devicetree/bindings/pinctrl/renesas,*. | |
beb74bb0 GU |
29 | |
30 | Example: | |
31 | ||
32 | msiof0: spi@e6e20000 { | |
33 | compatible = "renesas,msiof-r8a7791"; | |
34 | reg = <0 0xe6e20000 0 0x0064>; | |
35 | interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; | |
36 | clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; | |
37 | #address-cells = <1>; | |
38 | #size-cells = <0>; | |
39 | status = "disabled"; | |
40 | }; |