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Commit | Line | Data |
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9cbd72e5 CF |
1 | ARM Freescale DSPI controller |
2 | ||
3 | Required properties: | |
4 | - compatible : "fsl,vf610-dspi" | |
5 | - reg : Offset and length of the register set for the device | |
6 | - interrupts : Should contain SPI controller interrupt | |
7 | - clocks: from common clock binding: handle to dspi clock. | |
8 | - clock-names: from common clock binding: Shall be "dspi". | |
9 | - pinctrl-0: pin control group to be used for this controller. | |
10 | - pinctrl-names: must contain a "default" entry. | |
11 | - spi-num-chipselects : the number of the chipselect signals. | |
12 | - bus-num : the slave chip chipselect signal number. | |
1acbdeb9 | 13 | - big-endian : if DSPI modudle is big endian, the bool will be set in node. |
9cbd72e5 CF |
14 | Example: |
15 | ||
16 | dspi0@4002c000 { | |
17 | #address-cells = <1>; | |
18 | #size-cells = <0>; | |
19 | compatible = "fsl,vf610-dspi"; | |
20 | reg = <0x4002c000 0x1000>; | |
21 | interrupts = <0 67 0x04>; | |
22 | clocks = <&clks VF610_CLK_DSPI0>; | |
23 | clock-names = "dspi"; | |
24 | spi-num-chipselects = <5>; | |
25 | bus-num = <0>; | |
26 | pinctrl-names = "default"; | |
27 | pinctrl-0 = <&pinctrl_dspi0_1>; | |
1acbdeb9 | 28 | big-endian; |
9cbd72e5 CF |
29 | status = "okay"; |
30 | ||
31 | sflash: at26df081a@0 { | |
32 | #address-cells = <1>; | |
33 | #size-cells = <1>; | |
34 | compatible = "atmel,at26df081a"; | |
35 | spi-max-frequency = <16000000>; | |
36 | spi-cpol; | |
37 | spi-cpha; | |
38 | reg = <0>; | |
39 | linux,modalias = "m25p80"; | |
40 | modal = "at26df081a"; | |
41 | }; | |
42 | }; | |
43 | ||
44 |