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1Linux Kernel Makefiles
2
3This document describes the Linux kernel Makefiles.
4
5=== Table of Contents
6
7 === 1 Overview
8 === 2 Who does what
9 === 3 The kbuild files
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
20a468b5 20 --- 3.11 $(CC) support functions
691ef3e7 21 --- 3.12 $(LD) support functions
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22
23 === 4 Host Program support
24 --- 4.1 Simple Host Program
25 --- 4.2 Composite Host Programs
39e6e9cf 26 --- 4.3 Defining shared libraries
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27 --- 4.4 Using C++ for host programs
28 --- 4.5 Controlling compiler options for host programs
29 --- 4.6 When host programs are actually built
30 --- 4.7 Using hostprogs-$(CONFIG_FOO)
31
32 === 5 Kbuild clean infrastructure
33
34 === 6 Architecture Makefiles
35 --- 6.1 Set variables to tweak the build to the architecture
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36 --- 6.2 Add prerequisites to archheaders:
37 --- 6.3 Add prerequisites to archprepare:
38 --- 6.4 List directories to visit when descending
39 --- 6.5 Architecture-specific boot images
40 --- 6.6 Building non-kbuild targets
41 --- 6.7 Commands useful for building a boot image
42 --- 6.8 Custom kbuild commands
43 --- 6.9 Preprocessing linker scripts
44 --- 6.10 Generic header files
1da177e4 45
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46 === 7 Kbuild syntax for exported headers
47 --- 7.1 header-y
40f1d4c2 48 --- 7.2 genhdr-y
c7bb349e 49 --- 7.3 destination-y
d8ecc5cd 50 --- 7.4 generic-y
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51
52 === 8 Kbuild Variables
53 === 9 Makefile language
54 === 10 Credits
55 === 11 TODO
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56
57=== 1 Overview
58
59The Makefiles have five parts:
60
61 Makefile the top Makefile.
62 .config the kernel configuration file.
63 arch/$(ARCH)/Makefile the arch Makefile.
64 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
65 kbuild Makefiles there are about 500 of these.
66
67The top Makefile reads the .config file, which comes from the kernel
68configuration process.
69
70The top Makefile is responsible for building two major products: vmlinux
71(the resident kernel image) and modules (any module files).
72It builds these goals by recursively descending into the subdirectories of
73the kernel source tree.
74The list of subdirectories which are visited depends upon the kernel
75configuration. The top Makefile textually includes an arch Makefile
76with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
77architecture-specific information to the top Makefile.
78
79Each subdirectory has a kbuild Makefile which carries out the commands
80passed down from above. The kbuild Makefile uses information from the
39e6e9cf 81.config file to construct various file lists used by kbuild to build
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82any built-in or modular targets.
83
84scripts/Makefile.* contains all the definitions/rules etc. that
85are used to build the kernel based on the kbuild makefiles.
86
87
88=== 2 Who does what
89
90People have four different relationships with the kernel Makefiles.
91
92*Users* are people who build kernels. These people type commands such as
93"make menuconfig" or "make". They usually do not read or edit
94any kernel Makefiles (or any other source files).
95
96*Normal developers* are people who work on features such as device
97drivers, file systems, and network protocols. These people need to
a07f6033 98maintain the kbuild Makefiles for the subsystem they are
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99working on. In order to do this effectively, they need some overall
100knowledge about the kernel Makefiles, plus detailed knowledge about the
101public interface for kbuild.
102
103*Arch developers* are people who work on an entire architecture, such
104as sparc or ia64. Arch developers need to know about the arch Makefile
105as well as kbuild Makefiles.
106
107*Kbuild developers* are people who work on the kernel build system itself.
108These people need to know about all aspects of the kernel Makefiles.
109
110This document is aimed towards normal developers and arch developers.
111
112
113=== 3 The kbuild files
114
115Most Makefiles within the kernel are kbuild Makefiles that use the
a07f6033 116kbuild infrastructure. This chapter introduces the syntax used in the
1da177e4 117kbuild makefiles.
172c3ae3 118The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
a07f6033 119be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
172c3ae3 120file will be used.
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121
122Section 3.1 "Goal definitions" is a quick intro, further chapters provide
123more details, with real examples.
124
125--- 3.1 Goal definitions
126
127 Goal definitions are the main part (heart) of the kbuild Makefile.
128 These lines define the files to be built, any special compilation
129 options, and any subdirectories to be entered recursively.
130
131 The most simple kbuild makefile contains one line:
132
133 Example:
134 obj-y += foo.o
135
5c811e59 136 This tells kbuild that there is one object in that directory, named
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137 foo.o. foo.o will be built from foo.c or foo.S.
138
139 If foo.o shall be built as a module, the variable obj-m is used.
140 Therefore the following pattern is often used:
141
142 Example:
143 obj-$(CONFIG_FOO) += foo.o
144
145 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
146 If CONFIG_FOO is neither y nor m, then the file will not be compiled
147 nor linked.
148
149--- 3.2 Built-in object goals - obj-y
150
151 The kbuild Makefile specifies object files for vmlinux
a07f6033 152 in the $(obj-y) lists. These lists depend on the kernel
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153 configuration.
154
155 Kbuild compiles all the $(obj-y) files. It then calls
156 "$(LD) -r" to merge these files into one built-in.o file.
157 built-in.o is later linked into vmlinux by the parent Makefile.
158
159 The order of files in $(obj-y) is significant. Duplicates in
160 the lists are allowed: the first instance will be linked into
161 built-in.o and succeeding instances will be ignored.
162
163 Link order is significant, because certain functions
164 (module_init() / __initcall) will be called during boot in the
165 order they appear. So keep in mind that changing the link
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166 order may e.g. change the order in which your SCSI
167 controllers are detected, and thus your disks are renumbered.
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168
169 Example:
170 #drivers/isdn/i4l/Makefile
171 # Makefile for the kernel ISDN subsystem and device drivers.
172 # Each configuration option enables a list of files.
2f5a2f81 173 obj-$(CONFIG_ISDN_I4L) += isdn.o
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174 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
175
176--- 3.3 Loadable module goals - obj-m
177
178 $(obj-m) specify object files which are built as loadable
179 kernel modules.
180
181 A module may be built from one source file or several source
182 files. In the case of one source file, the kbuild makefile
183 simply adds the file to $(obj-m).
184
185 Example:
186 #drivers/isdn/i4l/Makefile
187 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
188
189 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
190
191 If a kernel module is built from several source files, you specify
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192 that you want to build a module in the same way as above; however,
193 kbuild needs to know which object files you want to build your
194 module from, so you have to tell it by setting a $(<module_name>-y)
195 variable.
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196
197 Example:
198 #drivers/isdn/i4l/Makefile
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199 obj-$(CONFIG_ISDN_I4L) += isdn.o
200 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
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201
202 In this example, the module name will be isdn.o. Kbuild will
4f827280 203 compile the objects listed in $(isdn-y) and then run
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204 "$(LD) -r" on the list of these files to generate isdn.o.
205
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206 Due to kbuild recognizing $(<module_name>-y) for composite objects,
207 you can use the value of a CONFIG_ symbol to optionally include an
208 object file as part of a composite object.
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209
210 Example:
211 #fs/ext2/Makefile
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212 obj-$(CONFIG_EXT2_FS) += ext2.o
213 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
214 namei.o super.o symlink.o
215 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
216 xattr_trusted.o
217
218 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
219 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
220 evaluates to 'y'.
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221
222 Note: Of course, when you are building objects into the kernel,
223 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
224 kbuild will build an ext2.o file for you out of the individual
225 parts and then link this into built-in.o, as you would expect.
226
227--- 3.4 Objects which export symbols
228
229 No special notation is required in the makefiles for
230 modules exporting symbols.
231
232--- 3.5 Library file goals - lib-y
233
a07f6033 234 Objects listed with obj-* are used for modules, or
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235 combined in a built-in.o for that specific directory.
236 There is also the possibility to list objects that will
237 be included in a library, lib.a.
238 All objects listed with lib-y are combined in a single
239 library for that directory.
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240 Objects that are listed in obj-y and additionally listed in
241 lib-y will not be included in the library, since they will
242 be accessible anyway.
a07f6033 243 For consistency, objects listed in lib-m will be included in lib.a.
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244
245 Note that the same kbuild makefile may list files to be built-in
246 and to be part of a library. Therefore the same directory
247 may contain both a built-in.o and a lib.a file.
248
249 Example:
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250 #arch/x86/lib/Makefile
251 lib-y := delay.o
1da177e4 252
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253 This will create a library lib.a based on delay.o. For kbuild to
254 actually recognize that there is a lib.a being built, the directory
255 shall be listed in libs-y.
052ad274 256 See also "6.4 List directories to visit when descending".
39e6e9cf 257
a07f6033 258 Use of lib-y is normally restricted to lib/ and arch/*/lib.
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259
260--- 3.6 Descending down in directories
261
262 A Makefile is only responsible for building objects in its own
263 directory. Files in subdirectories should be taken care of by
264 Makefiles in these subdirs. The build system will automatically
265 invoke make recursively in subdirectories, provided you let it know of
266 them.
267
a07f6033 268 To do so, obj-y and obj-m are used.
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269 ext2 lives in a separate directory, and the Makefile present in fs/
270 tells kbuild to descend down using the following assignment.
271
272 Example:
273 #fs/Makefile
274 obj-$(CONFIG_EXT2_FS) += ext2/
275
276 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
277 the corresponding obj- variable will be set, and kbuild will descend
278 down in the ext2 directory.
279 Kbuild only uses this information to decide that it needs to visit
280 the directory, it is the Makefile in the subdirectory that
281 specifies what is modules and what is built-in.
282
283 It is good practice to use a CONFIG_ variable when assigning directory
284 names. This allows kbuild to totally skip the directory if the
285 corresponding CONFIG_ option is neither 'y' nor 'm'.
286
287--- 3.7 Compilation flags
288
f77bf014 289 ccflags-y, asflags-y and ldflags-y
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290 These three flags apply only to the kbuild makefile in which they
291 are assigned. They are used for all the normal cc, as and ld
292 invocations happening during a recursive build.
f77bf014 293 Note: Flags with the same behaviour were previously named:
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294 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
295 They are still supported but their usage is deprecated.
1da177e4 296
eb07e1b4 297 ccflags-y specifies options for compiling with $(CC).
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298
299 Example:
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300 # drivers/acpi/Makefile
301 ccflags-y := -Os
302 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
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303
304 This variable is necessary because the top Makefile owns the
a0f97e06 305 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
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306 entire tree.
307
eb07e1b4 308 asflags-y specifies options for assembling with $(AS).
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309
310 Example:
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311 #arch/sparc/kernel/Makefile
312 asflags-y := -ansi
1da177e4 313
eb07e1b4 314 ldflags-y specifies options for linking with $(LD).
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315
316 Example:
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317 #arch/cris/boot/compressed/Makefile
318 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
1da177e4 319
720097d8 320 subdir-ccflags-y, subdir-asflags-y
eb07e1b4 321 The two flags listed above are similar to ccflags-y and asflags-y.
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322 The difference is that the subdir- variants have effect for the kbuild
323 file where they are present and all subdirectories.
324 Options specified using subdir-* are added to the commandline before
325 the options specified using the non-subdir variants.
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326
327 Example:
328 subdir-ccflags-y := -Werror
329
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330 CFLAGS_$@, AFLAGS_$@
331
332 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
333 kbuild makefile.
334
335 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
336 part has a literal value which specifies the file that it is for.
337
338 Example:
339 # drivers/scsi/Makefile
340 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
341 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
342 -DGDTH_STATISTICS
1da177e4 343
eb07e1b4 344 These two lines specify compilation flags for aha152x.o and gdth.o.
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345
346 $(AFLAGS_$@) is a similar feature for source files in assembly
347 languages.
348
349 Example:
350 # arch/arm/kernel/Makefile
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351 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
352 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
353 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
354
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355
356--- 3.9 Dependency tracking
357
358 Kbuild tracks dependencies on the following:
359 1) All prerequisite files (both *.c and *.h)
360 2) CONFIG_ options used in all prerequisite files
361 3) Command-line used to compile target
362
363 Thus, if you change an option to $(CC) all affected files will
364 be re-compiled.
365
366--- 3.10 Special Rules
367
368 Special rules are used when the kbuild infrastructure does
369 not provide the required support. A typical example is
370 header files generated during the build process.
5c811e59 371 Another example are the architecture-specific Makefiles which
a07f6033 372 need special rules to prepare boot images etc.
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373
374 Special rules are written as normal Make rules.
375 Kbuild is not executing in the directory where the Makefile is
376 located, so all special rules shall provide a relative
377 path to prerequisite files and target files.
378
379 Two variables are used when defining special rules:
380
381 $(src)
382 $(src) is a relative path which points to the directory
383 where the Makefile is located. Always use $(src) when
384 referring to files located in the src tree.
385
386 $(obj)
387 $(obj) is a relative path which points to the directory
388 where the target is saved. Always use $(obj) when
389 referring to generated files.
390
391 Example:
392 #drivers/scsi/Makefile
393 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
394 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
395
396 This is a special rule, following the normal syntax
397 required by make.
398 The target file depends on two prerequisite files. References
399 to the target file are prefixed with $(obj), references
400 to prerequisites are referenced with $(src) (because they are not
401 generated files).
402
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403 $(kecho)
404 echoing information to user in a rule is often a good practice
405 but when execution "make -s" one does not expect to see any output
406 except for warnings/errors.
407 To support this kbuild define $(kecho) which will echo out the
408 text following $(kecho) to stdout except if "make -s" is used.
409
410 Example:
411 #arch/blackfin/boot/Makefile
412 $(obj)/vmImage: $(obj)/vmlinux.gz
413 $(call if_changed,uimage)
414 @$(kecho) 'Kernel: $@ is ready'
415
416
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417--- 3.11 $(CC) support functions
418
a07f6033 419 The kernel may be built with several different versions of
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420 $(CC), each supporting a unique set of features and options.
421 kbuild provide basic support to check for valid options for $(CC).
e95be9a5 422 $(CC) is usually the gcc compiler, but other alternatives are
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423 available.
424
425 as-option
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426 as-option is used to check if $(CC) -- when used to compile
427 assembler (*.S) files -- supports the given option. An optional
428 second option may be specified if the first option is not supported.
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429
430 Example:
431 #arch/sh/Makefile
432 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
433
a07f6033 434 In the above example, cflags-y will be assigned the option
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435 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
436 The second argument is optional, and if supplied will be used
437 if first argument is not supported.
438
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439 cc-ldoption
440 cc-ldoption is used to check if $(CC) when used to link object files
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441 supports the given option. An optional second option may be
442 specified if first option are not supported.
443
444 Example:
25eb650a 445 #arch/x86/kernel/Makefile
f86fd306 446 vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
0b0bf7a3 447
5c811e59 448 In the above example, vsyscall-flags will be assigned the option
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449 -Wl$(comma)--hash-style=sysv if it is supported by $(CC).
450 The second argument is optional, and if supplied will be used
451 if first argument is not supported.
452
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453 as-instr
454 as-instr checks if the assembler reports a specific instruction
455 and then outputs either option1 or option2
456 C escapes are supported in the test instruction
222d394d 457 Note: as-instr-option uses KBUILD_AFLAGS for $(AS) options
e2414910 458
20a468b5 459 cc-option
a07f6033 460 cc-option is used to check if $(CC) supports a given option, and not
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461 supported to use an optional second option.
462
463 Example:
25eb650a 464 #arch/x86/Makefile
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465 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
466
5c811e59 467 In the above example, cflags-y will be assigned the option
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468 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
469 The second argument to cc-option is optional, and if omitted,
20a468b5 470 cflags-y will be assigned no value if first option is not supported.
a0f97e06 471 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
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472
473 cc-option-yn
39e6e9cf 474 cc-option-yn is used to check if gcc supports a given option
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475 and return 'y' if supported, otherwise 'n'.
476
477 Example:
478 #arch/ppc/Makefile
479 biarch := $(call cc-option-yn, -m32)
480 aflags-$(biarch) += -a32
481 cflags-$(biarch) += -m32
39e6e9cf 482
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483 In the above example, $(biarch) is set to y if $(CC) supports the -m32
484 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
485 and $(cflags-y) will be assigned the values -a32 and -m32,
486 respectively.
a0f97e06 487 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
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488
489 cc-option-align
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490 gcc versions >= 3.0 changed the type of options used to specify
491 alignment of functions, loops etc. $(cc-option-align), when used
492 as prefix to the align options, will select the right prefix:
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493 gcc < 3.00
494 cc-option-align = -malign
495 gcc >= 3.00
496 cc-option-align = -falign
39e6e9cf 497
20a468b5 498 Example:
a0f97e06 499 KBUILD_CFLAGS += $(cc-option-align)-functions=4
20a468b5 500
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501 In the above example, the option -falign-functions=4 is used for
502 gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
a0f97e06 503 Note: cc-option-align uses KBUILD_CFLAGS for $(CC) options
39e6e9cf 504
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505 cc-disable-warning
506 cc-disable-warning checks if gcc supports a given warning and returns
507 the commandline switch to disable it. This special function is needed,
508 because gcc 4.4 and later accept any unknown -Wno-* option and only
509 warn about it if there is another warning in the source file.
510
511 Example:
512 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
513
514 In the above example, -Wno-unused-but-set-variable will be added to
515 KBUILD_CFLAGS only if gcc really accepts it.
516
20a468b5 517 cc-version
a07f6033 518 cc-version returns a numerical version of the $(CC) compiler version.
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519 The format is <major><minor> where both are two digits. So for example
520 gcc 3.41 would return 0341.
521 cc-version is useful when a specific $(CC) version is faulty in one
a07f6033 522 area, for example -mregparm=3 was broken in some gcc versions
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523 even though the option was accepted by gcc.
524
525 Example:
25eb650a 526 #arch/x86/Makefile
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527 cflags-y += $(shell \
528 if [ $(call cc-version) -ge 0300 ] ; then \
529 echo "-mregparm=3"; fi ;)
530
a07f6033 531 In the above example, -mregparm=3 is only used for gcc version greater
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532 than or equal to gcc 3.0.
533
534 cc-ifversion
a07f6033 535 cc-ifversion tests the version of $(CC) and equals last argument if
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536 version expression is true.
537
538 Example:
539 #fs/reiserfs/Makefile
f77bf014 540 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
20a468b5 541
f77bf014 542 In this example, ccflags-y will be assigned the value -O1 if the
20a468b5 543 $(CC) version is less than 4.2.
39e6e9cf 544 cc-ifversion takes all the shell operators:
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545 -eq, -ne, -lt, -le, -gt, and -ge
546 The third parameter may be a text as in this example, but it may also
547 be an expanded variable or a macro.
548
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549 cc-fullversion
550 cc-fullversion is useful when the exact version of gcc is needed.
551 One typical use-case is when a specific GCC version is broken.
552 cc-fullversion points out a more specific version than cc-version does.
553
554 Example:
555 #arch/powerpc/Makefile
556 $(Q)if test "$(call cc-fullversion)" = "040200" ; then \
557 echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \
558 false ; \
559 fi
560
561 In this example for a specific GCC version the build will error out explaining
562 to the user why it stops.
1da177e4 563
910b4046 564 cc-cross-prefix
631bcfbb 565 cc-cross-prefix is used to check if there exists a $(CC) in path with
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566 one of the listed prefixes. The first prefix where there exist a
567 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
568 then nothing is returned.
569 Additional prefixes are separated by a single space in the
570 call of cc-cross-prefix.
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571 This functionality is useful for architecture Makefiles that try
572 to set CROSS_COMPILE to well-known values but may have several
910b4046 573 values to select between.
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574 It is recommended only to try to set CROSS_COMPILE if it is a cross
575 build (host arch is different from target arch). And if CROSS_COMPILE
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576 is already set then leave it with the old value.
577
578 Example:
579 #arch/m68k/Makefile
580 ifneq ($(SUBARCH),$(ARCH))
581 ifeq ($(CROSS_COMPILE),)
582 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
583 endif
584 endif
585
691ef3e7
SR
586--- 3.12 $(LD) support functions
587
588 ld-option
589 ld-option is used to check if $(LD) supports the supplied option.
590 ld-option takes two options as arguments.
591 The second argument is an optional option that can be used if the
592 first option is not supported by $(LD).
593
594 Example:
595 #Makefile
5b83df2b 596 LDFLAGS_vmlinux += $(call ld-option, -X)
691ef3e7
SR
597
598
1da177e4
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599=== 4 Host Program support
600
601Kbuild supports building executables on the host for use during the
602compilation stage.
603Two steps are required in order to use a host executable.
604
605The first step is to tell kbuild that a host program exists. This is
606done utilising the variable hostprogs-y.
607
608The second step is to add an explicit dependency to the executable.
39e6e9cf 609This can be done in two ways. Either add the dependency in a rule,
1da177e4
LT
610or utilise the variable $(always).
611Both possibilities are described in the following.
612
613--- 4.1 Simple Host Program
614
615 In some cases there is a need to compile and run a program on the
616 computer where the build is running.
617 The following line tells kbuild that the program bin2hex shall be
618 built on the build host.
619
620 Example:
621 hostprogs-y := bin2hex
622
623 Kbuild assumes in the above example that bin2hex is made from a single
624 c-source file named bin2hex.c located in the same directory as
625 the Makefile.
39e6e9cf 626
1da177e4
LT
627--- 4.2 Composite Host Programs
628
629 Host programs can be made up based on composite objects.
630 The syntax used to define composite objects for host programs is
631 similar to the syntax used for kernel objects.
5d3f083d 632 $(<executable>-objs) lists all objects used to link the final
1da177e4
LT
633 executable.
634
635 Example:
636 #scripts/lxdialog/Makefile
39e6e9cf 637 hostprogs-y := lxdialog
1da177e4
LT
638 lxdialog-objs := checklist.o lxdialog.o
639
640 Objects with extension .o are compiled from the corresponding .c
a07f6033 641 files. In the above example, checklist.c is compiled to checklist.o
1da177e4 642 and lxdialog.c is compiled to lxdialog.o.
a07f6033 643 Finally, the two .o files are linked to the executable, lxdialog.
1da177e4
LT
644 Note: The syntax <executable>-y is not permitted for host-programs.
645
39e6e9cf
BH
646--- 4.3 Defining shared libraries
647
1da177e4
LT
648 Objects with extension .so are considered shared libraries, and
649 will be compiled as position independent objects.
650 Kbuild provides support for shared libraries, but the usage
651 shall be restricted.
652 In the following example the libkconfig.so shared library is used
653 to link the executable conf.
654
655 Example:
656 #scripts/kconfig/Makefile
657 hostprogs-y := conf
658 conf-objs := conf.o libkconfig.so
659 libkconfig-objs := expr.o type.o
39e6e9cf 660
1da177e4
LT
661 Shared libraries always require a corresponding -objs line, and
662 in the example above the shared library libkconfig is composed by
663 the two objects expr.o and type.o.
664 expr.o and type.o will be built as position independent code and
665 linked as a shared library libkconfig.so. C++ is not supported for
666 shared libraries.
667
668--- 4.4 Using C++ for host programs
669
670 kbuild offers support for host programs written in C++. This was
671 introduced solely to support kconfig, and is not recommended
672 for general use.
673
674 Example:
675 #scripts/kconfig/Makefile
676 hostprogs-y := qconf
677 qconf-cxxobjs := qconf.o
678
679 In the example above the executable is composed of the C++ file
680 qconf.cc - identified by $(qconf-cxxobjs).
39e6e9cf 681
1da177e4
LT
682 If qconf is composed by a mixture of .c and .cc files, then an
683 additional line can be used to identify this.
684
685 Example:
686 #scripts/kconfig/Makefile
687 hostprogs-y := qconf
688 qconf-cxxobjs := qconf.o
689 qconf-objs := check.o
39e6e9cf 690
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LT
691--- 4.5 Controlling compiler options for host programs
692
693 When compiling host programs, it is possible to set specific flags.
694 The programs will always be compiled utilising $(HOSTCC) passed
695 the options specified in $(HOSTCFLAGS).
696 To set flags that will take effect for all host programs created
a07f6033 697 in that Makefile, use the variable HOST_EXTRACFLAGS.
1da177e4
LT
698
699 Example:
700 #scripts/lxdialog/Makefile
701 HOST_EXTRACFLAGS += -I/usr/include/ncurses
39e6e9cf 702
1da177e4
LT
703 To set specific flags for a single file the following construction
704 is used:
705
706 Example:
707 #arch/ppc64/boot/Makefile
708 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
39e6e9cf 709
1da177e4 710 It is also possible to specify additional options to the linker.
39e6e9cf 711
1da177e4
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712 Example:
713 #scripts/kconfig/Makefile
714 HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
715
a07f6033
JE
716 When linking qconf, it will be passed the extra option
717 "-L$(QTDIR)/lib".
39e6e9cf 718
1da177e4
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719--- 4.6 When host programs are actually built
720
721 Kbuild will only build host-programs when they are referenced
722 as a prerequisite.
723 This is possible in two ways:
724
725 (1) List the prerequisite explicitly in a special rule.
726
727 Example:
728 #drivers/pci/Makefile
729 hostprogs-y := gen-devlist
730 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
731 ( cd $(obj); ./gen-devlist ) < $<
732
39e6e9cf 733 The target $(obj)/devlist.h will not be built before
1da177e4
LT
734 $(obj)/gen-devlist is updated. Note that references to
735 the host programs in special rules must be prefixed with $(obj).
736
737 (2) Use $(always)
738 When there is no suitable special rule, and the host program
739 shall be built when a makefile is entered, the $(always)
740 variable shall be used.
741
742 Example:
743 #scripts/lxdialog/Makefile
744 hostprogs-y := lxdialog
745 always := $(hostprogs-y)
746
747 This will tell kbuild to build lxdialog even if not referenced in
748 any rule.
749
750--- 4.7 Using hostprogs-$(CONFIG_FOO)
751
39e6e9cf 752 A typical pattern in a Kbuild file looks like this:
1da177e4
LT
753
754 Example:
755 #scripts/Makefile
756 hostprogs-$(CONFIG_KALLSYMS) += kallsyms
757
758 Kbuild knows about both 'y' for built-in and 'm' for module.
759 So if a config symbol evaluate to 'm', kbuild will still build
a07f6033
JE
760 the binary. In other words, Kbuild handles hostprogs-m exactly
761 like hostprogs-y. But only hostprogs-y is recommended to be used
762 when no CONFIG symbols are involved.
1da177e4
LT
763
764=== 5 Kbuild clean infrastructure
765
a07f6033 766"make clean" deletes most generated files in the obj tree where the kernel
1da177e4
LT
767is compiled. This includes generated files such as host programs.
768Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
769$(extra-y) and $(targets). They are all deleted during "make clean".
770Files matching the patterns "*.[oas]", "*.ko", plus some additional files
771generated by kbuild are deleted all over the kernel src tree when
772"make clean" is executed.
773
774Additional files can be specified in kbuild makefiles by use of $(clean-files).
775
776 Example:
777 #drivers/pci/Makefile
778 clean-files := devlist.h classlist.h
779
780When executing "make clean", the two files "devlist.h classlist.h" will
781be deleted. Kbuild will assume files to be in same relative directory as the
782Makefile except if an absolute path is specified (path starting with '/').
783
39e6e9cf
BH
784To delete a directory hierarchy use:
785
1da177e4
LT
786 Example:
787 #scripts/package/Makefile
788 clean-dirs := $(objtree)/debian/
789
790This will delete the directory debian, including all subdirectories.
791Kbuild will assume the directories to be in the same relative path as the
792Makefile if no absolute path is specified (path does not start with '/').
793
ef8ff89b
MM
794To exclude certain files from make clean, use the $(no-clean-files) variable.
795This is only a special case used in the top level Kbuild file:
796
797 Example:
798 #Kbuild
799 no-clean-files := $(bounds-file) $(offsets-file)
800
1da177e4
LT
801Usually kbuild descends down in subdirectories due to "obj-* := dir/",
802but in the architecture makefiles where the kbuild infrastructure
803is not sufficient this sometimes needs to be explicit.
804
805 Example:
25eb650a 806 #arch/x86/boot/Makefile
1da177e4
LT
807 subdir- := compressed/
808
809The above assignment instructs kbuild to descend down in the
810directory compressed/ when "make clean" is executed.
811
812To support the clean infrastructure in the Makefiles that builds the
813final bootimage there is an optional target named archclean:
814
815 Example:
25eb650a 816 #arch/x86/Makefile
1da177e4 817 archclean:
25eb650a 818 $(Q)$(MAKE) $(clean)=arch/x86/boot
1da177e4 819
25eb650a
WG
820When "make clean" is executed, make will descend down in arch/x86/boot,
821and clean as usual. The Makefile located in arch/x86/boot/ may use
1da177e4
LT
822the subdir- trick to descend further down.
823
824Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
825included in the top level makefile, and the kbuild infrastructure
826is not operational at that point.
827
828Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
829be visited during "make clean".
830
831=== 6 Architecture Makefiles
832
833The top level Makefile sets up the environment and does the preparation,
834before starting to descend down in the individual directories.
a07f6033
JE
835The top level makefile contains the generic part, whereas
836arch/$(ARCH)/Makefile contains what is required to set up kbuild
837for said architecture.
838To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
1da177e4
LT
839a few targets.
840
a07f6033
JE
841When kbuild executes, the following steps are followed (roughly):
8421) Configuration of the kernel => produce .config
1da177e4
LT
8432) Store kernel version in include/linux/version.h
8443) Symlink include/asm to include/asm-$(ARCH)
8454) Updating all other prerequisites to the target prepare:
846 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
8475) Recursively descend down in all directories listed in
848 init-* core* drivers-* net-* libs-* and build all targets.
a07f6033 849 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
39e6e9cf 8506) All object files are then linked and the resulting file vmlinux is
a07f6033 851 located at the root of the obj tree.
1da177e4
LT
852 The very first objects linked are listed in head-y, assigned by
853 arch/$(ARCH)/Makefile.
5c811e59 8547) Finally, the architecture-specific part does any required post processing
1da177e4
LT
855 and builds the final bootimage.
856 - This includes building boot records
5c811e59 857 - Preparing initrd images and the like
1da177e4
LT
858
859
860--- 6.1 Set variables to tweak the build to the architecture
861
862 LDFLAGS Generic $(LD) options
863
864 Flags used for all invocations of the linker.
865 Often specifying the emulation is sufficient.
866
867 Example:
868 #arch/s390/Makefile
869 LDFLAGS := -m elf_s390
f77bf014 870 Note: ldflags-y can be used to further customise
a9af3305 871 the flags used. See chapter 3.7.
39e6e9cf 872
1da177e4
LT
873 LDFLAGS_MODULE Options for $(LD) when linking modules
874
875 LDFLAGS_MODULE is used to set specific flags for $(LD) when
876 linking the .ko files used for modules.
877 Default is "-r", for relocatable output.
878
879 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
880
881 LDFLAGS_vmlinux is used to specify additional flags to pass to
a07f6033 882 the linker when linking the final vmlinux image.
1da177e4
LT
883 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
884
885 Example:
25eb650a 886 #arch/x86/Makefile
1da177e4
LT
887 LDFLAGS_vmlinux := -e stext
888
889 OBJCOPYFLAGS objcopy flags
890
891 When $(call if_changed,objcopy) is used to translate a .o file,
a07f6033 892 the flags specified in OBJCOPYFLAGS will be used.
1da177e4
LT
893 $(call if_changed,objcopy) is often used to generate raw binaries on
894 vmlinux.
895
896 Example:
897 #arch/s390/Makefile
898 OBJCOPYFLAGS := -O binary
899
900 #arch/s390/boot/Makefile
901 $(obj)/image: vmlinux FORCE
902 $(call if_changed,objcopy)
903
a07f6033 904 In this example, the binary $(obj)/image is a binary version of
1da177e4
LT
905 vmlinux. The usage of $(call if_changed,xxx) will be described later.
906
222d394d 907 KBUILD_AFLAGS $(AS) assembler flags
1da177e4
LT
908
909 Default value - see top level Makefile
910 Append or modify as required per architecture.
911
912 Example:
913 #arch/sparc64/Makefile
222d394d 914 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
1da177e4 915
a0f97e06 916 KBUILD_CFLAGS $(CC) compiler flags
1da177e4
LT
917
918 Default value - see top level Makefile
919 Append or modify as required per architecture.
920
a0f97e06 921 Often, the KBUILD_CFLAGS variable depends on the configuration.
1da177e4
LT
922
923 Example:
ff4eb04c
PB
924 #arch/x86/boot/compressed/Makefile
925 cflags-$(CONFIG_X86_32) := -march=i386
926 cflags-$(CONFIG_X86_64) := -mcmodel=small
a0f97e06 927 KBUILD_CFLAGS += $(cflags-y)
1da177e4
LT
928
929 Many arch Makefiles dynamically run the target C compiler to
930 probe supported options:
931
25eb650a 932 #arch/x86/Makefile
1da177e4
LT
933
934 ...
935 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
936 -march=pentium2,-march=i686)
937 ...
938 # Disable unit-at-a-time mode ...
a0f97e06 939 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
1da177e4
LT
940 ...
941
942
a07f6033 943 The first example utilises the trick that a config option expands
1da177e4
LT
944 to 'y' when selected.
945
80c00ba9 946 KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in
1da177e4 947
80c00ba9 948 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
1da177e4
LT
949 resident kernel code.
950
6588169d 951 KBUILD_AFLAGS_MODULE Options for $(AS) when building modules
1da177e4 952
6588169d
SR
953 $(KBUILD_AFLAGS_MODULE) is used to add arch specific options that
954 are used for $(AS).
955 From commandline AFLAGS_MODULE shall be used (see kbuild.txt).
1da177e4 956
80c00ba9
SR
957 KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in
958
959 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
960 resident kernel code.
961
6588169d
SR
962 KBUILD_CFLAGS_MODULE Options for $(CC) when building modules
963
964 $(KBUILD_CFLAGS_MODULE) is used to add arch specific options that
965 are used for $(CC).
966 From commandline CFLAGS_MODULE shall be used (see kbuild.txt).
967
968 KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules
969
970 $(KBUILD_LDFLAGS_MODULE) is used to add arch specific options
971 used when linking modules. This is often a linker script.
972 From commandline LDFLAGS_MODULE shall be used (see kbuild.txt).
39e6e9cf 973
40df759e
MM
974 KBUILD_ARFLAGS Options for $(AR) when creating archives
975
976 $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
977 mode) if this option is supported by $(AR).
978
052ad274
PA
979--- 6.2 Add prerequisites to archheaders:
980
981 The archheaders: rule is used to generate header files that
982 may be installed into user space by "make header_install" or
983 "make headers_install_all". In order to support
984 "make headers_install_all", this target has to be able to run
985 on an unconfigured tree, or a tree configured for another
986 architecture.
987
988 It is run before "make archprepare" when run on the
989 architecture itself.
990
991
992--- 6.3 Add prerequisites to archprepare:
1da177e4 993
a07f6033 994 The archprepare: rule is used to list prerequisites that need to be
1da177e4 995 built before starting to descend down in the subdirectories.
a07f6033 996 This is usually used for header files containing assembler constants.
1da177e4
LT
997
998 Example:
5bb78269
SR
999 #arch/arm/Makefile
1000 archprepare: maketools
1da177e4 1001
a07f6033 1002 In this example, the file target maketools will be processed
5bb78269 1003 before descending down in the subdirectories.
1da177e4
LT
1004 See also chapter XXX-TODO that describe how kbuild supports
1005 generating offset header files.
1006
1007
052ad274 1008--- 6.4 List directories to visit when descending
1da177e4
LT
1009
1010 An arch Makefile cooperates with the top Makefile to define variables
1011 which specify how to build the vmlinux file. Note that there is no
1012 corresponding arch-specific section for modules; the module-building
1013 machinery is all architecture-independent.
1014
39e6e9cf 1015
1da177e4
LT
1016 head-y, init-y, core-y, libs-y, drivers-y, net-y
1017
a07f6033
JE
1018 $(head-y) lists objects to be linked first in vmlinux.
1019 $(libs-y) lists directories where a lib.a archive can be located.
5c811e59 1020 The rest list directories where a built-in.o object file can be
a07f6033 1021 located.
1da177e4
LT
1022
1023 $(init-y) objects will be located after $(head-y).
1024 Then the rest follows in this order:
1025 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
1026
a07f6033 1027 The top level Makefile defines values for all generic directories,
5c811e59 1028 and arch/$(ARCH)/Makefile only adds architecture-specific directories.
1da177e4
LT
1029
1030 Example:
1031 #arch/sparc64/Makefile
1032 core-y += arch/sparc64/kernel/
1033 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
1034 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
1035
1036
052ad274 1037--- 6.5 Architecture-specific boot images
1da177e4
LT
1038
1039 An arch Makefile specifies goals that take the vmlinux file, compress
1040 it, wrap it in bootstrapping code, and copy the resulting files
1041 somewhere. This includes various kinds of installation commands.
1042 The actual goals are not standardized across architectures.
1043
1044 It is common to locate any additional processing in a boot/
1045 directory below arch/$(ARCH)/.
1046
1047 Kbuild does not provide any smart way to support building a
1048 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
1049 call make manually to build a target in boot/.
1050
1051 The recommended approach is to include shortcuts in
1052 arch/$(ARCH)/Makefile, and use the full path when calling down
1053 into the arch/$(ARCH)/boot/Makefile.
1054
1055 Example:
25eb650a
WG
1056 #arch/x86/Makefile
1057 boot := arch/x86/boot
1da177e4
LT
1058 bzImage: vmlinux
1059 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
1060
1061 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
1062 make in a subdirectory.
1063
5c811e59 1064 There are no rules for naming architecture-specific targets,
1da177e4 1065 but executing "make help" will list all relevant targets.
a07f6033 1066 To support this, $(archhelp) must be defined.
1da177e4
LT
1067
1068 Example:
25eb650a 1069 #arch/x86/Makefile
1da177e4
LT
1070 define archhelp
1071 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
39e6e9cf 1072 endif
1da177e4
LT
1073
1074 When make is executed without arguments, the first goal encountered
1075 will be built. In the top level Makefile the first goal present
1076 is all:.
a07f6033
JE
1077 An architecture shall always, per default, build a bootable image.
1078 In "make help", the default goal is highlighted with a '*'.
1da177e4
LT
1079 Add a new prerequisite to all: to select a default goal different
1080 from vmlinux.
1081
1082 Example:
25eb650a 1083 #arch/x86/Makefile
39e6e9cf 1084 all: bzImage
1da177e4
LT
1085
1086 When "make" is executed without arguments, bzImage will be built.
1087
052ad274 1088--- 6.6 Building non-kbuild targets
1da177e4
LT
1089
1090 extra-y
1091
1092 extra-y specify additional targets created in the current
1093 directory, in addition to any targets specified by obj-*.
1094
1095 Listing all targets in extra-y is required for two purposes:
1096 1) Enable kbuild to check changes in command lines
1097 - When $(call if_changed,xxx) is used
1098 2) kbuild knows what files to delete during "make clean"
1099
1100 Example:
25eb650a 1101 #arch/x86/kernel/Makefile
1da177e4
LT
1102 extra-y := head.o init_task.o
1103
a07f6033 1104 In this example, extra-y is used to list object files that
1da177e4
LT
1105 shall be built, but shall not be linked as part of built-in.o.
1106
39e6e9cf 1107
052ad274 1108--- 6.7 Commands useful for building a boot image
1da177e4
LT
1109
1110 Kbuild provides a few macros that are useful when building a
1111 boot image.
1112
1113 if_changed
1114
1115 if_changed is the infrastructure used for the following commands.
1116
1117 Usage:
1118 target: source(s) FORCE
1119 $(call if_changed,ld/objcopy/gzip)
1120
a07f6033 1121 When the rule is evaluated, it is checked to see if any files
5c811e59 1122 need an update, or the command line has changed since the last
1da177e4
LT
1123 invocation. The latter will force a rebuild if any options
1124 to the executable have changed.
1125 Any target that utilises if_changed must be listed in $(targets),
1126 otherwise the command line check will fail, and the target will
1127 always be built.
1128 Assignments to $(targets) are without $(obj)/ prefix.
1129 if_changed may be used in conjunction with custom commands as
052ad274 1130 defined in 6.8 "Custom kbuild commands".
49490571 1131
1da177e4 1132 Note: It is a typical mistake to forget the FORCE prerequisite.
49490571
PBG
1133 Another common pitfall is that whitespace is sometimes
1134 significant; for instance, the below will fail (note the extra space
1135 after the comma):
1136 target: source(s) FORCE
1137 #WRONG!# $(call if_changed, ld/objcopy/gzip)
1da177e4
LT
1138
1139 ld
a07f6033 1140 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
39e6e9cf 1141
1da177e4
LT
1142 objcopy
1143 Copy binary. Uses OBJCOPYFLAGS usually specified in
1144 arch/$(ARCH)/Makefile.
1145 OBJCOPYFLAGS_$@ may be used to set additional options.
1146
1147 gzip
1148 Compress target. Use maximum compression to compress target.
1149
1150 Example:
25eb650a 1151 #arch/x86/boot/Makefile
1da177e4
LT
1152 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1153 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1154
1155 targets += setup setup.o bootsect bootsect.o
1156 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1157 $(call if_changed,ld)
1158
a07f6033
JE
1159 In this example, there are two possible targets, requiring different
1160 options to the linker. The linker options are specified using the
1da177e4 1161 LDFLAGS_$@ syntax - one for each potential target.
5d3f083d 1162 $(targets) are assigned all potential targets, by which kbuild knows
1da177e4
LT
1163 the targets and will:
1164 1) check for commandline changes
1165 2) delete target during make clean
1166
1167 The ": %: %.o" part of the prerequisite is a shorthand that
1168 free us from listing the setup.o and bootsect.o files.
1169 Note: It is a common mistake to forget the "target :=" assignment,
1170 resulting in the target file being recompiled for no
1171 obvious reason.
1172
aab94339
DB
1173 dtc
1174 Create flattend device tree blob object suitable for linking
1175 into vmlinux. Device tree blobs linked into vmlinux are placed
1176 in an init section in the image. Platform code *must* copy the
1177 blob to non-init memory prior to calling unflatten_device_tree().
1178
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1179 To use this command, simply add *.dtb into obj-y or targets, or make
1180 some other target depend on %.dtb
aab94339 1181
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1182 A central rule exists to create $(obj)/%.dtb from $(src)/%.dts;
1183 architecture Makefiles do no need to explicitly write out that rule.
aab94339 1184
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1185 Example:
1186 targets += $(dtb-y)
1187 clean-files += *.dtb
1188 DTC_FLAGS ?= -p 1024
1da177e4 1189
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1190 dtc_cpp
1191 This is just like dtc as describe above, except that the C pre-
1192 processor is invoked upon the .dtsp file before compiling the result
1193 with dtc.
1194
1195 In order for build dependencies to work, all files compiled using
1196 dtc_cpp must use the C pre-processor's #include functionality and not
1197 dtc's /include/ functionality.
1198
1199 Using the C pre-processor allows use of #define to create named
1200 constants. In turn, the #defines will typically appear in a header
1201 file, which may be shared with regular C code. Since the dtc language
1202 represents a data structure rather than code in C syntax, similar
1203 restrictions are placed on a header file included by a device tree
1204 file as for a header file included by an assembly language file.
1205 In particular, the C pre-processor is passed -x assembler-with-cpp,
1206 which sets macro __ASSEMBLY__. __DTS__ is also set. These allow header
1207 files to restrict their content to that compatible with device tree
1208 source.
1209
1210 A central rule exists to create $(obj)/%.dtb from $(src)/%.dtsp;
1211 architecture Makefiles do no need to explicitly write out that rule.
1212
052ad274 1213--- 6.8 Custom kbuild commands
1da177e4 1214
a07f6033 1215 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
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1216 of a command is normally displayed.
1217 To enable this behaviour for custom commands kbuild requires
1218 two variables to be set:
1219 quiet_cmd_<command> - what shall be echoed
1220 cmd_<command> - the command to execute
1221
1222 Example:
1223 #
1224 quiet_cmd_image = BUILD $@
1225 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1226 $(obj)/vmlinux.bin > $@
1227
1228 targets += bzImage
1229 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1230 $(call if_changed,image)
1231 @echo 'Kernel: $@ is ready'
1232
a07f6033 1233 When updating the $(obj)/bzImage target, the line
1da177e4 1234
25eb650a 1235 BUILD arch/x86/boot/bzImage
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1236
1237 will be displayed with "make KBUILD_VERBOSE=0".
39e6e9cf 1238
1da177e4 1239
052ad274 1240--- 6.9 Preprocessing linker scripts
1da177e4 1241
a07f6033 1242 When the vmlinux image is built, the linker script
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1243 arch/$(ARCH)/kernel/vmlinux.lds is used.
1244 The script is a preprocessed variant of the file vmlinux.lds.S
1245 located in the same directory.
a07f6033 1246 kbuild knows .lds files and includes a rule *lds.S -> *lds.
39e6e9cf 1247
1da177e4 1248 Example:
25eb650a 1249 #arch/x86/kernel/Makefile
1da177e4 1250 always := vmlinux.lds
39e6e9cf 1251
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1252 #Makefile
1253 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
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1254
1255 The assignment to $(always) is used to tell kbuild to build the
a07f6033
JE
1256 target vmlinux.lds.
1257 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1da177e4 1258 specified options when building the target vmlinux.lds.
39e6e9cf 1259
a07f6033 1260 When building the *.lds target, kbuild uses the variables:
06c5040c 1261 KBUILD_CPPFLAGS : Set in top-level Makefile
f77bf014 1262 cppflags-y : May be set in the kbuild makefile
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1263 CPPFLAGS_$(@F) : Target specific flags.
1264 Note that the full filename is used in this
1265 assignment.
1266
1267 The kbuild infrastructure for *lds file are used in several
5c811e59 1268 architecture-specific files.
1da177e4 1269
052ad274 1270--- 6.10 Generic header files
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SR
1271
1272 The directory include/asm-generic contains the header files
1273 that may be shared between individual architectures.
1274 The recommended approach how to use a generic header file is
1275 to list the file in the Kbuild file.
1276 See "7.4 generic-y" for further info on syntax etc.
1277
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1278=== 7 Kbuild syntax for exported headers
1279
1280The kernel include a set of headers that is exported to userspace.
c95940f2 1281Many headers can be exported as-is but other headers require a
c7bb349e
SR
1282minimal pre-processing before they are ready for user-space.
1283The pre-processing does:
1284- drop kernel specific annotations
1285- drop include of compiler.h
c95940f2 1286- drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
c7bb349e 1287
c95940f2 1288Each relevant directory contains a file name "Kbuild" which specifies the
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SR
1289headers to be exported.
1290See subsequent chapter for the syntax of the Kbuild file.
1291
1292 --- 7.1 header-y
1293
1294 header-y specify header files to be exported.
1295
1296 Example:
1297 #include/linux/Kbuild
1298 header-y += usb/
1299 header-y += aio_abi.h
1300
1301 The convention is to list one file per line and
1302 preferably in alphabetic order.
1303
1304 header-y also specify which subdirectories to visit.
1305 A subdirectory is identified by a trailing '/' which
1306 can be seen in the example above for the usb subdirectory.
1307
1308 Subdirectories are visited before their parent directories.
1309
40f1d4c2 1310 --- 7.2 genhdr-y
c7bb349e 1311
40f1d4c2 1312 genhdr-y specifies generated files to be exported.
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1313 Generated files are special as they need to be looked
1314 up in another directory when doing 'make O=...' builds.
1315
1316 Example:
1317 #include/linux/Kbuild
40f1d4c2 1318 genhdr-y += version.h
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1319
1320 --- 7.3 destination-y
1321
1322 When an architecture have a set of exported headers that needs to be
1323 exported to a different directory destination-y is used.
1324 destination-y specify the destination directory for all exported
1325 headers in the file where it is present.
1326
1327 Example:
1328 #arch/xtensa/platforms/s6105/include/platform/Kbuild
1329 destination-y := include/linux
1330
1331 In the example above all exported headers in the Kbuild file
1332 will be located in the directory "include/linux" when exported.
1333
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1334 --- 7.4 generic-y
1335
1336 If an architecture uses a verbatim copy of a header from
1337 include/asm-generic then this is listed in the file
1338 arch/$(ARCH)/include/asm/Kbuild like this:
1339
1340 Example:
1341 #arch/x86/include/asm/Kbuild
1342 generic-y += termios.h
1343 generic-y += rtc.h
1344
1345 During the prepare phase of the build a wrapper include
1346 file is generated in the directory:
1347
1348 arch/$(ARCH)/include/generated/asm
1349
1350 When a header is exported where the architecture uses
1351 the generic header a similar wrapper is generated as part
1352 of the set of exported headers in the directory:
1353
1354 usr/include/asm
1355
1356 The generated wrapper will in both cases look like the following:
1357
1358 Example: termios.h
1359 #include <asm-generic/termios.h>
c7bb349e 1360
c7bb349e 1361=== 8 Kbuild Variables
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1362
1363The top Makefile exports the following variables:
1364
1365 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1366
1367 These variables define the current kernel version. A few arch
1368 Makefiles actually use these values directly; they should use
1369 $(KERNELRELEASE) instead.
1370
1371 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1372 three-part version number, such as "2", "4", and "0". These three
1373 values are always numeric.
1374
1375 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1376 or additional patches. It is usually some non-numeric string
1377 such as "-pre4", and is often blank.
1378
1379 KERNELRELEASE
1380
1381 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1382 for constructing installation directory names or showing in
1383 version strings. Some arch Makefiles use it for this purpose.
1384
1385 ARCH
1386
1387 This variable defines the target architecture, such as "i386",
1388 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1389 determine which files to compile.
1390
1391 By default, the top Makefile sets $(ARCH) to be the same as the
1392 host system architecture. For a cross build, a user may
1393 override the value of $(ARCH) on the command line:
1394
1395 make ARCH=m68k ...
1396
1397
1398 INSTALL_PATH
1399
1400 This variable defines a place for the arch Makefiles to install
1401 the resident kernel image and System.map file.
5c811e59 1402 Use this for architecture-specific install targets.
1da177e4
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1403
1404 INSTALL_MOD_PATH, MODLIB
1405
1406 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1407 installation. This variable is not defined in the Makefile but
1408 may be passed in by the user if desired.
1409
1410 $(MODLIB) specifies the directory for module installation.
1411 The top Makefile defines $(MODLIB) to
1412 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1413 override this value on the command line if desired.
1414
ac031f26
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1415 INSTALL_MOD_STRIP
1416
1417 If this variable is specified, will cause modules to be stripped
1418 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1419 default option --strip-debug will be used. Otherwise,
177b241d
GE
1420 INSTALL_MOD_STRIP value will be used as the option(s) to the strip
1421 command.
ac031f26
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1422
1423
c7bb349e 1424=== 9 Makefile language
1da177e4 1425
a07f6033 1426The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1da177e4
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1427use only the documented features of GNU Make, but they do use many
1428GNU extensions.
1429
1430GNU Make supports elementary list-processing functions. The kernel
1431Makefiles use a novel style of list building and manipulation with few
1432"if" statements.
1433
1434GNU Make has two assignment operators, ":=" and "=". ":=" performs
1435immediate evaluation of the right-hand side and stores an actual string
1436into the left-hand side. "=" is like a formula definition; it stores the
1437right-hand side in an unevaluated form and then evaluates this form each
1438time the left-hand side is used.
1439
1440There are some cases where "=" is appropriate. Usually, though, ":="
1441is the right choice.
1442
c7bb349e 1443=== 10 Credits
1da177e4
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1444
1445Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1446Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1447Updates by Sam Ravnborg <sam@ravnborg.org>
a07f6033 1448Language QA by Jan Engelhardt <jengelh@gmx.de>
1da177e4 1449
c7bb349e 1450=== 11 TODO
1da177e4 1451
a07f6033 1452- Describe how kbuild supports shipped files with _shipped.
1da177e4
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1453- Generating offset header files.
1454- Add more variables to section 7?
1455
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1456
1457