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1 | Linux Kernel Makefiles |
2 | ||
3 | This document describes the Linux kernel Makefiles. | |
4 | ||
5 | === Table of Contents | |
6 | ||
7 | === 1 Overview | |
8 | === 2 Who does what | |
9 | === 3 The kbuild files | |
10 | --- 3.1 Goal definitions | |
11 | --- 3.2 Built-in object goals - obj-y | |
12 | --- 3.3 Loadable module goals - obj-m | |
13 | --- 3.4 Objects which export symbols | |
14 | --- 3.5 Library file goals - lib-y | |
15 | --- 3.6 Descending down in directories | |
16 | --- 3.7 Compilation flags | |
17 | --- 3.8 Command line dependency | |
18 | --- 3.9 Dependency tracking | |
19 | --- 3.10 Special Rules | |
20 | ||
21 | === 4 Host Program support | |
22 | --- 4.1 Simple Host Program | |
23 | --- 4.2 Composite Host Programs | |
24 | --- 4.3 Defining shared libraries | |
25 | --- 4.4 Using C++ for host programs | |
26 | --- 4.5 Controlling compiler options for host programs | |
27 | --- 4.6 When host programs are actually built | |
28 | --- 4.7 Using hostprogs-$(CONFIG_FOO) | |
29 | ||
30 | === 5 Kbuild clean infrastructure | |
31 | ||
32 | === 6 Architecture Makefiles | |
33 | --- 6.1 Set variables to tweak the build to the architecture | |
34 | --- 6.2 Add prerequisites to prepare: | |
35 | --- 6.3 List directories to visit when descending | |
36 | --- 6.4 Architecture specific boot images | |
37 | --- 6.5 Building non-kbuild targets | |
38 | --- 6.6 Commands useful for building a boot image | |
39 | --- 6.7 Custom kbuild commands | |
40 | --- 6.8 Preprocessing linker scripts | |
41 | --- 6.9 $(CC) support functions | |
42 | ||
43 | === 7 Kbuild Variables | |
44 | === 8 Makefile language | |
45 | === 9 Credits | |
46 | === 10 TODO | |
47 | ||
48 | === 1 Overview | |
49 | ||
50 | The Makefiles have five parts: | |
51 | ||
52 | Makefile the top Makefile. | |
53 | .config the kernel configuration file. | |
54 | arch/$(ARCH)/Makefile the arch Makefile. | |
55 | scripts/Makefile.* common rules etc. for all kbuild Makefiles. | |
56 | kbuild Makefiles there are about 500 of these. | |
57 | ||
58 | The top Makefile reads the .config file, which comes from the kernel | |
59 | configuration process. | |
60 | ||
61 | The top Makefile is responsible for building two major products: vmlinux | |
62 | (the resident kernel image) and modules (any module files). | |
63 | It builds these goals by recursively descending into the subdirectories of | |
64 | the kernel source tree. | |
65 | The list of subdirectories which are visited depends upon the kernel | |
66 | configuration. The top Makefile textually includes an arch Makefile | |
67 | with the name arch/$(ARCH)/Makefile. The arch Makefile supplies | |
68 | architecture-specific information to the top Makefile. | |
69 | ||
70 | Each subdirectory has a kbuild Makefile which carries out the commands | |
71 | passed down from above. The kbuild Makefile uses information from the | |
72 | .config file to construct various file lists used by kbuild to build | |
73 | any built-in or modular targets. | |
74 | ||
75 | scripts/Makefile.* contains all the definitions/rules etc. that | |
76 | are used to build the kernel based on the kbuild makefiles. | |
77 | ||
78 | ||
79 | === 2 Who does what | |
80 | ||
81 | People have four different relationships with the kernel Makefiles. | |
82 | ||
83 | *Users* are people who build kernels. These people type commands such as | |
84 | "make menuconfig" or "make". They usually do not read or edit | |
85 | any kernel Makefiles (or any other source files). | |
86 | ||
87 | *Normal developers* are people who work on features such as device | |
88 | drivers, file systems, and network protocols. These people need to | |
89 | maintain the kbuild Makefiles for the subsystem that they are | |
90 | working on. In order to do this effectively, they need some overall | |
91 | knowledge about the kernel Makefiles, plus detailed knowledge about the | |
92 | public interface for kbuild. | |
93 | ||
94 | *Arch developers* are people who work on an entire architecture, such | |
95 | as sparc or ia64. Arch developers need to know about the arch Makefile | |
96 | as well as kbuild Makefiles. | |
97 | ||
98 | *Kbuild developers* are people who work on the kernel build system itself. | |
99 | These people need to know about all aspects of the kernel Makefiles. | |
100 | ||
101 | This document is aimed towards normal developers and arch developers. | |
102 | ||
103 | ||
104 | === 3 The kbuild files | |
105 | ||
106 | Most Makefiles within the kernel are kbuild Makefiles that use the | |
107 | kbuild infrastructure. This chapter introduce the syntax used in the | |
108 | kbuild makefiles. | |
109 | The preferred name for the kbuild files is 'Kbuild' but 'Makefile' will | |
110 | continue to be supported. All new developmen is expected to use the | |
111 | Kbuild filename. | |
112 | ||
113 | Section 3.1 "Goal definitions" is a quick intro, further chapters provide | |
114 | more details, with real examples. | |
115 | ||
116 | --- 3.1 Goal definitions | |
117 | ||
118 | Goal definitions are the main part (heart) of the kbuild Makefile. | |
119 | These lines define the files to be built, any special compilation | |
120 | options, and any subdirectories to be entered recursively. | |
121 | ||
122 | The most simple kbuild makefile contains one line: | |
123 | ||
124 | Example: | |
125 | obj-y += foo.o | |
126 | ||
127 | This tell kbuild that there is one object in that directory named | |
128 | foo.o. foo.o will be built from foo.c or foo.S. | |
129 | ||
130 | If foo.o shall be built as a module, the variable obj-m is used. | |
131 | Therefore the following pattern is often used: | |
132 | ||
133 | Example: | |
134 | obj-$(CONFIG_FOO) += foo.o | |
135 | ||
136 | $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module). | |
137 | If CONFIG_FOO is neither y nor m, then the file will not be compiled | |
138 | nor linked. | |
139 | ||
140 | --- 3.2 Built-in object goals - obj-y | |
141 | ||
142 | The kbuild Makefile specifies object files for vmlinux | |
143 | in the lists $(obj-y). These lists depend on the kernel | |
144 | configuration. | |
145 | ||
146 | Kbuild compiles all the $(obj-y) files. It then calls | |
147 | "$(LD) -r" to merge these files into one built-in.o file. | |
148 | built-in.o is later linked into vmlinux by the parent Makefile. | |
149 | ||
150 | The order of files in $(obj-y) is significant. Duplicates in | |
151 | the lists are allowed: the first instance will be linked into | |
152 | built-in.o and succeeding instances will be ignored. | |
153 | ||
154 | Link order is significant, because certain functions | |
155 | (module_init() / __initcall) will be called during boot in the | |
156 | order they appear. So keep in mind that changing the link | |
157 | order may e.g. change the order in which your SCSI | |
158 | controllers are detected, and thus you disks are renumbered. | |
159 | ||
160 | Example: | |
161 | #drivers/isdn/i4l/Makefile | |
162 | # Makefile for the kernel ISDN subsystem and device drivers. | |
163 | # Each configuration option enables a list of files. | |
164 | obj-$(CONFIG_ISDN) += isdn.o | |
165 | obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o | |
166 | ||
167 | --- 3.3 Loadable module goals - obj-m | |
168 | ||
169 | $(obj-m) specify object files which are built as loadable | |
170 | kernel modules. | |
171 | ||
172 | A module may be built from one source file or several source | |
173 | files. In the case of one source file, the kbuild makefile | |
174 | simply adds the file to $(obj-m). | |
175 | ||
176 | Example: | |
177 | #drivers/isdn/i4l/Makefile | |
178 | obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o | |
179 | ||
180 | Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm' | |
181 | ||
182 | If a kernel module is built from several source files, you specify | |
183 | that you want to build a module in the same way as above. | |
184 | ||
185 | Kbuild needs to know which the parts that you want to build your | |
186 | module from, so you have to tell it by setting an | |
187 | $(<module_name>-objs) variable. | |
188 | ||
189 | Example: | |
190 | #drivers/isdn/i4l/Makefile | |
191 | obj-$(CONFIG_ISDN) += isdn.o | |
192 | isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o | |
193 | ||
194 | In this example, the module name will be isdn.o. Kbuild will | |
195 | compile the objects listed in $(isdn-objs) and then run | |
196 | "$(LD) -r" on the list of these files to generate isdn.o. | |
197 | ||
198 | Kbuild recognises objects used for composite objects by the suffix | |
199 | -objs, and the suffix -y. This allows the Makefiles to use | |
200 | the value of a CONFIG_ symbol to determine if an object is part | |
201 | of a composite object. | |
202 | ||
203 | Example: | |
204 | #fs/ext2/Makefile | |
205 | obj-$(CONFIG_EXT2_FS) += ext2.o | |
206 | ext2-y := balloc.o bitmap.o | |
207 | ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o | |
208 | ||
209 | In this example xattr.o is only part of the composite object | |
210 | ext2.o, if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'. | |
211 | ||
212 | Note: Of course, when you are building objects into the kernel, | |
213 | the syntax above will also work. So, if you have CONFIG_EXT2_FS=y, | |
214 | kbuild will build an ext2.o file for you out of the individual | |
215 | parts and then link this into built-in.o, as you would expect. | |
216 | ||
217 | --- 3.4 Objects which export symbols | |
218 | ||
219 | No special notation is required in the makefiles for | |
220 | modules exporting symbols. | |
221 | ||
222 | --- 3.5 Library file goals - lib-y | |
223 | ||
224 | Objects listed with obj-* are used for modules or | |
225 | combined in a built-in.o for that specific directory. | |
226 | There is also the possibility to list objects that will | |
227 | be included in a library, lib.a. | |
228 | All objects listed with lib-y are combined in a single | |
229 | library for that directory. | |
230 | Objects that are listed in obj-y and additional listed in | |
231 | lib-y will not be included in the library, since they will anyway | |
232 | be accessible. | |
233 | For consistency objects listed in lib-m will be included in lib.a. | |
234 | ||
235 | Note that the same kbuild makefile may list files to be built-in | |
236 | and to be part of a library. Therefore the same directory | |
237 | may contain both a built-in.o and a lib.a file. | |
238 | ||
239 | Example: | |
240 | #arch/i386/lib/Makefile | |
241 | lib-y := checksum.o delay.o | |
242 | ||
243 | This will create a library lib.a based on checksum.o and delay.o. | |
244 | For kbuild to actually recognize that there is a lib.a being build | |
245 | the directory shall be listed in libs-y. | |
246 | See also "6.3 List directories to visit when descending". | |
247 | ||
248 | Usage of lib-y is normally restricted to lib/ and arch/*/lib. | |
249 | ||
250 | --- 3.6 Descending down in directories | |
251 | ||
252 | A Makefile is only responsible for building objects in its own | |
253 | directory. Files in subdirectories should be taken care of by | |
254 | Makefiles in these subdirs. The build system will automatically | |
255 | invoke make recursively in subdirectories, provided you let it know of | |
256 | them. | |
257 | ||
258 | To do so obj-y and obj-m are used. | |
259 | ext2 lives in a separate directory, and the Makefile present in fs/ | |
260 | tells kbuild to descend down using the following assignment. | |
261 | ||
262 | Example: | |
263 | #fs/Makefile | |
264 | obj-$(CONFIG_EXT2_FS) += ext2/ | |
265 | ||
266 | If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular) | |
267 | the corresponding obj- variable will be set, and kbuild will descend | |
268 | down in the ext2 directory. | |
269 | Kbuild only uses this information to decide that it needs to visit | |
270 | the directory, it is the Makefile in the subdirectory that | |
271 | specifies what is modules and what is built-in. | |
272 | ||
273 | It is good practice to use a CONFIG_ variable when assigning directory | |
274 | names. This allows kbuild to totally skip the directory if the | |
275 | corresponding CONFIG_ option is neither 'y' nor 'm'. | |
276 | ||
277 | --- 3.7 Compilation flags | |
278 | ||
279 | EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS | |
280 | ||
281 | All the EXTRA_ variables apply only to the kbuild makefile | |
282 | where they are assigned. The EXTRA_ variables apply to all | |
283 | commands executed in the kbuild makefile. | |
284 | ||
285 | $(EXTRA_CFLAGS) specifies options for compiling C files with | |
286 | $(CC). | |
287 | ||
288 | Example: | |
289 | # drivers/sound/emu10k1/Makefile | |
290 | EXTRA_CFLAGS += -I$(obj) | |
291 | ifdef DEBUG | |
292 | EXTRA_CFLAGS += -DEMU10K1_DEBUG | |
293 | endif | |
294 | ||
295 | ||
296 | This variable is necessary because the top Makefile owns the | |
297 | variable $(CFLAGS) and uses it for compilation flags for the | |
298 | entire tree. | |
299 | ||
300 | $(EXTRA_AFLAGS) is a similar string for per-directory options | |
301 | when compiling assembly language source. | |
302 | ||
303 | Example: | |
304 | #arch/x86_64/kernel/Makefile | |
305 | EXTRA_AFLAGS := -traditional | |
306 | ||
307 | ||
308 | $(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for | |
309 | per-directory options to $(LD) and $(AR). | |
310 | ||
311 | Example: | |
312 | #arch/m68k/fpsp040/Makefile | |
313 | EXTRA_LDFLAGS := -x | |
314 | ||
315 | CFLAGS_$@, AFLAGS_$@ | |
316 | ||
317 | CFLAGS_$@ and AFLAGS_$@ only apply to commands in current | |
318 | kbuild makefile. | |
319 | ||
320 | $(CFLAGS_$@) specifies per-file options for $(CC). The $@ | |
321 | part has a literal value which specifies the file that it is for. | |
322 | ||
323 | Example: | |
324 | # drivers/scsi/Makefile | |
325 | CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF | |
326 | CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \ | |
327 | -DGDTH_STATISTICS | |
328 | CFLAGS_seagate.o = -DARBITRATE -DPARITY -DSEAGATE_USE_ASM | |
329 | ||
330 | These three lines specify compilation flags for aha152x.o, | |
331 | gdth.o, and seagate.o | |
332 | ||
333 | $(AFLAGS_$@) is a similar feature for source files in assembly | |
334 | languages. | |
335 | ||
336 | Example: | |
337 | # arch/arm/kernel/Makefile | |
338 | AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional | |
339 | AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional | |
340 | ||
341 | --- 3.9 Dependency tracking | |
342 | ||
343 | Kbuild tracks dependencies on the following: | |
344 | 1) All prerequisite files (both *.c and *.h) | |
345 | 2) CONFIG_ options used in all prerequisite files | |
346 | 3) Command-line used to compile target | |
347 | ||
348 | Thus, if you change an option to $(CC) all affected files will | |
349 | be re-compiled. | |
350 | ||
351 | --- 3.10 Special Rules | |
352 | ||
353 | Special rules are used when the kbuild infrastructure does | |
354 | not provide the required support. A typical example is | |
355 | header files generated during the build process. | |
356 | Another example is the architecture specific Makefiles which | |
357 | needs special rules to prepare boot images etc. | |
358 | ||
359 | Special rules are written as normal Make rules. | |
360 | Kbuild is not executing in the directory where the Makefile is | |
361 | located, so all special rules shall provide a relative | |
362 | path to prerequisite files and target files. | |
363 | ||
364 | Two variables are used when defining special rules: | |
365 | ||
366 | $(src) | |
367 | $(src) is a relative path which points to the directory | |
368 | where the Makefile is located. Always use $(src) when | |
369 | referring to files located in the src tree. | |
370 | ||
371 | $(obj) | |
372 | $(obj) is a relative path which points to the directory | |
373 | where the target is saved. Always use $(obj) when | |
374 | referring to generated files. | |
375 | ||
376 | Example: | |
377 | #drivers/scsi/Makefile | |
378 | $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl | |
379 | $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl | |
380 | ||
381 | This is a special rule, following the normal syntax | |
382 | required by make. | |
383 | The target file depends on two prerequisite files. References | |
384 | to the target file are prefixed with $(obj), references | |
385 | to prerequisites are referenced with $(src) (because they are not | |
386 | generated files). | |
387 | ||
388 | ||
389 | === 4 Host Program support | |
390 | ||
391 | Kbuild supports building executables on the host for use during the | |
392 | compilation stage. | |
393 | Two steps are required in order to use a host executable. | |
394 | ||
395 | The first step is to tell kbuild that a host program exists. This is | |
396 | done utilising the variable hostprogs-y. | |
397 | ||
398 | The second step is to add an explicit dependency to the executable. | |
399 | This can be done in two ways. Either add the dependency in a rule, | |
400 | or utilise the variable $(always). | |
401 | Both possibilities are described in the following. | |
402 | ||
403 | --- 4.1 Simple Host Program | |
404 | ||
405 | In some cases there is a need to compile and run a program on the | |
406 | computer where the build is running. | |
407 | The following line tells kbuild that the program bin2hex shall be | |
408 | built on the build host. | |
409 | ||
410 | Example: | |
411 | hostprogs-y := bin2hex | |
412 | ||
413 | Kbuild assumes in the above example that bin2hex is made from a single | |
414 | c-source file named bin2hex.c located in the same directory as | |
415 | the Makefile. | |
416 | ||
417 | --- 4.2 Composite Host Programs | |
418 | ||
419 | Host programs can be made up based on composite objects. | |
420 | The syntax used to define composite objects for host programs is | |
421 | similar to the syntax used for kernel objects. | |
422 | $(<executeable>-objs) list all objects used to link the final | |
423 | executable. | |
424 | ||
425 | Example: | |
426 | #scripts/lxdialog/Makefile | |
427 | hostprogs-y := lxdialog | |
428 | lxdialog-objs := checklist.o lxdialog.o | |
429 | ||
430 | Objects with extension .o are compiled from the corresponding .c | |
431 | files. In the above example checklist.c is compiled to checklist.o | |
432 | and lxdialog.c is compiled to lxdialog.o. | |
433 | Finally the two .o files are linked to the executable, lxdialog. | |
434 | Note: The syntax <executable>-y is not permitted for host-programs. | |
435 | ||
436 | --- 4.3 Defining shared libraries | |
437 | ||
438 | Objects with extension .so are considered shared libraries, and | |
439 | will be compiled as position independent objects. | |
440 | Kbuild provides support for shared libraries, but the usage | |
441 | shall be restricted. | |
442 | In the following example the libkconfig.so shared library is used | |
443 | to link the executable conf. | |
444 | ||
445 | Example: | |
446 | #scripts/kconfig/Makefile | |
447 | hostprogs-y := conf | |
448 | conf-objs := conf.o libkconfig.so | |
449 | libkconfig-objs := expr.o type.o | |
450 | ||
451 | Shared libraries always require a corresponding -objs line, and | |
452 | in the example above the shared library libkconfig is composed by | |
453 | the two objects expr.o and type.o. | |
454 | expr.o and type.o will be built as position independent code and | |
455 | linked as a shared library libkconfig.so. C++ is not supported for | |
456 | shared libraries. | |
457 | ||
458 | --- 4.4 Using C++ for host programs | |
459 | ||
460 | kbuild offers support for host programs written in C++. This was | |
461 | introduced solely to support kconfig, and is not recommended | |
462 | for general use. | |
463 | ||
464 | Example: | |
465 | #scripts/kconfig/Makefile | |
466 | hostprogs-y := qconf | |
467 | qconf-cxxobjs := qconf.o | |
468 | ||
469 | In the example above the executable is composed of the C++ file | |
470 | qconf.cc - identified by $(qconf-cxxobjs). | |
471 | ||
472 | If qconf is composed by a mixture of .c and .cc files, then an | |
473 | additional line can be used to identify this. | |
474 | ||
475 | Example: | |
476 | #scripts/kconfig/Makefile | |
477 | hostprogs-y := qconf | |
478 | qconf-cxxobjs := qconf.o | |
479 | qconf-objs := check.o | |
480 | ||
481 | --- 4.5 Controlling compiler options for host programs | |
482 | ||
483 | When compiling host programs, it is possible to set specific flags. | |
484 | The programs will always be compiled utilising $(HOSTCC) passed | |
485 | the options specified in $(HOSTCFLAGS). | |
486 | To set flags that will take effect for all host programs created | |
487 | in that Makefile use the variable HOST_EXTRACFLAGS. | |
488 | ||
489 | Example: | |
490 | #scripts/lxdialog/Makefile | |
491 | HOST_EXTRACFLAGS += -I/usr/include/ncurses | |
492 | ||
493 | To set specific flags for a single file the following construction | |
494 | is used: | |
495 | ||
496 | Example: | |
497 | #arch/ppc64/boot/Makefile | |
498 | HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE) | |
499 | ||
500 | It is also possible to specify additional options to the linker. | |
501 | ||
502 | Example: | |
503 | #scripts/kconfig/Makefile | |
504 | HOSTLOADLIBES_qconf := -L$(QTDIR)/lib | |
505 | ||
506 | When linking qconf it will be passed the extra option "-L$(QTDIR)/lib". | |
507 | ||
508 | --- 4.6 When host programs are actually built | |
509 | ||
510 | Kbuild will only build host-programs when they are referenced | |
511 | as a prerequisite. | |
512 | This is possible in two ways: | |
513 | ||
514 | (1) List the prerequisite explicitly in a special rule. | |
515 | ||
516 | Example: | |
517 | #drivers/pci/Makefile | |
518 | hostprogs-y := gen-devlist | |
519 | $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist | |
520 | ( cd $(obj); ./gen-devlist ) < $< | |
521 | ||
522 | The target $(obj)/devlist.h will not be built before | |
523 | $(obj)/gen-devlist is updated. Note that references to | |
524 | the host programs in special rules must be prefixed with $(obj). | |
525 | ||
526 | (2) Use $(always) | |
527 | When there is no suitable special rule, and the host program | |
528 | shall be built when a makefile is entered, the $(always) | |
529 | variable shall be used. | |
530 | ||
531 | Example: | |
532 | #scripts/lxdialog/Makefile | |
533 | hostprogs-y := lxdialog | |
534 | always := $(hostprogs-y) | |
535 | ||
536 | This will tell kbuild to build lxdialog even if not referenced in | |
537 | any rule. | |
538 | ||
539 | --- 4.7 Using hostprogs-$(CONFIG_FOO) | |
540 | ||
541 | A typcal pattern in a Kbuild file lok like this: | |
542 | ||
543 | Example: | |
544 | #scripts/Makefile | |
545 | hostprogs-$(CONFIG_KALLSYMS) += kallsyms | |
546 | ||
547 | Kbuild knows about both 'y' for built-in and 'm' for module. | |
548 | So if a config symbol evaluate to 'm', kbuild will still build | |
549 | the binary. In other words Kbuild handle hostprogs-m exactly | |
550 | like hostprogs-y. But only hostprogs-y is recommend used | |
551 | when no CONFIG symbol are involved. | |
552 | ||
553 | === 5 Kbuild clean infrastructure | |
554 | ||
555 | "make clean" deletes most generated files in the src tree where the kernel | |
556 | is compiled. This includes generated files such as host programs. | |
557 | Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always), | |
558 | $(extra-y) and $(targets). They are all deleted during "make clean". | |
559 | Files matching the patterns "*.[oas]", "*.ko", plus some additional files | |
560 | generated by kbuild are deleted all over the kernel src tree when | |
561 | "make clean" is executed. | |
562 | ||
563 | Additional files can be specified in kbuild makefiles by use of $(clean-files). | |
564 | ||
565 | Example: | |
566 | #drivers/pci/Makefile | |
567 | clean-files := devlist.h classlist.h | |
568 | ||
569 | When executing "make clean", the two files "devlist.h classlist.h" will | |
570 | be deleted. Kbuild will assume files to be in same relative directory as the | |
571 | Makefile except if an absolute path is specified (path starting with '/'). | |
572 | ||
573 | To delete a directory hirachy use: | |
574 | Example: | |
575 | #scripts/package/Makefile | |
576 | clean-dirs := $(objtree)/debian/ | |
577 | ||
578 | This will delete the directory debian, including all subdirectories. | |
579 | Kbuild will assume the directories to be in the same relative path as the | |
580 | Makefile if no absolute path is specified (path does not start with '/'). | |
581 | ||
582 | Usually kbuild descends down in subdirectories due to "obj-* := dir/", | |
583 | but in the architecture makefiles where the kbuild infrastructure | |
584 | is not sufficient this sometimes needs to be explicit. | |
585 | ||
586 | Example: | |
587 | #arch/i386/boot/Makefile | |
588 | subdir- := compressed/ | |
589 | ||
590 | The above assignment instructs kbuild to descend down in the | |
591 | directory compressed/ when "make clean" is executed. | |
592 | ||
593 | To support the clean infrastructure in the Makefiles that builds the | |
594 | final bootimage there is an optional target named archclean: | |
595 | ||
596 | Example: | |
597 | #arch/i386/Makefile | |
598 | archclean: | |
599 | $(Q)$(MAKE) $(clean)=arch/i386/boot | |
600 | ||
601 | When "make clean" is executed, make will descend down in arch/i386/boot, | |
602 | and clean as usual. The Makefile located in arch/i386/boot/ may use | |
603 | the subdir- trick to descend further down. | |
604 | ||
605 | Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is | |
606 | included in the top level makefile, and the kbuild infrastructure | |
607 | is not operational at that point. | |
608 | ||
609 | Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will | |
610 | be visited during "make clean". | |
611 | ||
612 | === 6 Architecture Makefiles | |
613 | ||
614 | The top level Makefile sets up the environment and does the preparation, | |
615 | before starting to descend down in the individual directories. | |
616 | The top level makefile contains the generic part, whereas the | |
617 | arch/$(ARCH)/Makefile contains what is required to set-up kbuild | |
618 | to the said architecture. | |
619 | To do so arch/$(ARCH)/Makefile sets a number of variables, and defines | |
620 | a few targets. | |
621 | ||
622 | When kbuild executes the following steps are followed (roughly): | |
623 | 1) Configuration of the kernel => produced .config | |
624 | 2) Store kernel version in include/linux/version.h | |
625 | 3) Symlink include/asm to include/asm-$(ARCH) | |
626 | 4) Updating all other prerequisites to the target prepare: | |
627 | - Additional prerequisites are specified in arch/$(ARCH)/Makefile | |
628 | 5) Recursively descend down in all directories listed in | |
629 | init-* core* drivers-* net-* libs-* and build all targets. | |
630 | - The value of the above variables are extended in arch/$(ARCH)/Makefile. | |
631 | 6) All object files are then linked and the resulting file vmlinux is | |
632 | located at the root of the src tree. | |
633 | The very first objects linked are listed in head-y, assigned by | |
634 | arch/$(ARCH)/Makefile. | |
635 | 7) Finally the architecture specific part does any required post processing | |
636 | and builds the final bootimage. | |
637 | - This includes building boot records | |
638 | - Preparing initrd images and the like | |
639 | ||
640 | ||
641 | --- 6.1 Set variables to tweak the build to the architecture | |
642 | ||
643 | LDFLAGS Generic $(LD) options | |
644 | ||
645 | Flags used for all invocations of the linker. | |
646 | Often specifying the emulation is sufficient. | |
647 | ||
648 | Example: | |
649 | #arch/s390/Makefile | |
650 | LDFLAGS := -m elf_s390 | |
651 | Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise | |
652 | the flags used. See chapter 7. | |
653 | ||
654 | LDFLAGS_MODULE Options for $(LD) when linking modules | |
655 | ||
656 | LDFLAGS_MODULE is used to set specific flags for $(LD) when | |
657 | linking the .ko files used for modules. | |
658 | Default is "-r", for relocatable output. | |
659 | ||
660 | LDFLAGS_vmlinux Options for $(LD) when linking vmlinux | |
661 | ||
662 | LDFLAGS_vmlinux is used to specify additional flags to pass to | |
663 | the linker when linking the final vmlinux. | |
664 | LDFLAGS_vmlinux uses the LDFLAGS_$@ support. | |
665 | ||
666 | Example: | |
667 | #arch/i386/Makefile | |
668 | LDFLAGS_vmlinux := -e stext | |
669 | ||
670 | OBJCOPYFLAGS objcopy flags | |
671 | ||
672 | When $(call if_changed,objcopy) is used to translate a .o file, | |
673 | then the flags specified in OBJCOPYFLAGS will be used. | |
674 | $(call if_changed,objcopy) is often used to generate raw binaries on | |
675 | vmlinux. | |
676 | ||
677 | Example: | |
678 | #arch/s390/Makefile | |
679 | OBJCOPYFLAGS := -O binary | |
680 | ||
681 | #arch/s390/boot/Makefile | |
682 | $(obj)/image: vmlinux FORCE | |
683 | $(call if_changed,objcopy) | |
684 | ||
685 | In this example the binary $(obj)/image is a binary version of | |
686 | vmlinux. The usage of $(call if_changed,xxx) will be described later. | |
687 | ||
688 | AFLAGS $(AS) assembler flags | |
689 | ||
690 | Default value - see top level Makefile | |
691 | Append or modify as required per architecture. | |
692 | ||
693 | Example: | |
694 | #arch/sparc64/Makefile | |
695 | AFLAGS += -m64 -mcpu=ultrasparc | |
696 | ||
697 | CFLAGS $(CC) compiler flags | |
698 | ||
699 | Default value - see top level Makefile | |
700 | Append or modify as required per architecture. | |
701 | ||
702 | Often the CFLAGS variable depends on the configuration. | |
703 | ||
704 | Example: | |
705 | #arch/i386/Makefile | |
706 | cflags-$(CONFIG_M386) += -march=i386 | |
707 | CFLAGS += $(cflags-y) | |
708 | ||
709 | Many arch Makefiles dynamically run the target C compiler to | |
710 | probe supported options: | |
711 | ||
712 | #arch/i386/Makefile | |
713 | ||
714 | ... | |
715 | cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\ | |
716 | -march=pentium2,-march=i686) | |
717 | ... | |
718 | # Disable unit-at-a-time mode ... | |
719 | CFLAGS += $(call cc-option,-fno-unit-at-a-time) | |
720 | ... | |
721 | ||
722 | ||
723 | The first examples utilises the trick that a config option expands | |
724 | to 'y' when selected. | |
725 | ||
726 | CFLAGS_KERNEL $(CC) options specific for built-in | |
727 | ||
728 | $(CFLAGS_KERNEL) contains extra C compiler flags used to compile | |
729 | resident kernel code. | |
730 | ||
731 | CFLAGS_MODULE $(CC) options specific for modules | |
732 | ||
733 | $(CFLAGS_MODULE) contains extra C compiler flags used to compile code | |
734 | for loadable kernel modules. | |
735 | ||
736 | ||
737 | --- 6.2 Add prerequisites to prepare: | |
738 | ||
739 | The prepare: rule is used to list prerequisites that needs to be | |
740 | built before starting to descend down in the subdirectories. | |
741 | This is usual header files containing assembler constants. | |
742 | ||
743 | Example: | |
744 | #arch/s390/Makefile | |
745 | prepare: include/asm-$(ARCH)/offsets.h | |
746 | ||
747 | In this example the file include/asm-$(ARCH)/offsets.h will | |
748 | be built before descending down in the subdirectories. | |
749 | See also chapter XXX-TODO that describe how kbuild supports | |
750 | generating offset header files. | |
751 | ||
752 | ||
753 | --- 6.3 List directories to visit when descending | |
754 | ||
755 | An arch Makefile cooperates with the top Makefile to define variables | |
756 | which specify how to build the vmlinux file. Note that there is no | |
757 | corresponding arch-specific section for modules; the module-building | |
758 | machinery is all architecture-independent. | |
759 | ||
760 | ||
761 | head-y, init-y, core-y, libs-y, drivers-y, net-y | |
762 | ||
763 | $(head-y) list objects to be linked first in vmlinux. | |
764 | $(libs-y) list directories where a lib.a archive can be located. | |
765 | The rest list directories where a built-in.o object file can be located. | |
766 | ||
767 | $(init-y) objects will be located after $(head-y). | |
768 | Then the rest follows in this order: | |
769 | $(core-y), $(libs-y), $(drivers-y) and $(net-y). | |
770 | ||
771 | The top level Makefile define values for all generic directories, | |
772 | and arch/$(ARCH)/Makefile only adds architecture specific directories. | |
773 | ||
774 | Example: | |
775 | #arch/sparc64/Makefile | |
776 | core-y += arch/sparc64/kernel/ | |
777 | libs-y += arch/sparc64/prom/ arch/sparc64/lib/ | |
778 | drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/ | |
779 | ||
780 | ||
781 | --- 6.4 Architecture specific boot images | |
782 | ||
783 | An arch Makefile specifies goals that take the vmlinux file, compress | |
784 | it, wrap it in bootstrapping code, and copy the resulting files | |
785 | somewhere. This includes various kinds of installation commands. | |
786 | The actual goals are not standardized across architectures. | |
787 | ||
788 | It is common to locate any additional processing in a boot/ | |
789 | directory below arch/$(ARCH)/. | |
790 | ||
791 | Kbuild does not provide any smart way to support building a | |
792 | target specified in boot/. Therefore arch/$(ARCH)/Makefile shall | |
793 | call make manually to build a target in boot/. | |
794 | ||
795 | The recommended approach is to include shortcuts in | |
796 | arch/$(ARCH)/Makefile, and use the full path when calling down | |
797 | into the arch/$(ARCH)/boot/Makefile. | |
798 | ||
799 | Example: | |
800 | #arch/i386/Makefile | |
801 | boot := arch/i386/boot | |
802 | bzImage: vmlinux | |
803 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ | |
804 | ||
805 | "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke | |
806 | make in a subdirectory. | |
807 | ||
808 | There are no rules for naming of the architecture specific targets, | |
809 | but executing "make help" will list all relevant targets. | |
810 | To support this $(archhelp) must be defined. | |
811 | ||
812 | Example: | |
813 | #arch/i386/Makefile | |
814 | define archhelp | |
815 | echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)' | |
816 | endef | |
817 | ||
818 | When make is executed without arguments, the first goal encountered | |
819 | will be built. In the top level Makefile the first goal present | |
820 | is all:. | |
821 | An architecture shall always per default build a bootable image. | |
822 | In "make help" the default goal is highlighted with a '*'. | |
823 | Add a new prerequisite to all: to select a default goal different | |
824 | from vmlinux. | |
825 | ||
826 | Example: | |
827 | #arch/i386/Makefile | |
828 | all: bzImage | |
829 | ||
830 | When "make" is executed without arguments, bzImage will be built. | |
831 | ||
832 | --- 6.5 Building non-kbuild targets | |
833 | ||
834 | extra-y | |
835 | ||
836 | extra-y specify additional targets created in the current | |
837 | directory, in addition to any targets specified by obj-*. | |
838 | ||
839 | Listing all targets in extra-y is required for two purposes: | |
840 | 1) Enable kbuild to check changes in command lines | |
841 | - When $(call if_changed,xxx) is used | |
842 | 2) kbuild knows what files to delete during "make clean" | |
843 | ||
844 | Example: | |
845 | #arch/i386/kernel/Makefile | |
846 | extra-y := head.o init_task.o | |
847 | ||
848 | In this example extra-y is used to list object files that | |
849 | shall be built, but shall not be linked as part of built-in.o. | |
850 | ||
851 | ||
852 | --- 6.6 Commands useful for building a boot image | |
853 | ||
854 | Kbuild provides a few macros that are useful when building a | |
855 | boot image. | |
856 | ||
857 | if_changed | |
858 | ||
859 | if_changed is the infrastructure used for the following commands. | |
860 | ||
861 | Usage: | |
862 | target: source(s) FORCE | |
863 | $(call if_changed,ld/objcopy/gzip) | |
864 | ||
865 | When the rule is evaluated it is checked to see if any files | |
866 | needs an update, or the commandline has changed since last | |
867 | invocation. The latter will force a rebuild if any options | |
868 | to the executable have changed. | |
869 | Any target that utilises if_changed must be listed in $(targets), | |
870 | otherwise the command line check will fail, and the target will | |
871 | always be built. | |
872 | Assignments to $(targets) are without $(obj)/ prefix. | |
873 | if_changed may be used in conjunction with custom commands as | |
874 | defined in 6.7 "Custom kbuild commands". | |
49490571 | 875 | |
1da177e4 | 876 | Note: It is a typical mistake to forget the FORCE prerequisite. |
49490571 PBG |
877 | Another common pitfall is that whitespace is sometimes |
878 | significant; for instance, the below will fail (note the extra space | |
879 | after the comma): | |
880 | target: source(s) FORCE | |
881 | #WRONG!# $(call if_changed, ld/objcopy/gzip) | |
1da177e4 LT |
882 | |
883 | ld | |
884 | Link target. Often LDFLAGS_$@ is used to set specific options to ld. | |
885 | ||
886 | objcopy | |
887 | Copy binary. Uses OBJCOPYFLAGS usually specified in | |
888 | arch/$(ARCH)/Makefile. | |
889 | OBJCOPYFLAGS_$@ may be used to set additional options. | |
890 | ||
891 | gzip | |
892 | Compress target. Use maximum compression to compress target. | |
893 | ||
894 | Example: | |
895 | #arch/i386/boot/Makefile | |
896 | LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary | |
897 | LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext | |
898 | ||
899 | targets += setup setup.o bootsect bootsect.o | |
900 | $(obj)/setup $(obj)/bootsect: %: %.o FORCE | |
901 | $(call if_changed,ld) | |
902 | ||
903 | In this example there are two possible targets, requiring different | |
904 | options to the linker. the linker options are specified using the | |
905 | LDFLAGS_$@ syntax - one for each potential target. | |
906 | $(targets) are assinged all potential targets, herby kbuild knows | |
907 | the targets and will: | |
908 | 1) check for commandline changes | |
909 | 2) delete target during make clean | |
910 | ||
911 | The ": %: %.o" part of the prerequisite is a shorthand that | |
912 | free us from listing the setup.o and bootsect.o files. | |
913 | Note: It is a common mistake to forget the "target :=" assignment, | |
914 | resulting in the target file being recompiled for no | |
915 | obvious reason. | |
916 | ||
917 | ||
918 | --- 6.7 Custom kbuild commands | |
919 | ||
920 | When kbuild is executing with KBUILD_VERBOSE=0 then only a shorthand | |
921 | of a command is normally displayed. | |
922 | To enable this behaviour for custom commands kbuild requires | |
923 | two variables to be set: | |
924 | quiet_cmd_<command> - what shall be echoed | |
925 | cmd_<command> - the command to execute | |
926 | ||
927 | Example: | |
928 | # | |
929 | quiet_cmd_image = BUILD $@ | |
930 | cmd_image = $(obj)/tools/build $(BUILDFLAGS) \ | |
931 | $(obj)/vmlinux.bin > $@ | |
932 | ||
933 | targets += bzImage | |
934 | $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE | |
935 | $(call if_changed,image) | |
936 | @echo 'Kernel: $@ is ready' | |
937 | ||
938 | When updating the $(obj)/bzImage target the line: | |
939 | ||
940 | BUILD arch/i386/boot/bzImage | |
941 | ||
942 | will be displayed with "make KBUILD_VERBOSE=0". | |
943 | ||
944 | ||
945 | --- 6.8 Preprocessing linker scripts | |
946 | ||
947 | When the vmlinux image is build the linker script: | |
948 | arch/$(ARCH)/kernel/vmlinux.lds is used. | |
949 | The script is a preprocessed variant of the file vmlinux.lds.S | |
950 | located in the same directory. | |
951 | kbuild knows .lds file and includes a rule *lds.S -> *lds. | |
952 | ||
953 | Example: | |
954 | #arch/i386/kernel/Makefile | |
955 | always := vmlinux.lds | |
956 | ||
957 | #Makefile | |
958 | export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH) | |
959 | ||
960 | The assigment to $(always) is used to tell kbuild to build the | |
961 | target: vmlinux.lds. | |
962 | The assignment to $(CPPFLAGS_vmlinux.lds) tell kbuild to use the | |
963 | specified options when building the target vmlinux.lds. | |
964 | ||
965 | When building the *.lds target kbuild used the variakles: | |
966 | CPPFLAGS : Set in top-level Makefile | |
967 | EXTRA_CPPFLAGS : May be set in the kbuild makefile | |
968 | CPPFLAGS_$(@F) : Target specific flags. | |
969 | Note that the full filename is used in this | |
970 | assignment. | |
971 | ||
972 | The kbuild infrastructure for *lds file are used in several | |
973 | architecture specific files. | |
974 | ||
975 | ||
976 | --- 6.9 $(CC) support functions | |
977 | ||
978 | The kernel may be build with several different versions of | |
979 | $(CC), each supporting a unique set of features and options. | |
980 | kbuild provide basic support to check for valid options for $(CC). | |
981 | $(CC) is useally the gcc compiler, but other alternatives are | |
982 | available. | |
983 | ||
984 | cc-option | |
985 | cc-option is used to check if $(CC) support a given option, and not | |
986 | supported to use an optional second option. | |
987 | ||
988 | Example: | |
989 | #arch/i386/Makefile | |
990 | cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586) | |
991 | ||
992 | In the above example cflags-y will be assigned the option | |
993 | -march=pentium-mmx if supported by $(CC), otherwise -march-i586. | |
994 | The second argument to cc-option is optional, and if omitted | |
995 | cflags-y will be assigned no value if first option is not supported. | |
996 | ||
997 | cc-option-yn | |
998 | cc-option-yn is used to check if gcc supports a given option | |
999 | and return 'y' if supported, otherwise 'n'. | |
1000 | ||
1001 | Example: | |
1002 | #arch/ppc/Makefile | |
1003 | biarch := $(call cc-option-yn, -m32) | |
1004 | aflags-$(biarch) += -a32 | |
1005 | cflags-$(biarch) += -m32 | |
1006 | ||
1007 | In the above example $(biarch) is set to y if $(CC) supports the -m32 | |
1008 | option. When $(biarch) equals to y the expanded variables $(aflags-y) | |
1009 | and $(cflags-y) will be assigned the values -a32 and -m32. | |
1010 | ||
1011 | cc-option-align | |
1012 | gcc version >= 3.0 shifted type of options used to speify | |
1013 | alignment of functions, loops etc. $(cc-option-align) whrn used | |
1014 | as prefix to the align options will select the right prefix: | |
1015 | gcc < 3.00 | |
1016 | cc-option-align = -malign | |
1017 | gcc >= 3.00 | |
1018 | cc-option-align = -falign | |
1019 | ||
1020 | Example: | |
1021 | CFLAGS += $(cc-option-align)-functions=4 | |
1022 | ||
1023 | In the above example the option -falign-functions=4 is used for | |
1024 | gcc >= 3.00. For gcc < 3.00 -malign-functions=4 is used. | |
1025 | ||
1026 | cc-version | |
1027 | cc-version return a numerical version of the $(CC) compiler version. | |
1028 | The format is <major><minor> where both are two digits. So for example | |
1029 | gcc 3.41 would return 0341. | |
1030 | cc-version is useful when a specific $(CC) version is faulty in one | |
1031 | area, for example the -mregparm=3 were broken in some gcc version | |
1032 | even though the option was accepted by gcc. | |
1033 | ||
1034 | Example: | |
1035 | #arch/i386/Makefile | |
1036 | GCC_VERSION := $(call cc-version) | |
1037 | cflags-y += $(shell \ | |
1038 | if [ $(GCC_VERSION) -ge 0300 ] ; then echo "-mregparm=3"; fi ;) | |
1039 | ||
1040 | In the above example -mregparm=3 is only used for gcc version greater | |
1041 | than or equal to gcc 3.0. | |
1042 | ||
1043 | ||
1044 | === 7 Kbuild Variables | |
1045 | ||
1046 | The top Makefile exports the following variables: | |
1047 | ||
1048 | VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION | |
1049 | ||
1050 | These variables define the current kernel version. A few arch | |
1051 | Makefiles actually use these values directly; they should use | |
1052 | $(KERNELRELEASE) instead. | |
1053 | ||
1054 | $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic | |
1055 | three-part version number, such as "2", "4", and "0". These three | |
1056 | values are always numeric. | |
1057 | ||
1058 | $(EXTRAVERSION) defines an even tinier sublevel for pre-patches | |
1059 | or additional patches. It is usually some non-numeric string | |
1060 | such as "-pre4", and is often blank. | |
1061 | ||
1062 | KERNELRELEASE | |
1063 | ||
1064 | $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable | |
1065 | for constructing installation directory names or showing in | |
1066 | version strings. Some arch Makefiles use it for this purpose. | |
1067 | ||
1068 | ARCH | |
1069 | ||
1070 | This variable defines the target architecture, such as "i386", | |
1071 | "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to | |
1072 | determine which files to compile. | |
1073 | ||
1074 | By default, the top Makefile sets $(ARCH) to be the same as the | |
1075 | host system architecture. For a cross build, a user may | |
1076 | override the value of $(ARCH) on the command line: | |
1077 | ||
1078 | make ARCH=m68k ... | |
1079 | ||
1080 | ||
1081 | INSTALL_PATH | |
1082 | ||
1083 | This variable defines a place for the arch Makefiles to install | |
1084 | the resident kernel image and System.map file. | |
1085 | Use this for architecture specific install targets. | |
1086 | ||
1087 | INSTALL_MOD_PATH, MODLIB | |
1088 | ||
1089 | $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module | |
1090 | installation. This variable is not defined in the Makefile but | |
1091 | may be passed in by the user if desired. | |
1092 | ||
1093 | $(MODLIB) specifies the directory for module installation. | |
1094 | The top Makefile defines $(MODLIB) to | |
1095 | $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may | |
1096 | override this value on the command line if desired. | |
1097 | ||
1098 | === 8 Makefile language | |
1099 | ||
1100 | The kernel Makefiles are designed to run with GNU Make. The Makefiles | |
1101 | use only the documented features of GNU Make, but they do use many | |
1102 | GNU extensions. | |
1103 | ||
1104 | GNU Make supports elementary list-processing functions. The kernel | |
1105 | Makefiles use a novel style of list building and manipulation with few | |
1106 | "if" statements. | |
1107 | ||
1108 | GNU Make has two assignment operators, ":=" and "=". ":=" performs | |
1109 | immediate evaluation of the right-hand side and stores an actual string | |
1110 | into the left-hand side. "=" is like a formula definition; it stores the | |
1111 | right-hand side in an unevaluated form and then evaluates this form each | |
1112 | time the left-hand side is used. | |
1113 | ||
1114 | There are some cases where "=" is appropriate. Usually, though, ":=" | |
1115 | is the right choice. | |
1116 | ||
1117 | === 9 Credits | |
1118 | ||
1119 | Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net> | |
1120 | Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de> | |
1121 | Updates by Sam Ravnborg <sam@ravnborg.org> | |
1122 | ||
1123 | === 10 TODO | |
1124 | ||
1125 | - Describe how kbuild support shipped files with _shipped. | |
1126 | - Generating offset header files. | |
1127 | - Add more variables to section 7? | |
1128 |