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2 How To Write Linux PCI Drivers
3
4 by Martin Mares <mj@ucw.cz> on 07-Feb-2000
5 updated by Grant Grundler <grundler@parisc-linux.org> on 23-Dec-2006
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6
7~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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8The world of PCI is vast and full of (mostly unpleasant) surprises.
9Since each CPU architecture implements different chip-sets and PCI devices
10have different requirements (erm, "features"), the result is the PCI support
11in the Linux kernel is not as trivial as one would wish. This short paper
12tries to introduce all potential driver authors to Linux APIs for
13PCI device drivers.
14
15A more complete resource is the third edition of "Linux Device Drivers"
16by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
17LDD3 is available for free (under Creative Commons License) from:
18
19 http://lwn.net/Kernel/LDD3/
20
21However, keep in mind that all documents are subject to "bit rot".
22Refer to the source code if things are not working as described here.
23
24Please send questions/comments/patches about Linux PCI API to the
25"Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
26
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27
28
290. Structure of PCI drivers
30~~~~~~~~~~~~~~~~~~~~~~~~~~~
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31PCI drivers "discover" PCI devices in a system via pci_register_driver().
32Actually, it's the other way around. When the PCI generic code discovers
33a new device, the driver with a matching "description" will be notified.
34Details on this below.
35
36pci_register_driver() leaves most of the probing for devices to
37the PCI layer and supports online insertion/removal of devices [thus
38supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
39pci_register_driver() call requires passing in a table of function
40pointers and thus dictates the high level structure of a driver.
41
42Once the driver knows about a PCI device and takes ownership, the
43driver generally needs to perform the following initialization:
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44
45 Enable the device
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46 Request MMIO/IOP resources
47 Set the DMA mask size (for both coherent and streaming DMA)
48 Allocate and initialize shared control data (pci_allocate_coherent())
49 Access device configuration space (if needed)
50 Register IRQ handler (request_irq())
51 Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
52 Enable DMA/processing engines
53
54When done using the device, and perhaps the module needs to be unloaded,
55the driver needs to take the follow steps:
56 Disable the device from generating IRQs
57 Release the IRQ (free_irq())
58 Stop all DMA activity
59 Release DMA buffers (both streaming and coherent)
60 Unregister from other subsystems (e.g. scsi or netdev)
61 Release MMIO/IOP resources
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62 Disable the device
63
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64Most of these topics are covered in the following sections.
65For the rest look at LDD3 or <linux/pci.h> .
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66
67If the PCI subsystem is not configured (CONFIG_PCI is not set), most of
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68the PCI functions described below are defined as inline functions either
69completely empty or just returning an appropriate error codes to avoid
70lots of ifdefs in the drivers.
71
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72
73
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741. pci_register_driver() call
75~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1da177e4 76
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77PCI device drivers call pci_register_driver() during their
78initialization with a pointer to a structure describing the driver
79(struct pci_driver):
80
81 field name Description
82 ---------- ------------------------------------------------------
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83 id_table Pointer to table of device ID's the driver is
84 interested in. Most drivers should export this
85 table using MODULE_DEVICE_TABLE(pci,...).
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86
87 probe This probing function gets called (during execution
88 of pci_register_driver() for already existing
89 devices or later if a new device gets inserted) for
90 all PCI devices which match the ID table and are not
91 "owned" by the other drivers yet. This function gets
92 passed a "struct pci_dev *" for each device whose
93 entry in the ID table matches the device. The probe
94 function returns zero when the driver chooses to
95 take "ownership" of the device or an error code
96 (negative number) otherwise.
97 The probe function always gets called from process
98 context, so it can sleep.
99
100 remove The remove() function gets called whenever a device
101 being handled by this driver is removed (either during
102 deregistration of the driver or when it's manually
103 pulled out of a hot-pluggable slot).
104 The remove function always gets called from process
105 context, so it can sleep.
106
1da177e4 107 suspend Put device into low power state.
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108 suspend_late Put device into low power state.
109
110 resume_early Wake device from low power state.
1da177e4 111 resume Wake device from low power state.
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112
113 (Please see Documentation/power/pci.txt for descriptions
114 of PCI Power Management and the related functions.)
115
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116 shutdown Hook into reboot_notifier_list (kernel/sys.c).
117 Intended to stop any idling DMA operations.
118 Useful for enabling wake-on-lan (NIC) or changing
119 the power state of a device before reboot.
120 e.g. drivers/net/e100.c.
121
122 err_handler See Documentation/pci-error-recovery.txt
123
1da177e4 124
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125The ID table is an array of struct pci_device_id entries ending with an
126all-zero entry. Each entry consists of:
127
128 vendor,device Vendor and device ID to match (or PCI_ANY_ID)
1da177e4 129
1da177e4 130 subvendor, Subsystem vendor and device ID to match (or PCI_ANY_ID)
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131 subdevice,
132
133 class Device class, subclass, and "interface" to match.
134 See Appendix D of the PCI Local Bus Spec or
135 include/linux/pci_ids.h for a full list of classes.
136 Most drivers do not need to specify class/class_mask
137 as vendor/device is normally sufficient.
138
139 class_mask limit which sub-fields of the class field are compared.
140 See drivers/scsi/sym53c8xx_2/ for example of usage.
141
1da177e4 142 driver_data Data private to the driver.
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143 Most drivers don't need to use driver_data field.
144 Best practice is to use driver_data as an index
145 into a static list of equivalent device types,
146 instead of using it as a pointer.
1da177e4 147
1da177e4 148
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149Most drivers only need PCI_DEVICE() or PCI_DEVICE_CLASS() to set up
150a pci_device_id table.
1da177e4 151
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152New PCI IDs may be added to a device driver pci_ids table at runtime
153as shown below:
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154
155echo "vendor device subvendor subdevice class class_mask driver_data" > \
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156/sys/bus/pci/drivers/{driver}/new_id
157
158All fields are passed in as hexadecimal values (no leading 0x).
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159The vendor and device fields are mandatory, the others are optional. Users
160need pass only as many optional fields as necessary:
161 o subvendor and subdevice fields default to PCI_ANY_ID (FFFFFFFF)
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162 o class and classmask fields default to 0
163 o driver_data defaults to 0UL.
164
165Once added, the driver probe routine will be invoked for any unclaimed
166PCI devices listed in its (newly updated) pci_ids list.
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167
168When the driver exits, it just calls pci_unregister_driver() and the PCI layer
169automatically calls the remove hook for all devices handled by the driver.
170
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171
1721.1 "Attributes" for driver functions/data
173
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174Please mark the initialization and cleanup functions where appropriate
175(the corresponding macros are defined in <linux/init.h>):
176
177 __init Initialization code. Thrown away after the driver
178 initializes.
179 __exit Exit code. Ignored for non-modular drivers.
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180
181
182 __devinit Device initialization code.
183 Identical to __init if the kernel is not compiled
184 with CONFIG_HOTPLUG, normal function otherwise.
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185 __devexit The same for __exit.
186
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187Tips on when/where to use the above attributes:
188 o The module_init()/module_exit() functions (and all
189 initialization functions called _only_ from these)
190 should be marked __init/__exit.
1da177e4 191
74da15eb 192 o Do not mark the struct pci_driver.
1da177e4 193
74da15eb 194 o The ID table array should be marked __devinitdata.
1da177e4 195
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196 o The probe() and remove() functions should be marked __devinit
197 and __devexit respectively. All initialization functions
198 exclusively called by the probe() routine, can be marked __devinit.
199 Ditto for remove() and __devexit.
200
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201 o If mydriver_remove() is marked with __devexit(), then all address
202 references to mydriver_remove must use __devexit_p(mydriver_remove)
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203 (in the struct pci_driver declaration for example).
204 __devexit_p() will generate the function name _or_ NULL if the
205 function will be discarded. For an example, see drivers/net/tg3.c.
206
207 o Do NOT mark a function if you are not sure which mark to use.
208 Better to not mark the function than mark the function wrong.
209
210
211
2122. How to find PCI devices manually
213~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
214
215PCI drivers should have a really good reason for not using the
216pci_register_driver() interface to search for PCI devices.
217The main reason PCI devices are controlled by multiple drivers
218is because one PCI device implements several different HW services.
219E.g. combined serial/parallel port/floppy controller.
220
221A manual search may be performed using the following constructs:
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222
223Searching by vendor and device ID:
224
225 struct pci_dev *dev = NULL;
226 while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev))
227 configure_device(dev);
228
229Searching by class ID (iterate in a similar way):
230
231 pci_get_class(CLASS_ID, dev)
232
233Searching by both vendor/device and subsystem vendor/device ID:
234
74da15eb 235 pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev).
1da177e4 236
74da15eb 237You can use the constant PCI_ANY_ID as a wildcard replacement for
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238VENDOR_ID or DEVICE_ID. This allows searching for any device from a
239specific vendor, for example.
240
74da15eb 241These functions are hotplug-safe. They increment the reference count on
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242the pci_dev that they return. You must eventually (possibly at module unload)
243decrement the reference count on these devices by calling pci_dev_put().
244
245
1da177e4 246
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2473. Device Initialization Steps
248~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
249
250As noted in the introduction, most PCI drivers need the following steps
251for device initialization:
1da177e4 252
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253 Enable the device
254 Request MMIO/IOP resources
255 Set the DMA mask size (for both coherent and streaming DMA)
256 Allocate and initialize shared control data (pci_allocate_coherent())
257 Access device configuration space (if needed)
258 Register IRQ handler (request_irq())
259 Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
260 Enable DMA/processing engines.
261
262The driver can access PCI config space registers at any time.
263(Well, almost. When running BIST, config space can go away...but
264that will just result in a PCI Bus Master Abort and config reads
265will return garbage).
266
267
2683.1 Enable the PCI device
269~~~~~~~~~~~~~~~~~~~~~~~~~
270Before touching any device registers, the driver needs to enable
271the PCI device by calling pci_enable_device(). This will:
272 o wake up the device if it was in suspended state,
273 o allocate I/O and memory regions of the device (if BIOS did not),
274 o allocate an IRQ (if BIOS did not).
275
276NOTE: pci_enable_device() can fail! Check the return value.
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277
278[ OS BUG: we don't check resource allocations before enabling those
279 resources. The sequence would make more sense if we called
280 pci_request_resources() before calling pci_enable_device().
281 Currently, the device drivers can't detect the bug when when two
282 devices have been allocated the same range. This is not a common
283 problem and unlikely to get fixed soon.
284
285 This has been discussed before but not changed as of 2.6.19:
286 http://lkml.org/lkml/2006/3/2/194
287]
288
289pci_set_master() will enable DMA by setting the bus master bit
290in the PCI_COMMAND register. It also fixes the latency timer value if
291it's set to something bogus by the BIOS.
292
293If the PCI device can use the PCI Memory-Write-Invalidate transaction,
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294call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval
295and also ensures that the cache line size register is set correctly.
74da15eb 296Check the return value of pci_set_mwi() as not all architectures
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297or chip-sets may support Memory-Write-Invalidate. Alternatively,
298if Mem-Wr-Inval would be nice to have but is not required, call
299pci_try_set_mwi() to have the system do its best effort at enabling
300Mem-Wr-Inval.
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301
302
3033.2 Request MMIO/IOP resources
304~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
305Memory (MMIO), and I/O port addresses should NOT be read directly
306from the PCI device config space. Use the values in the pci_dev structure
307as the PCI "bus address" might have been remapped to a "host physical"
308address by the arch/chip-set specific kernel support.
1da177e4 309
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310See Documentation/IO-mapping.txt for how to access device registers
311or device memory.
312
313The device driver needs to call pci_request_region() to verify
314no other device is already using the same address resource.
315Conversely, drivers should call pci_release_region() AFTER
1da177e4 316calling pci_disable_device().
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317The idea is to prevent two devices colliding on the same address range.
318
319[ See OS BUG comment above. Currently (2.6.19), The driver can only
320 determine MMIO and IO Port resource availability _after_ calling
321 pci_enable_device(). ]
322
323Generic flavors of pci_request_region() are request_mem_region()
324(for MMIO ranges) and request_region() (for IO Port ranges).
325Use these for address resources that are not described by "normal" PCI
326BARs.
327
328Also see pci_request_selected_regions() below.
329
330
3313.3 Set the DMA mask size
332~~~~~~~~~~~~~~~~~~~~~~~~~
333[ If anything below doesn't make sense, please refer to
334 Documentation/DMA-API.txt. This section is just a reminder that
335 drivers need to indicate DMA capabilities of the device and is not
336 an authoritative source for DMA interfaces. ]
337
338While all drivers should explicitly indicate the DMA capability
339(e.g. 32 or 64 bit) of the PCI bus master, devices with more than
34032-bit bus master capability for streaming data need the driver
341to "register" this capability by calling pci_set_dma_mask() with
342appropriate parameters. In general this allows more efficient DMA
343on systems where System RAM exists above 4G _physical_ address.
344
345Drivers for all PCI-X and PCIe compliant devices must call
346pci_set_dma_mask() as they are 64-bit DMA devices.
347
348Similarly, drivers must also "register" this capability if the device
349can directly address "consistent memory" in System RAM above 4G physical
350address by calling pci_set_consistent_dma_mask().
351Again, this includes drivers for all PCI-X and PCIe compliant devices.
352Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are
35364-bit DMA capable for payload ("streaming") data but not control
354("consistent") data.
355
356
3573.4 Setup shared control data
358~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
359Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)
360memory. See Documentation/DMA-API.txt for a full description of
361the DMA APIs. This section is just a reminder that it needs to be done
362before enabling DMA on the device.
363
364
3653.5 Initialize device registers
366~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
367Some drivers will need specific "capability" fields programmed
368or other "vendor specific" register initialized or reset.
369E.g. clearing pending interrupts.
370
371
3723.6 Register IRQ handler
373~~~~~~~~~~~~~~~~~~~~~~~~
59c51591 374While calling request_irq() is the last step described here,
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375this is often just another intermediate step to initialize a device.
376This step can often be deferred until the device is opened for use.
377
378All interrupt handlers for IRQ lines should be registered with IRQF_SHARED
379and use the devid to map IRQs to devices (remember that all PCI IRQ lines
380can be shared).
381
382request_irq() will associate an interrupt handler and device handle
383with an interrupt number. Historically interrupt numbers represent
384IRQ lines which run from the PCI device to the Interrupt controller.
385With MSI and MSI-X (more below) the interrupt number is a CPU "vector".
386
387request_irq() also enables the interrupt. Make sure the device is
388quiesced and does not have any interrupts pending before registering
389the interrupt handler.
390
391MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts"
392which deliver interrupts to the CPU via a DMA write to a Local APIC.
393The fundamental difference between MSI and MSI-X is how multiple
394"vectors" get allocated. MSI requires contiguous blocks of vectors
395while MSI-X can allocate several individual ones.
396
397MSI capability can be enabled by calling pci_enable_msi() or
398pci_enable_msix() before calling request_irq(). This causes
399the PCI support to program CPU vector data into the PCI device
400capability registers.
401
402If your PCI device supports both, try to enable MSI-X first.
403Only one can be enabled at a time. Many architectures, chip-sets,
404or BIOSes do NOT support MSI or MSI-X and the call to pci_enable_msi/msix
405will fail. This is important to note since many drivers have
406two (or more) interrupt handlers: one for MSI/MSI-X and another for IRQs.
407They choose which handler to register with request_irq() based on the
408return value from pci_enable_msi/msix().
409
410There are (at least) two really good reasons for using MSI:
4111) MSI is an exclusive interrupt vector by definition.
412 This means the interrupt handler doesn't have to verify
413 its device caused the interrupt.
414
4152) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed
416 to be visible to the host CPU(s) when the MSI is delivered. This
417 is important for both data coherency and avoiding stale control data.
418 This guarantee allows the driver to omit MMIO reads to flush
419 the DMA stream.
420
421See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples
422of MSI/MSI-X usage.
423
424
425
4264. PCI device shutdown
427~~~~~~~~~~~~~~~~~~~~~~~
428
429When a PCI device driver is being unloaded, most of the following
430steps need to be performed:
431
432 Disable the device from generating IRQs
433 Release the IRQ (free_irq())
434 Stop all DMA activity
435 Release DMA buffers (both streaming and consistent)
436 Unregister from other subsystems (e.g. scsi or netdev)
437 Disable device from responding to MMIO/IO Port addresses
438 Release MMIO/IO Port resource(s)
439
440
4414.1 Stop IRQs on the device
442~~~~~~~~~~~~~~~~~~~~~~~~~~~
443How to do this is chip/device specific. If it's not done, it opens
444the possibility of a "screaming interrupt" if (and only if)
445the IRQ is shared with another device.
446
447When the shared IRQ handler is "unhooked", the remaining devices
448using the same IRQ line will still need the IRQ enabled. Thus if the
449"unhooked" device asserts IRQ line, the system will respond assuming
450it was one of the remaining devices asserted the IRQ line. Since none
451of the other devices will handle the IRQ, the system will "hang" until
452it decides the IRQ isn't going to get handled and masks the IRQ (100,000
453iterations later). Once the shared IRQ is masked, the remaining devices
454will stop functioning properly. Not a nice situation.
455
456This is another reason to use MSI or MSI-X if it's available.
457MSI and MSI-X are defined to be exclusive interrupts and thus
458are not susceptible to the "screaming interrupt" problem.
459
460
4614.2 Release the IRQ
462~~~~~~~~~~~~~~~~~~~
463Once the device is quiesced (no more IRQs), one can call free_irq().
464This function will return control once any pending IRQs are handled,
465"unhook" the drivers IRQ handler from that IRQ, and finally release
466the IRQ if no one else is using it.
467
468
4694.3 Stop all DMA activity
470~~~~~~~~~~~~~~~~~~~~~~~~~
471It's extremely important to stop all DMA operations BEFORE attempting
472to deallocate DMA control data. Failure to do so can result in memory
473corruption, hangs, and on some chip-sets a hard crash.
1da177e4 474
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475Stopping DMA after stopping the IRQs can avoid races where the
476IRQ handler might restart DMA engines.
477
478While this step sounds obvious and trivial, several "mature" drivers
479didn't get this step right in the past.
480
481
4824.4 Release DMA buffers
483~~~~~~~~~~~~~~~~~~~~~~~
484Once DMA is stopped, clean up streaming DMA first.
485I.e. unmap data buffers and return buffers to "upstream"
486owners if there is one.
487
488Then clean up "consistent" buffers which contain the control data.
489
490See Documentation/DMA-API.txt for details on unmapping interfaces.
491
492
4934.5 Unregister from other subsystems
494~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
495Most low level PCI device drivers support some other subsystem
496like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your
497driver isn't losing resources from that other subsystem.
498If this happens, typically the symptom is an Oops (panic) when
499the subsystem attempts to call into a driver that has been unloaded.
500
501
5024.6 Disable Device from responding to MMIO/IO Port addresses
503~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
504io_unmap() MMIO or IO Port resources and then call pci_disable_device().
505This is the symmetric opposite of pci_enable_device().
506Do not access device registers after calling pci_disable_device().
507
508
5094.7 Release MMIO/IO Port Resource(s)
510~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
511Call pci_release_region() to mark the MMIO or IO Port range as available.
512Failure to do so usually results in the inability to reload the driver.
513
514
515
5165. How to access PCI config space
1da177e4 517~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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518
519You can use pci_(read|write)_config_(byte|word|dword) to access the config
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520space of a device represented by struct pci_dev *. All these functions return 0
521when successful or an error code (PCIBIOS_...) which can be translated to a text
522string by pcibios_strerror. Most drivers expect that accesses to valid PCI
523devices don't fail.
524
74da15eb 525If you don't have a struct pci_dev available, you can call
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526pci_bus_(read|write)_config_(byte|word|dword) to access a given device
527and function on that bus.
528
74da15eb 529If you access fields in the standard portion of the config header, please
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530use symbolic names of locations and bits declared in <linux/pci.h>.
531
74da15eb 532If you need to access Extended PCI Capability registers, just call
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533pci_find_capability() for the particular capability and it will find the
534corresponding register block for you.
535
536
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537
5386. Other interesting functions
539~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
74da15eb 540
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541pci_find_slot() Find pci_dev corresponding to given bus and
542 slot numbers.
543pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3)
544pci_find_capability() Find specified capability in device's capability
545 list.
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546pci_resource_start() Returns bus start address for a given PCI region
547pci_resource_end() Returns bus end address for a given PCI region
548pci_resource_len() Returns the byte length of a PCI region
549pci_set_drvdata() Set private driver data pointer for a pci_dev
550pci_get_drvdata() Return private driver data pointer for a pci_dev
551pci_set_mwi() Enable Memory-Write-Invalidate transactions.
552pci_clear_mwi() Disable Memory-Write-Invalidate transactions.
553
554
74da15eb 555
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5567. Miscellaneous hints
557~~~~~~~~~~~~~~~~~~~~~~
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558
559When displaying PCI device names to the user (for example when a driver wants
560to tell the user what card has it found), please use pci_name(pci_dev).
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561
562Always refer to the PCI devices by a pointer to the pci_dev structure.
563All PCI layer functions use this identification and it's the only
564reasonable one. Don't use bus/slot/function numbers except for very
565special purposes -- on systems with multiple primary buses their semantics
566can be pretty complex.
567
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568Don't try to turn on Fast Back to Back writes in your driver. All devices
569on the bus need to be capable of doing it, so this is something which needs
570to be handled by platform and generic code, not individual drivers.
571
572
74da15eb 573
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5748. Vendor and device identifications
575~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9b860b8c 576
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577One is not not required to add new device ids to include/linux/pci_ids.h.
578Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids.
579
580PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary
581hex numbers (vendor controlled) and normally used only in a single
582location, the pci_device_id table.
583
584Please DO submit new vendor/device ids to pciids.sourceforge.net project.
585
9b860b8c 586
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587
5889. Obsolete functions
1da177e4 589~~~~~~~~~~~~~~~~~~~~~
74da15eb 590
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591There are several functions which you might come across when trying to
592port an old driver to the new PCI interface. They are no longer present
593in the kernel as they aren't compatible with hotplug or PCI domains or
594having sane locking.
595
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596pci_find_device() Superseded by pci_get_device()
597pci_find_subsys() Superseded by pci_get_subsys()
598pci_find_slot() Superseded by pci_get_slot()
599
600
601The alternative is the traditional PCI device driver that walks PCI
602device lists. This is still possible but discouraged.
603
604
605
d48b5d3a 60610. MMIO Space and "Write Posting"
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607~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
608
609Converting a driver from using I/O Port space to using MMIO space
610often requires some additional changes. Specifically, "write posting"
611needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2)
612already do this. I/O Port space guarantees write transactions reach the PCI
613device before the CPU can continue. Writes to MMIO space allow the CPU
614to continue before the transaction reaches the PCI device. HW weenies
615call this "Write Posting" because the write completion is "posted" to
616the CPU before the transaction has reached its destination.
617
618Thus, timing sensitive code should add readl() where the CPU is
619expected to wait before doing other work. The classic "bit banging"
620sequence works fine for I/O Port space:
621
622 for (i = 8; --i; val >>= 1) {
623 outb(val & 1, ioport_reg); /* write bit */
624 udelay(10);
625 }
626
627The same sequence for MMIO space should be:
628
629 for (i = 8; --i; val >>= 1) {
630 writeb(val & 1, mmio_reg); /* write bit */
631 readb(safe_mmio_reg); /* flush posted write */
632 udelay(10);
633 }
634
635It is important that "safe_mmio_reg" not have any side effects that
636interferes with the correct operation of the device.
637
638Another case to watch out for is when resetting a PCI device. Use PCI
639Configuration space reads to flush the writel(). This will gracefully
640handle the PCI master abort on all platforms if the PCI device is
641expected to not respond to a readl(). Most x86 platforms will allow
642MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage
643(e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail").
644