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2 | How To Write Linux PCI Drivers |
3 | ||
4 | by Martin Mares <mj@ucw.cz> on 07-Feb-2000 | |
5 | updated by Grant Grundler <grundler@parisc-linux.org> on 23-Dec-2006 | |
1da177e4 LT |
6 | |
7 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb GG |
8 | The world of PCI is vast and full of (mostly unpleasant) surprises. |
9 | Since each CPU architecture implements different chip-sets and PCI devices | |
10 | have different requirements (erm, "features"), the result is the PCI support | |
11 | in the Linux kernel is not as trivial as one would wish. This short paper | |
12 | tries to introduce all potential driver authors to Linux APIs for | |
13 | PCI device drivers. | |
14 | ||
15 | A more complete resource is the third edition of "Linux Device Drivers" | |
16 | by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman. | |
17 | LDD3 is available for free (under Creative Commons License) from: | |
18 | ||
19 | http://lwn.net/Kernel/LDD3/ | |
20 | ||
21 | However, keep in mind that all documents are subject to "bit rot". | |
22 | Refer to the source code if things are not working as described here. | |
23 | ||
24 | Please send questions/comments/patches about Linux PCI API to the | |
25 | "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list. | |
26 | ||
1da177e4 LT |
27 | |
28 | ||
29 | 0. Structure of PCI drivers | |
30 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb GG |
31 | PCI drivers "discover" PCI devices in a system via pci_register_driver(). |
32 | Actually, it's the other way around. When the PCI generic code discovers | |
33 | a new device, the driver with a matching "description" will be notified. | |
34 | Details on this below. | |
35 | ||
36 | pci_register_driver() leaves most of the probing for devices to | |
37 | the PCI layer and supports online insertion/removal of devices [thus | |
38 | supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver]. | |
39 | pci_register_driver() call requires passing in a table of function | |
40 | pointers and thus dictates the high level structure of a driver. | |
41 | ||
42 | Once the driver knows about a PCI device and takes ownership, the | |
43 | driver generally needs to perform the following initialization: | |
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44 | |
45 | Enable the device | |
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46 | Request MMIO/IOP resources |
47 | Set the DMA mask size (for both coherent and streaming DMA) | |
48 | Allocate and initialize shared control data (pci_allocate_coherent()) | |
49 | Access device configuration space (if needed) | |
50 | Register IRQ handler (request_irq()) | |
51 | Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
52 | Enable DMA/processing engines | |
53 | ||
54 | When done using the device, and perhaps the module needs to be unloaded, | |
55 | the driver needs to take the follow steps: | |
56 | Disable the device from generating IRQs | |
57 | Release the IRQ (free_irq()) | |
58 | Stop all DMA activity | |
59 | Release DMA buffers (both streaming and coherent) | |
60 | Unregister from other subsystems (e.g. scsi or netdev) | |
61 | Release MMIO/IOP resources | |
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62 | Disable the device |
63 | ||
74da15eb GG |
64 | Most of these topics are covered in the following sections. |
65 | For the rest look at LDD3 or <linux/pci.h> . | |
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66 | |
67 | If the PCI subsystem is not configured (CONFIG_PCI is not set), most of | |
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68 | the PCI functions described below are defined as inline functions either |
69 | completely empty or just returning an appropriate error codes to avoid | |
70 | lots of ifdefs in the drivers. | |
71 | ||
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72 | |
73 | ||
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74 | 1. pci_register_driver() call |
75 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
1da177e4 | 76 | |
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77 | PCI device drivers call pci_register_driver() during their |
78 | initialization with a pointer to a structure describing the driver | |
79 | (struct pci_driver): | |
80 | ||
81 | field name Description | |
82 | ---------- ------------------------------------------------------ | |
1da177e4 LT |
83 | id_table Pointer to table of device ID's the driver is |
84 | interested in. Most drivers should export this | |
85 | table using MODULE_DEVICE_TABLE(pci,...). | |
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86 | |
87 | probe This probing function gets called (during execution | |
88 | of pci_register_driver() for already existing | |
89 | devices or later if a new device gets inserted) for | |
90 | all PCI devices which match the ID table and are not | |
91 | "owned" by the other drivers yet. This function gets | |
92 | passed a "struct pci_dev *" for each device whose | |
93 | entry in the ID table matches the device. The probe | |
94 | function returns zero when the driver chooses to | |
95 | take "ownership" of the device or an error code | |
96 | (negative number) otherwise. | |
97 | The probe function always gets called from process | |
98 | context, so it can sleep. | |
99 | ||
100 | remove The remove() function gets called whenever a device | |
101 | being handled by this driver is removed (either during | |
102 | deregistration of the driver or when it's manually | |
103 | pulled out of a hot-pluggable slot). | |
104 | The remove function always gets called from process | |
105 | context, so it can sleep. | |
106 | ||
1da177e4 | 107 | suspend Put device into low power state. |
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108 | suspend_late Put device into low power state. |
109 | ||
110 | resume_early Wake device from low power state. | |
1da177e4 | 111 | resume Wake device from low power state. |
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112 | |
113 | (Please see Documentation/power/pci.txt for descriptions | |
114 | of PCI Power Management and the related functions.) | |
115 | ||
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116 | enable_wake Enable device to generate wake events from a low power |
117 | state. | |
118 | ||
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119 | shutdown Hook into reboot_notifier_list (kernel/sys.c). |
120 | Intended to stop any idling DMA operations. | |
121 | Useful for enabling wake-on-lan (NIC) or changing | |
122 | the power state of a device before reboot. | |
123 | e.g. drivers/net/e100.c. | |
124 | ||
125 | err_handler See Documentation/pci-error-recovery.txt | |
126 | ||
127 | multithread_probe Enable multi-threaded probe/scan. Driver must | |
128 | provide its own locking/syncronization for init | |
129 | operations if this is enabled. | |
130 | ||
1da177e4 | 131 | |
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132 | The ID table is an array of struct pci_device_id entries ending with an |
133 | all-zero entry. Each entry consists of: | |
134 | ||
135 | vendor,device Vendor and device ID to match (or PCI_ANY_ID) | |
1da177e4 | 136 | |
1da177e4 | 137 | subvendor, Subsystem vendor and device ID to match (or PCI_ANY_ID) |
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138 | subdevice, |
139 | ||
140 | class Device class, subclass, and "interface" to match. | |
141 | See Appendix D of the PCI Local Bus Spec or | |
142 | include/linux/pci_ids.h for a full list of classes. | |
143 | Most drivers do not need to specify class/class_mask | |
144 | as vendor/device is normally sufficient. | |
145 | ||
146 | class_mask limit which sub-fields of the class field are compared. | |
147 | See drivers/scsi/sym53c8xx_2/ for example of usage. | |
148 | ||
1da177e4 | 149 | driver_data Data private to the driver. |
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150 | Most drivers don't need to use driver_data field. |
151 | Best practice is to use driver_data as an index | |
152 | into a static list of equivalent device types, | |
153 | instead of using it as a pointer. | |
1da177e4 | 154 | |
1da177e4 | 155 | |
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156 | Most drivers only need PCI_DEVICE() or PCI_DEVICE_CLASS() to set up |
157 | a pci_device_id table. | |
1da177e4 | 158 | |
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159 | New PCI IDs may be added to a device driver pci_ids table at runtime |
160 | as shown below: | |
1da177e4 LT |
161 | |
162 | echo "vendor device subvendor subdevice class class_mask driver_data" > \ | |
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163 | /sys/bus/pci/drivers/{driver}/new_id |
164 | ||
165 | All fields are passed in as hexadecimal values (no leading 0x). | |
166 | Users need pass only as many fields as necessary: | |
167 | o vendor, device, subvendor, and subdevice fields default | |
168 | to PCI_ANY_ID (FFFFFFFF), | |
169 | o class and classmask fields default to 0 | |
170 | o driver_data defaults to 0UL. | |
171 | ||
172 | Once added, the driver probe routine will be invoked for any unclaimed | |
173 | PCI devices listed in its (newly updated) pci_ids list. | |
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174 | |
175 | When the driver exits, it just calls pci_unregister_driver() and the PCI layer | |
176 | automatically calls the remove hook for all devices handled by the driver. | |
177 | ||
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178 | |
179 | 1.1 "Attributes" for driver functions/data | |
180 | ||
1da177e4 LT |
181 | Please mark the initialization and cleanup functions where appropriate |
182 | (the corresponding macros are defined in <linux/init.h>): | |
183 | ||
184 | __init Initialization code. Thrown away after the driver | |
185 | initializes. | |
186 | __exit Exit code. Ignored for non-modular drivers. | |
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187 | |
188 | ||
189 | __devinit Device initialization code. | |
190 | Identical to __init if the kernel is not compiled | |
191 | with CONFIG_HOTPLUG, normal function otherwise. | |
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192 | __devexit The same for __exit. |
193 | ||
74da15eb GG |
194 | Tips on when/where to use the above attributes: |
195 | o The module_init()/module_exit() functions (and all | |
196 | initialization functions called _only_ from these) | |
197 | should be marked __init/__exit. | |
1da177e4 | 198 | |
74da15eb | 199 | o Do not mark the struct pci_driver. |
1da177e4 | 200 | |
74da15eb | 201 | o The ID table array should be marked __devinitdata. |
1da177e4 | 202 | |
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203 | o The probe() and remove() functions should be marked __devinit |
204 | and __devexit respectively. All initialization functions | |
205 | exclusively called by the probe() routine, can be marked __devinit. | |
206 | Ditto for remove() and __devexit. | |
207 | ||
26ba05e4 GG |
208 | o If mydriver_remove() is marked with __devexit(), then all address |
209 | references to mydriver_remove must use __devexit_p(mydriver_remove) | |
74da15eb GG |
210 | (in the struct pci_driver declaration for example). |
211 | __devexit_p() will generate the function name _or_ NULL if the | |
212 | function will be discarded. For an example, see drivers/net/tg3.c. | |
213 | ||
214 | o Do NOT mark a function if you are not sure which mark to use. | |
215 | Better to not mark the function than mark the function wrong. | |
216 | ||
217 | ||
218 | ||
219 | 2. How to find PCI devices manually | |
220 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
221 | ||
222 | PCI drivers should have a really good reason for not using the | |
223 | pci_register_driver() interface to search for PCI devices. | |
224 | The main reason PCI devices are controlled by multiple drivers | |
225 | is because one PCI device implements several different HW services. | |
226 | E.g. combined serial/parallel port/floppy controller. | |
227 | ||
228 | A manual search may be performed using the following constructs: | |
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229 | |
230 | Searching by vendor and device ID: | |
231 | ||
232 | struct pci_dev *dev = NULL; | |
233 | while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev)) | |
234 | configure_device(dev); | |
235 | ||
236 | Searching by class ID (iterate in a similar way): | |
237 | ||
238 | pci_get_class(CLASS_ID, dev) | |
239 | ||
240 | Searching by both vendor/device and subsystem vendor/device ID: | |
241 | ||
74da15eb | 242 | pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev). |
1da177e4 | 243 | |
74da15eb | 244 | You can use the constant PCI_ANY_ID as a wildcard replacement for |
1da177e4 LT |
245 | VENDOR_ID or DEVICE_ID. This allows searching for any device from a |
246 | specific vendor, for example. | |
247 | ||
74da15eb | 248 | These functions are hotplug-safe. They increment the reference count on |
1da177e4 LT |
249 | the pci_dev that they return. You must eventually (possibly at module unload) |
250 | decrement the reference count on these devices by calling pci_dev_put(). | |
251 | ||
252 | ||
1da177e4 | 253 | |
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254 | 3. Device Initialization Steps |
255 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
256 | ||
257 | As noted in the introduction, most PCI drivers need the following steps | |
258 | for device initialization: | |
1da177e4 | 259 | |
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260 | Enable the device |
261 | Request MMIO/IOP resources | |
262 | Set the DMA mask size (for both coherent and streaming DMA) | |
263 | Allocate and initialize shared control data (pci_allocate_coherent()) | |
264 | Access device configuration space (if needed) | |
265 | Register IRQ handler (request_irq()) | |
266 | Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
267 | Enable DMA/processing engines. | |
268 | ||
269 | The driver can access PCI config space registers at any time. | |
270 | (Well, almost. When running BIST, config space can go away...but | |
271 | that will just result in a PCI Bus Master Abort and config reads | |
272 | will return garbage). | |
273 | ||
274 | ||
275 | 3.1 Enable the PCI device | |
276 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
277 | Before touching any device registers, the driver needs to enable | |
278 | the PCI device by calling pci_enable_device(). This will: | |
279 | o wake up the device if it was in suspended state, | |
280 | o allocate I/O and memory regions of the device (if BIOS did not), | |
281 | o allocate an IRQ (if BIOS did not). | |
282 | ||
283 | NOTE: pci_enable_device() can fail! Check the return value. | |
284 | NOTE2: Also see pci_enable_device_bars() below. Drivers can | |
285 | attempt to enable only a subset of BARs they need. | |
286 | ||
287 | [ OS BUG: we don't check resource allocations before enabling those | |
288 | resources. The sequence would make more sense if we called | |
289 | pci_request_resources() before calling pci_enable_device(). | |
290 | Currently, the device drivers can't detect the bug when when two | |
291 | devices have been allocated the same range. This is not a common | |
292 | problem and unlikely to get fixed soon. | |
293 | ||
294 | This has been discussed before but not changed as of 2.6.19: | |
295 | http://lkml.org/lkml/2006/3/2/194 | |
296 | ] | |
297 | ||
298 | pci_set_master() will enable DMA by setting the bus master bit | |
299 | in the PCI_COMMAND register. It also fixes the latency timer value if | |
300 | it's set to something bogus by the BIOS. | |
301 | ||
302 | If the PCI device can use the PCI Memory-Write-Invalidate transaction, | |
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303 | call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval |
304 | and also ensures that the cache line size register is set correctly. | |
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305 | Check the return value of pci_set_mwi() as not all architectures |
306 | or chip-sets may support Memory-Write-Invalidate. | |
307 | ||
308 | ||
309 | 3.2 Request MMIO/IOP resources | |
310 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
311 | Memory (MMIO), and I/O port addresses should NOT be read directly | |
312 | from the PCI device config space. Use the values in the pci_dev structure | |
313 | as the PCI "bus address" might have been remapped to a "host physical" | |
314 | address by the arch/chip-set specific kernel support. | |
1da177e4 | 315 | |
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316 | See Documentation/IO-mapping.txt for how to access device registers |
317 | or device memory. | |
318 | ||
319 | The device driver needs to call pci_request_region() to verify | |
320 | no other device is already using the same address resource. | |
321 | Conversely, drivers should call pci_release_region() AFTER | |
1da177e4 | 322 | calling pci_disable_device(). |
74da15eb GG |
323 | The idea is to prevent two devices colliding on the same address range. |
324 | ||
325 | [ See OS BUG comment above. Currently (2.6.19), The driver can only | |
326 | determine MMIO and IO Port resource availability _after_ calling | |
327 | pci_enable_device(). ] | |
328 | ||
329 | Generic flavors of pci_request_region() are request_mem_region() | |
330 | (for MMIO ranges) and request_region() (for IO Port ranges). | |
331 | Use these for address resources that are not described by "normal" PCI | |
332 | BARs. | |
333 | ||
334 | Also see pci_request_selected_regions() below. | |
335 | ||
336 | ||
337 | 3.3 Set the DMA mask size | |
338 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
339 | [ If anything below doesn't make sense, please refer to | |
340 | Documentation/DMA-API.txt. This section is just a reminder that | |
341 | drivers need to indicate DMA capabilities of the device and is not | |
342 | an authoritative source for DMA interfaces. ] | |
343 | ||
344 | While all drivers should explicitly indicate the DMA capability | |
345 | (e.g. 32 or 64 bit) of the PCI bus master, devices with more than | |
346 | 32-bit bus master capability for streaming data need the driver | |
347 | to "register" this capability by calling pci_set_dma_mask() with | |
348 | appropriate parameters. In general this allows more efficient DMA | |
349 | on systems where System RAM exists above 4G _physical_ address. | |
350 | ||
351 | Drivers for all PCI-X and PCIe compliant devices must call | |
352 | pci_set_dma_mask() as they are 64-bit DMA devices. | |
353 | ||
354 | Similarly, drivers must also "register" this capability if the device | |
355 | can directly address "consistent memory" in System RAM above 4G physical | |
356 | address by calling pci_set_consistent_dma_mask(). | |
357 | Again, this includes drivers for all PCI-X and PCIe compliant devices. | |
358 | Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are | |
359 | 64-bit DMA capable for payload ("streaming") data but not control | |
360 | ("consistent") data. | |
361 | ||
362 | ||
363 | 3.4 Setup shared control data | |
364 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
365 | Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared) | |
366 | memory. See Documentation/DMA-API.txt for a full description of | |
367 | the DMA APIs. This section is just a reminder that it needs to be done | |
368 | before enabling DMA on the device. | |
369 | ||
370 | ||
371 | 3.5 Initialize device registers | |
372 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
373 | Some drivers will need specific "capability" fields programmed | |
374 | or other "vendor specific" register initialized or reset. | |
375 | E.g. clearing pending interrupts. | |
376 | ||
377 | ||
378 | 3.6 Register IRQ handler | |
379 | ~~~~~~~~~~~~~~~~~~~~~~~~ | |
380 | While calling request_irq() is the the last step described here, | |
381 | this is often just another intermediate step to initialize a device. | |
382 | This step can often be deferred until the device is opened for use. | |
383 | ||
384 | All interrupt handlers for IRQ lines should be registered with IRQF_SHARED | |
385 | and use the devid to map IRQs to devices (remember that all PCI IRQ lines | |
386 | can be shared). | |
387 | ||
388 | request_irq() will associate an interrupt handler and device handle | |
389 | with an interrupt number. Historically interrupt numbers represent | |
390 | IRQ lines which run from the PCI device to the Interrupt controller. | |
391 | With MSI and MSI-X (more below) the interrupt number is a CPU "vector". | |
392 | ||
393 | request_irq() also enables the interrupt. Make sure the device is | |
394 | quiesced and does not have any interrupts pending before registering | |
395 | the interrupt handler. | |
396 | ||
397 | MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts" | |
398 | which deliver interrupts to the CPU via a DMA write to a Local APIC. | |
399 | The fundamental difference between MSI and MSI-X is how multiple | |
400 | "vectors" get allocated. MSI requires contiguous blocks of vectors | |
401 | while MSI-X can allocate several individual ones. | |
402 | ||
403 | MSI capability can be enabled by calling pci_enable_msi() or | |
404 | pci_enable_msix() before calling request_irq(). This causes | |
405 | the PCI support to program CPU vector data into the PCI device | |
406 | capability registers. | |
407 | ||
408 | If your PCI device supports both, try to enable MSI-X first. | |
409 | Only one can be enabled at a time. Many architectures, chip-sets, | |
410 | or BIOSes do NOT support MSI or MSI-X and the call to pci_enable_msi/msix | |
411 | will fail. This is important to note since many drivers have | |
412 | two (or more) interrupt handlers: one for MSI/MSI-X and another for IRQs. | |
413 | They choose which handler to register with request_irq() based on the | |
414 | return value from pci_enable_msi/msix(). | |
415 | ||
416 | There are (at least) two really good reasons for using MSI: | |
417 | 1) MSI is an exclusive interrupt vector by definition. | |
418 | This means the interrupt handler doesn't have to verify | |
419 | its device caused the interrupt. | |
420 | ||
421 | 2) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed | |
422 | to be visible to the host CPU(s) when the MSI is delivered. This | |
423 | is important for both data coherency and avoiding stale control data. | |
424 | This guarantee allows the driver to omit MMIO reads to flush | |
425 | the DMA stream. | |
426 | ||
427 | See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples | |
428 | of MSI/MSI-X usage. | |
429 | ||
430 | ||
431 | ||
432 | 4. PCI device shutdown | |
433 | ~~~~~~~~~~~~~~~~~~~~~~~ | |
434 | ||
435 | When a PCI device driver is being unloaded, most of the following | |
436 | steps need to be performed: | |
437 | ||
438 | Disable the device from generating IRQs | |
439 | Release the IRQ (free_irq()) | |
440 | Stop all DMA activity | |
441 | Release DMA buffers (both streaming and consistent) | |
442 | Unregister from other subsystems (e.g. scsi or netdev) | |
443 | Disable device from responding to MMIO/IO Port addresses | |
444 | Release MMIO/IO Port resource(s) | |
445 | ||
446 | ||
447 | 4.1 Stop IRQs on the device | |
448 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
449 | How to do this is chip/device specific. If it's not done, it opens | |
450 | the possibility of a "screaming interrupt" if (and only if) | |
451 | the IRQ is shared with another device. | |
452 | ||
453 | When the shared IRQ handler is "unhooked", the remaining devices | |
454 | using the same IRQ line will still need the IRQ enabled. Thus if the | |
455 | "unhooked" device asserts IRQ line, the system will respond assuming | |
456 | it was one of the remaining devices asserted the IRQ line. Since none | |
457 | of the other devices will handle the IRQ, the system will "hang" until | |
458 | it decides the IRQ isn't going to get handled and masks the IRQ (100,000 | |
459 | iterations later). Once the shared IRQ is masked, the remaining devices | |
460 | will stop functioning properly. Not a nice situation. | |
461 | ||
462 | This is another reason to use MSI or MSI-X if it's available. | |
463 | MSI and MSI-X are defined to be exclusive interrupts and thus | |
464 | are not susceptible to the "screaming interrupt" problem. | |
465 | ||
466 | ||
467 | 4.2 Release the IRQ | |
468 | ~~~~~~~~~~~~~~~~~~~ | |
469 | Once the device is quiesced (no more IRQs), one can call free_irq(). | |
470 | This function will return control once any pending IRQs are handled, | |
471 | "unhook" the drivers IRQ handler from that IRQ, and finally release | |
472 | the IRQ if no one else is using it. | |
473 | ||
474 | ||
475 | 4.3 Stop all DMA activity | |
476 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
477 | It's extremely important to stop all DMA operations BEFORE attempting | |
478 | to deallocate DMA control data. Failure to do so can result in memory | |
479 | corruption, hangs, and on some chip-sets a hard crash. | |
1da177e4 | 480 | |
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481 | Stopping DMA after stopping the IRQs can avoid races where the |
482 | IRQ handler might restart DMA engines. | |
483 | ||
484 | While this step sounds obvious and trivial, several "mature" drivers | |
485 | didn't get this step right in the past. | |
486 | ||
487 | ||
488 | 4.4 Release DMA buffers | |
489 | ~~~~~~~~~~~~~~~~~~~~~~~ | |
490 | Once DMA is stopped, clean up streaming DMA first. | |
491 | I.e. unmap data buffers and return buffers to "upstream" | |
492 | owners if there is one. | |
493 | ||
494 | Then clean up "consistent" buffers which contain the control data. | |
495 | ||
496 | See Documentation/DMA-API.txt for details on unmapping interfaces. | |
497 | ||
498 | ||
499 | 4.5 Unregister from other subsystems | |
500 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
501 | Most low level PCI device drivers support some other subsystem | |
502 | like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your | |
503 | driver isn't losing resources from that other subsystem. | |
504 | If this happens, typically the symptom is an Oops (panic) when | |
505 | the subsystem attempts to call into a driver that has been unloaded. | |
506 | ||
507 | ||
508 | 4.6 Disable Device from responding to MMIO/IO Port addresses | |
509 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
510 | io_unmap() MMIO or IO Port resources and then call pci_disable_device(). | |
511 | This is the symmetric opposite of pci_enable_device(). | |
512 | Do not access device registers after calling pci_disable_device(). | |
513 | ||
514 | ||
515 | 4.7 Release MMIO/IO Port Resource(s) | |
516 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
517 | Call pci_release_region() to mark the MMIO or IO Port range as available. | |
518 | Failure to do so usually results in the inability to reload the driver. | |
519 | ||
520 | ||
521 | ||
522 | 5. How to access PCI config space | |
1da177e4 | 523 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
74da15eb GG |
524 | |
525 | You can use pci_(read|write)_config_(byte|word|dword) to access the config | |
1da177e4 LT |
526 | space of a device represented by struct pci_dev *. All these functions return 0 |
527 | when successful or an error code (PCIBIOS_...) which can be translated to a text | |
528 | string by pcibios_strerror. Most drivers expect that accesses to valid PCI | |
529 | devices don't fail. | |
530 | ||
74da15eb | 531 | If you don't have a struct pci_dev available, you can call |
1da177e4 LT |
532 | pci_bus_(read|write)_config_(byte|word|dword) to access a given device |
533 | and function on that bus. | |
534 | ||
74da15eb | 535 | If you access fields in the standard portion of the config header, please |
1da177e4 LT |
536 | use symbolic names of locations and bits declared in <linux/pci.h>. |
537 | ||
74da15eb | 538 | If you need to access Extended PCI Capability registers, just call |
1da177e4 LT |
539 | pci_find_capability() for the particular capability and it will find the |
540 | corresponding register block for you. | |
541 | ||
542 | ||
1da177e4 LT |
543 | |
544 | 6. Other interesting functions | |
545 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb | 546 | |
1da177e4 LT |
547 | pci_find_slot() Find pci_dev corresponding to given bus and |
548 | slot numbers. | |
549 | pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3) | |
550 | pci_find_capability() Find specified capability in device's capability | |
551 | list. | |
552 | pci_module_init() Inline helper function for ensuring correct | |
553 | pci_driver initialization and error handling. | |
554 | pci_resource_start() Returns bus start address for a given PCI region | |
555 | pci_resource_end() Returns bus end address for a given PCI region | |
556 | pci_resource_len() Returns the byte length of a PCI region | |
557 | pci_set_drvdata() Set private driver data pointer for a pci_dev | |
558 | pci_get_drvdata() Return private driver data pointer for a pci_dev | |
559 | pci_set_mwi() Enable Memory-Write-Invalidate transactions. | |
560 | pci_clear_mwi() Disable Memory-Write-Invalidate transactions. | |
561 | ||
562 | ||
74da15eb | 563 | |
1da177e4 LT |
564 | 7. Miscellaneous hints |
565 | ~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb GG |
566 | |
567 | When displaying PCI device names to the user (for example when a driver wants | |
568 | to tell the user what card has it found), please use pci_name(pci_dev). | |
1da177e4 LT |
569 | |
570 | Always refer to the PCI devices by a pointer to the pci_dev structure. | |
571 | All PCI layer functions use this identification and it's the only | |
572 | reasonable one. Don't use bus/slot/function numbers except for very | |
573 | special purposes -- on systems with multiple primary buses their semantics | |
574 | can be pretty complex. | |
575 | ||
1da177e4 LT |
576 | Don't try to turn on Fast Back to Back writes in your driver. All devices |
577 | on the bus need to be capable of doing it, so this is something which needs | |
578 | to be handled by platform and generic code, not individual drivers. | |
579 | ||
580 | ||
74da15eb | 581 | |
9b860b8c IO |
582 | 8. Vendor and device identifications |
583 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
9b860b8c | 584 | |
74da15eb GG |
585 | One is not not required to add new device ids to include/linux/pci_ids.h. |
586 | Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids. | |
587 | ||
588 | PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary | |
589 | hex numbers (vendor controlled) and normally used only in a single | |
590 | location, the pci_device_id table. | |
591 | ||
592 | Please DO submit new vendor/device ids to pciids.sourceforge.net project. | |
593 | ||
9b860b8c | 594 | |
9b860b8c IO |
595 | |
596 | 9. Obsolete functions | |
1da177e4 | 597 | ~~~~~~~~~~~~~~~~~~~~~ |
74da15eb | 598 | |
1da177e4 LT |
599 | There are several functions which you might come across when trying to |
600 | port an old driver to the new PCI interface. They are no longer present | |
601 | in the kernel as they aren't compatible with hotplug or PCI domains or | |
602 | having sane locking. | |
603 | ||
74da15eb GG |
604 | pci_find_device() Superseded by pci_get_device() |
605 | pci_find_subsys() Superseded by pci_get_subsys() | |
606 | pci_find_slot() Superseded by pci_get_slot() | |
607 | ||
608 | ||
609 | The alternative is the traditional PCI device driver that walks PCI | |
610 | device lists. This is still possible but discouraged. | |
611 | ||
612 | ||
613 | ||
614 | 10. pci_enable_device_bars() and Legacy I/O Port space | |
615 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
616 | ||
617 | Large servers may not be able to provide I/O port resources to all PCI | |
618 | devices. I/O Port space is only 64KB on Intel Architecture[1] and is | |
619 | likely also fragmented since the I/O base register of PCI-to-PCI | |
620 | bridge will usually be aligned to a 4KB boundary[2]. On such systems, | |
621 | pci_enable_device() and pci_request_region() will fail when | |
622 | attempting to enable I/O Port regions that don't have I/O Port | |
623 | resources assigned. | |
624 | ||
625 | Fortunately, many PCI devices which request I/O Port resources also | |
626 | provide access to the same registers via MMIO BARs. These devices can | |
627 | be handled without using I/O port space and the drivers typically | |
628 | offer a CONFIG_ option to only use MMIO regions | |
629 | (e.g. CONFIG_TULIP_MMIO). PCI devices typically provide I/O port | |
630 | interface for legacy OSes and will work when I/O port resources are not | |
631 | assigned. The "PCI Local Bus Specification Revision 3.0" discusses | |
632 | this on p.44, "IMPLEMENTATION NOTE". | |
633 | ||
634 | If your PCI device driver doesn't need I/O port resources assigned to | |
635 | I/O Port BARs, you should use pci_enable_device_bars() instead of | |
636 | pci_enable_device() in order not to enable I/O port regions for the | |
637 | corresponding devices. In addition, you should use | |
638 | pci_request_selected_regions() and pci_release_selected_regions() | |
639 | instead of pci_request_regions()/pci_release_regions() in order not to | |
640 | request/release I/O port regions for the corresponding devices. | |
641 | ||
642 | [1] Some systems support 64KB I/O port space per PCI segment. | |
643 | [2] Some PCI-to-PCI bridges support optional 1KB aligned I/O base. | |
644 | ||
645 | ||
646 | ||
647 | 11. MMIO Space and "Write Posting" | |
648 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
649 | ||
650 | Converting a driver from using I/O Port space to using MMIO space | |
651 | often requires some additional changes. Specifically, "write posting" | |
652 | needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2) | |
653 | already do this. I/O Port space guarantees write transactions reach the PCI | |
654 | device before the CPU can continue. Writes to MMIO space allow the CPU | |
655 | to continue before the transaction reaches the PCI device. HW weenies | |
656 | call this "Write Posting" because the write completion is "posted" to | |
657 | the CPU before the transaction has reached its destination. | |
658 | ||
659 | Thus, timing sensitive code should add readl() where the CPU is | |
660 | expected to wait before doing other work. The classic "bit banging" | |
661 | sequence works fine for I/O Port space: | |
662 | ||
663 | for (i = 8; --i; val >>= 1) { | |
664 | outb(val & 1, ioport_reg); /* write bit */ | |
665 | udelay(10); | |
666 | } | |
667 | ||
668 | The same sequence for MMIO space should be: | |
669 | ||
670 | for (i = 8; --i; val >>= 1) { | |
671 | writeb(val & 1, mmio_reg); /* write bit */ | |
672 | readb(safe_mmio_reg); /* flush posted write */ | |
673 | udelay(10); | |
674 | } | |
675 | ||
676 | It is important that "safe_mmio_reg" not have any side effects that | |
677 | interferes with the correct operation of the device. | |
678 | ||
679 | Another case to watch out for is when resetting a PCI device. Use PCI | |
680 | Configuration space reads to flush the writel(). This will gracefully | |
681 | handle the PCI master abort on all platforms if the PCI device is | |
682 | expected to not respond to a readl(). Most x86 platforms will allow | |
683 | MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage | |
684 | (e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail"). | |
685 |