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1 | .. SPDX-License-Identifier: GPL-2.0 |
2 | ||
3 | =================================================================== | |
9c1b96e3 AK |
4 | The Definitive KVM (Kernel-based Virtual Machine) API Documentation |
5 | =================================================================== | |
6 | ||
7 | 1. General description | |
106ee47d | 8 | ====================== |
9c1b96e3 AK |
9 | |
10 | The kvm API is a set of ioctls that are issued to control various aspects | |
80b10aa9 | 11 | of a virtual machine. The ioctls belong to the following classes: |
9c1b96e3 AK |
12 | |
13 | - System ioctls: These query and set global attributes which affect the | |
14 | whole kvm subsystem. In addition a system ioctl is used to create | |
5e124900 | 15 | virtual machines. |
9c1b96e3 AK |
16 | |
17 | - VM ioctls: These query and set attributes that affect an entire virtual | |
18 | machine, for example memory layout. In addition a VM ioctl is used to | |
ddba9180 | 19 | create virtual cpus (vcpus) and devices. |
9c1b96e3 | 20 | |
5e124900 SC |
21 | VM ioctls must be issued from the same process (address space) that was |
22 | used to create the VM. | |
9c1b96e3 AK |
23 | |
24 | - vcpu ioctls: These query and set attributes that control the operation | |
25 | of a single virtual cpu. | |
26 | ||
5e124900 SC |
27 | vcpu ioctls should be issued from the same thread that was used to create |
28 | the vcpu, except for asynchronous vcpu ioctl that are marked as such in | |
29 | the documentation. Otherwise, the first ioctl after switching threads | |
30 | could see a performance impact. | |
9c1b96e3 | 31 | |
ddba9180 SC |
32 | - device ioctls: These query and set attributes that control the operation |
33 | of a single device. | |
34 | ||
35 | device ioctls must be issued from the same process (address space) that | |
36 | was used to create the VM. | |
414fa985 | 37 | |
2044892d | 38 | 2. File descriptors |
106ee47d | 39 | =================== |
9c1b96e3 AK |
40 | |
41 | The kvm API is centered around file descriptors. An initial | |
42 | open("/dev/kvm") obtains a handle to the kvm subsystem; this handle | |
43 | can be used to issue system ioctls. A KVM_CREATE_VM ioctl on this | |
2044892d | 44 | handle will create a VM file descriptor which can be used to issue VM |
ddba9180 SC |
45 | ioctls. A KVM_CREATE_VCPU or KVM_CREATE_DEVICE ioctl on a VM fd will |
46 | create a virtual cpu or device and return a file descriptor pointing to | |
47 | the new resource. Finally, ioctls on a vcpu or device fd can be used | |
48 | to control the vcpu or device. For vcpus, this includes the important | |
49 | task of actually running guest code. | |
9c1b96e3 AK |
50 | |
51 | In general file descriptors can be migrated among processes by means | |
52 | of fork() and the SCM_RIGHTS facility of unix domain socket. These | |
53 | kinds of tricks are explicitly not supported by kvm. While they will | |
54 | not cause harm to the host, their actual behavior is not guaranteed by | |
5e124900 SC |
55 | the API. See "General description" for details on the ioctl usage |
56 | model that is supported by KVM. | |
eca6be56 | 57 | |
919f6cd8 SC |
58 | It is important to note that althought VM ioctls may only be issued from |
59 | the process that created the VM, a VM's lifecycle is associated with its | |
60 | file descriptor, not its creator (process). In other words, the VM and | |
61 | its resources, *including the associated address space*, are not freed | |
62 | until the last reference to the VM's file descriptor has been released. | |
63 | For example, if fork() is issued after ioctl(KVM_CREATE_VM), the VM will | |
64 | not be freed until both the parent (original) process and its child have | |
65 | put their references to the VM's file descriptor. | |
66 | ||
67 | Because a VM's resources are not freed until the last reference to its | |
3747c5d3 | 68 | file descriptor is released, creating additional references to a VM |
919f6cd8 SC |
69 | via fork(), dup(), etc... without careful consideration is strongly |
70 | discouraged and may have unwanted side effects, e.g. memory allocated | |
71 | by and on behalf of the VM's process may not be freed/unaccounted when | |
72 | the VM is shut down. | |
73 | ||
74 | ||
9c1b96e3 | 75 | 3. Extensions |
106ee47d | 76 | ============= |
9c1b96e3 AK |
77 | |
78 | As of Linux 2.6.22, the KVM ABI has been stabilized: no backward | |
79 | incompatible change are allowed. However, there is an extension | |
80 | facility that allows backward-compatible extensions to the API to be | |
81 | queried and used. | |
82 | ||
c9f3f2d8 | 83 | The extension mechanism is not based on the Linux version number. |
9c1b96e3 AK |
84 | Instead, kvm defines extension identifiers and a facility to query |
85 | whether a particular extension identifier is available. If it is, a | |
86 | set of ioctls is available for application use. | |
87 | ||
414fa985 | 88 | |
9c1b96e3 | 89 | 4. API description |
106ee47d | 90 | ================== |
9c1b96e3 AK |
91 | |
92 | This section describes ioctls that can be used to control kvm guests. | |
93 | For each ioctl, the following information is provided along with a | |
94 | description: | |
95 | ||
106ee47d MCC |
96 | Capability: |
97 | which KVM extension provides this ioctl. Can be 'basic', | |
9c1b96e3 | 98 | which means that is will be provided by any kernel that supports |
7f05db6a | 99 | API version 12 (see section 4.1), a KVM_CAP_xyz constant, which |
9c1b96e3 | 100 | means availability needs to be checked with KVM_CHECK_EXTENSION |
7f05db6a MT |
101 | (see section 4.4), or 'none' which means that while not all kernels |
102 | support this ioctl, there's no capability bit to check its | |
103 | availability: for kernels that don't support the ioctl, | |
104 | the ioctl returns -ENOTTY. | |
9c1b96e3 | 105 | |
106ee47d MCC |
106 | Architectures: |
107 | which instruction set architectures provide this ioctl. | |
9c1b96e3 AK |
108 | x86 includes both i386 and x86_64. |
109 | ||
106ee47d MCC |
110 | Type: |
111 | system, vm, or vcpu. | |
9c1b96e3 | 112 | |
106ee47d MCC |
113 | Parameters: |
114 | what parameters are accepted by the ioctl. | |
9c1b96e3 | 115 | |
106ee47d MCC |
116 | Returns: |
117 | the return value. General error numbers (EBADF, ENOMEM, EINVAL) | |
9c1b96e3 AK |
118 | are not detailed, but errors with specific meanings are. |
119 | ||
414fa985 | 120 | |
9c1b96e3 | 121 | 4.1 KVM_GET_API_VERSION |
106ee47d | 122 | ----------------------- |
9c1b96e3 | 123 | |
106ee47d MCC |
124 | :Capability: basic |
125 | :Architectures: all | |
126 | :Type: system ioctl | |
127 | :Parameters: none | |
128 | :Returns: the constant KVM_API_VERSION (=12) | |
9c1b96e3 AK |
129 | |
130 | This identifies the API version as the stable kvm API. It is not | |
131 | expected that this number will change. However, Linux 2.6.20 and | |
132 | 2.6.21 report earlier versions; these are not documented and not | |
133 | supported. Applications should refuse to run if KVM_GET_API_VERSION | |
134 | returns a value other than 12. If this check passes, all ioctls | |
135 | described as 'basic' will be available. | |
136 | ||
414fa985 | 137 | |
9c1b96e3 | 138 | 4.2 KVM_CREATE_VM |
106ee47d | 139 | ----------------- |
9c1b96e3 | 140 | |
106ee47d MCC |
141 | :Capability: basic |
142 | :Architectures: all | |
143 | :Type: system ioctl | |
144 | :Parameters: machine type identifier (KVM_VM_*) | |
145 | :Returns: a VM fd that can be used to control the new virtual machine. | |
9c1b96e3 | 146 | |
bcb85c88 | 147 | The new VM has no virtual cpus and no memory. |
a8a3c426 | 148 | You probably want to use 0 as machine type. |
e08b9637 CO |
149 | |
150 | In order to create user controlled virtual machines on S390, check | |
151 | KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as | |
152 | privileged user (CAP_SYS_ADMIN). | |
9c1b96e3 | 153 | |
a8a3c426 JH |
154 | To use hardware assisted virtualization on MIPS (VZ ASE) rather than |
155 | the default trap & emulate implementation (which changes the virtual | |
156 | memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the | |
157 | flag KVM_VM_MIPS_VZ. | |
158 | ||
414fa985 | 159 | |
233a7cb2 SP |
160 | On arm64, the physical address size for a VM (IPA Size limit) is limited |
161 | to 40bits by default. The limit can be configured if the host supports the | |
162 | extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, use | |
163 | KVM_VM_TYPE_ARM_IPA_SIZE(IPA_Bits) to set the size in the machine type | |
164 | identifier, where IPA_Bits is the maximum width of any physical | |
165 | address used by the VM. The IPA_Bits is encoded in bits[7-0] of the | |
166 | machine type identifier. | |
167 | ||
106ee47d | 168 | e.g, to configure a guest to use 48bit physical address size:: |
233a7cb2 SP |
169 | |
170 | vm_fd = ioctl(dev_fd, KVM_CREATE_VM, KVM_VM_TYPE_ARM_IPA_SIZE(48)); | |
171 | ||
106ee47d | 172 | The requested size (IPA_Bits) must be: |
233a7cb2 | 173 | |
106ee47d MCC |
174 | == ========================================================= |
175 | 0 Implies default size, 40bits (for backward compatibility) | |
176 | N Implies N bits, where N is a positive integer such that, | |
233a7cb2 | 177 | 32 <= N <= Host_IPA_Limit |
106ee47d | 178 | == ========================================================= |
233a7cb2 SP |
179 | |
180 | Host_IPA_Limit is the maximum possible value for IPA_Bits on the host and | |
181 | is dependent on the CPU capability and the kernel configuration. The limit can | |
182 | be retrieved using KVM_CAP_ARM_VM_IPA_SIZE of the KVM_CHECK_EXTENSION | |
183 | ioctl() at run-time. | |
184 | ||
185 | Please note that configuring the IPA size does not affect the capability | |
186 | exposed by the guest CPUs in ID_AA64MMFR0_EL1[PARange]. It only affects | |
187 | size of the address translated by the stage2 level (guest physical to | |
188 | host physical address translations). | |
189 | ||
190 | ||
801e459a | 191 | 4.3 KVM_GET_MSR_INDEX_LIST, KVM_GET_MSR_FEATURE_INDEX_LIST |
106ee47d MCC |
192 | ---------------------------------------------------------- |
193 | ||
194 | :Capability: basic, KVM_CAP_GET_MSR_FEATURES for KVM_GET_MSR_FEATURE_INDEX_LIST | |
195 | :Architectures: x86 | |
196 | :Type: system ioctl | |
197 | :Parameters: struct kvm_msr_list (in/out) | |
198 | :Returns: 0 on success; -1 on error | |
9c1b96e3 | 199 | |
9c1b96e3 | 200 | Errors: |
106ee47d MCC |
201 | |
202 | ====== ============================================================ | |
203 | EFAULT the msr index list cannot be read from or written to | |
204 | E2BIG the msr index list is to be to fit in the array specified by | |
9c1b96e3 | 205 | the user. |
106ee47d | 206 | ====== ============================================================ |
9c1b96e3 | 207 | |
106ee47d MCC |
208 | :: |
209 | ||
210 | struct kvm_msr_list { | |
9c1b96e3 AK |
211 | __u32 nmsrs; /* number of msrs in entries */ |
212 | __u32 indices[0]; | |
106ee47d | 213 | }; |
9c1b96e3 | 214 | |
801e459a TL |
215 | The user fills in the size of the indices array in nmsrs, and in return |
216 | kvm adjusts nmsrs to reflect the actual number of msrs and fills in the | |
217 | indices array with their numbers. | |
218 | ||
219 | KVM_GET_MSR_INDEX_LIST returns the guest msrs that are supported. The list | |
220 | varies by kvm version and host processor, but does not change otherwise. | |
9c1b96e3 | 221 | |
2e2602ca AK |
222 | Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are |
223 | not returned in the MSR list, as different vcpus can have a different number | |
224 | of banks, as set via the KVM_X86_SETUP_MCE ioctl. | |
225 | ||
801e459a TL |
226 | KVM_GET_MSR_FEATURE_INDEX_LIST returns the list of MSRs that can be passed |
227 | to the KVM_GET_MSRS system ioctl. This lets userspace probe host capabilities | |
228 | and processor features that are exposed via MSRs (e.g., VMX capabilities). | |
229 | This list also varies by kvm version and host processor, but does not change | |
230 | otherwise. | |
231 | ||
414fa985 | 232 | |
9c1b96e3 | 233 | 4.4 KVM_CHECK_EXTENSION |
106ee47d | 234 | ----------------------- |
9c1b96e3 | 235 | |
106ee47d MCC |
236 | :Capability: basic, KVM_CAP_CHECK_EXTENSION_VM for vm ioctl |
237 | :Architectures: all | |
238 | :Type: system ioctl, vm ioctl | |
239 | :Parameters: extension identifier (KVM_CAP_*) | |
240 | :Returns: 0 if unsupported; 1 (or some other positive integer) if supported | |
9c1b96e3 AK |
241 | |
242 | The API allows the application to query about extensions to the core | |
243 | kvm API. Userspace passes an extension identifier (an integer) and | |
244 | receives an integer that describes the extension availability. | |
245 | Generally 0 means no and 1 means yes, but some extensions may report | |
246 | additional information in the integer return value. | |
247 | ||
92b591a4 AG |
248 | Based on their initialization different VMs may have different capabilities. |
249 | It is thus encouraged to use the vm ioctl to query for capabilities (available | |
250 | with KVM_CAP_CHECK_EXTENSION_VM on the vm fd) | |
414fa985 | 251 | |
9c1b96e3 | 252 | 4.5 KVM_GET_VCPU_MMAP_SIZE |
106ee47d | 253 | -------------------------- |
9c1b96e3 | 254 | |
106ee47d MCC |
255 | :Capability: basic |
256 | :Architectures: all | |
257 | :Type: system ioctl | |
258 | :Parameters: none | |
259 | :Returns: size of vcpu mmap area, in bytes | |
9c1b96e3 AK |
260 | |
261 | The KVM_RUN ioctl (cf.) communicates with userspace via a shared | |
262 | memory region. This ioctl returns the size of that region. See the | |
263 | KVM_RUN documentation for details. | |
264 | ||
414fa985 | 265 | |
9c1b96e3 | 266 | 4.6 KVM_SET_MEMORY_REGION |
106ee47d | 267 | ------------------------- |
9c1b96e3 | 268 | |
106ee47d MCC |
269 | :Capability: basic |
270 | :Architectures: all | |
271 | :Type: vm ioctl | |
272 | :Parameters: struct kvm_memory_region (in) | |
273 | :Returns: 0 on success, -1 on error | |
9c1b96e3 | 274 | |
b74a07be | 275 | This ioctl is obsolete and has been removed. |
9c1b96e3 | 276 | |
414fa985 | 277 | |
68ba6974 | 278 | 4.7 KVM_CREATE_VCPU |
106ee47d | 279 | ------------------- |
9c1b96e3 | 280 | |
106ee47d MCC |
281 | :Capability: basic |
282 | :Architectures: all | |
283 | :Type: vm ioctl | |
284 | :Parameters: vcpu id (apic id on x86) | |
285 | :Returns: vcpu fd on success, -1 on error | |
9c1b96e3 | 286 | |
0b1b1dfd GK |
287 | This API adds a vcpu to a virtual machine. No more than max_vcpus may be added. |
288 | The vcpu id is an integer in the range [0, max_vcpu_id). | |
8c3ba334 SL |
289 | |
290 | The recommended max_vcpus value can be retrieved using the KVM_CAP_NR_VCPUS of | |
291 | the KVM_CHECK_EXTENSION ioctl() at run-time. | |
292 | The maximum possible value for max_vcpus can be retrieved using the | |
293 | KVM_CAP_MAX_VCPUS of the KVM_CHECK_EXTENSION ioctl() at run-time. | |
294 | ||
76d25402 PE |
295 | If the KVM_CAP_NR_VCPUS does not exist, you should assume that max_vcpus is 4 |
296 | cpus max. | |
8c3ba334 SL |
297 | If the KVM_CAP_MAX_VCPUS does not exist, you should assume that max_vcpus is |
298 | same as the value returned from KVM_CAP_NR_VCPUS. | |
9c1b96e3 | 299 | |
0b1b1dfd GK |
300 | The maximum possible value for max_vcpu_id can be retrieved using the |
301 | KVM_CAP_MAX_VCPU_ID of the KVM_CHECK_EXTENSION ioctl() at run-time. | |
302 | ||
303 | If the KVM_CAP_MAX_VCPU_ID does not exist, you should assume that max_vcpu_id | |
304 | is the same as the value returned from KVM_CAP_MAX_VCPUS. | |
305 | ||
371fefd6 PM |
306 | On powerpc using book3s_hv mode, the vcpus are mapped onto virtual |
307 | threads in one or more virtual CPU cores. (This is because the | |
308 | hardware requires all the hardware threads in a CPU core to be in the | |
309 | same partition.) The KVM_CAP_PPC_SMT capability indicates the number | |
36442687 AK |
310 | of vcpus per virtual core (vcore). The vcore id is obtained by |
311 | dividing the vcpu id by the number of vcpus per vcore. The vcpus in a | |
312 | given vcore will always be in the same physical core as each other | |
313 | (though that might be a different physical core from time to time). | |
314 | Userspace can control the threading (SMT) mode of the guest by its | |
315 | allocation of vcpu ids. For example, if userspace wants | |
316 | single-threaded guest vcpus, it should make all vcpu ids be a multiple | |
317 | of the number of vcpus per vcore. | |
318 | ||
5b1c1493 CO |
319 | For virtual cpus that have been created with S390 user controlled virtual |
320 | machines, the resulting vcpu fd can be memory mapped at page offset | |
321 | KVM_S390_SIE_PAGE_OFFSET in order to obtain a memory map of the virtual | |
322 | cpu's hardware control block. | |
323 | ||
414fa985 | 324 | |
68ba6974 | 325 | 4.8 KVM_GET_DIRTY_LOG (vm ioctl) |
106ee47d | 326 | -------------------------------- |
9c1b96e3 | 327 | |
106ee47d MCC |
328 | :Capability: basic |
329 | :Architectures: all | |
330 | :Type: vm ioctl | |
331 | :Parameters: struct kvm_dirty_log (in/out) | |
332 | :Returns: 0 on success, -1 on error | |
9c1b96e3 | 333 | |
106ee47d MCC |
334 | :: |
335 | ||
336 | /* for KVM_GET_DIRTY_LOG */ | |
337 | struct kvm_dirty_log { | |
9c1b96e3 AK |
338 | __u32 slot; |
339 | __u32 padding; | |
340 | union { | |
341 | void __user *dirty_bitmap; /* one bit per page */ | |
342 | __u64 padding; | |
343 | }; | |
106ee47d | 344 | }; |
9c1b96e3 AK |
345 | |
346 | Given a memory slot, return a bitmap containing any pages dirtied | |
347 | since the last call to this ioctl. Bit 0 is the first page in the | |
348 | memory slot. Ensure the entire structure is cleared to avoid padding | |
349 | issues. | |
350 | ||
f481b069 PB |
351 | If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 specifies |
352 | the address space for which you want to return the dirty bitmap. | |
353 | They must be less than the value that KVM_CHECK_EXTENSION returns for | |
354 | the KVM_CAP_MULTI_ADDRESS_SPACE capability. | |
355 | ||
2a31b9db | 356 | The bits in the dirty bitmap are cleared before the ioctl returns, unless |
d7547c55 | 357 | KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 is enabled. For more information, |
2a31b9db | 358 | see the description of the capability. |
414fa985 | 359 | |
68ba6974 | 360 | 4.9 KVM_SET_MEMORY_ALIAS |
106ee47d | 361 | ------------------------ |
9c1b96e3 | 362 | |
106ee47d MCC |
363 | :Capability: basic |
364 | :Architectures: x86 | |
365 | :Type: vm ioctl | |
366 | :Parameters: struct kvm_memory_alias (in) | |
367 | :Returns: 0 (success), -1 (error) | |
9c1b96e3 | 368 | |
a1f4d395 | 369 | This ioctl is obsolete and has been removed. |
9c1b96e3 | 370 | |
414fa985 | 371 | |
68ba6974 | 372 | 4.10 KVM_RUN |
106ee47d MCC |
373 | ------------ |
374 | ||
375 | :Capability: basic | |
376 | :Architectures: all | |
377 | :Type: vcpu ioctl | |
378 | :Parameters: none | |
379 | :Returns: 0 on success, -1 on error | |
9c1b96e3 | 380 | |
9c1b96e3 | 381 | Errors: |
106ee47d MCC |
382 | |
383 | ===== ============================= | |
384 | EINTR an unmasked signal is pending | |
385 | ===== ============================= | |
9c1b96e3 AK |
386 | |
387 | This ioctl is used to run a guest virtual cpu. While there are no | |
388 | explicit parameters, there is an implicit parameter block that can be | |
389 | obtained by mmap()ing the vcpu fd at offset 0, with the size given by | |
390 | KVM_GET_VCPU_MMAP_SIZE. The parameter block is formatted as a 'struct | |
391 | kvm_run' (see below). | |
392 | ||
414fa985 | 393 | |
68ba6974 | 394 | 4.11 KVM_GET_REGS |
106ee47d | 395 | ----------------- |
9c1b96e3 | 396 | |
106ee47d MCC |
397 | :Capability: basic |
398 | :Architectures: all except ARM, arm64 | |
399 | :Type: vcpu ioctl | |
400 | :Parameters: struct kvm_regs (out) | |
401 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
402 | |
403 | Reads the general purpose registers from the vcpu. | |
404 | ||
106ee47d MCC |
405 | :: |
406 | ||
407 | /* x86 */ | |
408 | struct kvm_regs { | |
9c1b96e3 AK |
409 | /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ |
410 | __u64 rax, rbx, rcx, rdx; | |
411 | __u64 rsi, rdi, rsp, rbp; | |
412 | __u64 r8, r9, r10, r11; | |
413 | __u64 r12, r13, r14, r15; | |
414 | __u64 rip, rflags; | |
106ee47d | 415 | }; |
9c1b96e3 | 416 | |
106ee47d MCC |
417 | /* mips */ |
418 | struct kvm_regs { | |
c2d2c21b JH |
419 | /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ |
420 | __u64 gpr[32]; | |
421 | __u64 hi; | |
422 | __u64 lo; | |
423 | __u64 pc; | |
106ee47d | 424 | }; |
c2d2c21b | 425 | |
414fa985 | 426 | |
68ba6974 | 427 | 4.12 KVM_SET_REGS |
106ee47d | 428 | ----------------- |
9c1b96e3 | 429 | |
106ee47d MCC |
430 | :Capability: basic |
431 | :Architectures: all except ARM, arm64 | |
432 | :Type: vcpu ioctl | |
433 | :Parameters: struct kvm_regs (in) | |
434 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
435 | |
436 | Writes the general purpose registers into the vcpu. | |
437 | ||
438 | See KVM_GET_REGS for the data structure. | |
439 | ||
414fa985 | 440 | |
68ba6974 | 441 | 4.13 KVM_GET_SREGS |
106ee47d | 442 | ------------------ |
9c1b96e3 | 443 | |
106ee47d MCC |
444 | :Capability: basic |
445 | :Architectures: x86, ppc | |
446 | :Type: vcpu ioctl | |
447 | :Parameters: struct kvm_sregs (out) | |
448 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
449 | |
450 | Reads special registers from the vcpu. | |
451 | ||
106ee47d MCC |
452 | :: |
453 | ||
454 | /* x86 */ | |
455 | struct kvm_sregs { | |
9c1b96e3 AK |
456 | struct kvm_segment cs, ds, es, fs, gs, ss; |
457 | struct kvm_segment tr, ldt; | |
458 | struct kvm_dtable gdt, idt; | |
459 | __u64 cr0, cr2, cr3, cr4, cr8; | |
460 | __u64 efer; | |
461 | __u64 apic_base; | |
462 | __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; | |
106ee47d | 463 | }; |
9c1b96e3 | 464 | |
106ee47d | 465 | /* ppc -- see arch/powerpc/include/uapi/asm/kvm.h */ |
5ce941ee | 466 | |
9c1b96e3 AK |
467 | interrupt_bitmap is a bitmap of pending external interrupts. At most |
468 | one bit may be set. This interrupt has been acknowledged by the APIC | |
469 | but not yet injected into the cpu core. | |
470 | ||
414fa985 | 471 | |
68ba6974 | 472 | 4.14 KVM_SET_SREGS |
106ee47d | 473 | ------------------ |
9c1b96e3 | 474 | |
106ee47d MCC |
475 | :Capability: basic |
476 | :Architectures: x86, ppc | |
477 | :Type: vcpu ioctl | |
478 | :Parameters: struct kvm_sregs (in) | |
479 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
480 | |
481 | Writes special registers into the vcpu. See KVM_GET_SREGS for the | |
482 | data structures. | |
483 | ||
414fa985 | 484 | |
68ba6974 | 485 | 4.15 KVM_TRANSLATE |
106ee47d | 486 | ------------------ |
9c1b96e3 | 487 | |
106ee47d MCC |
488 | :Capability: basic |
489 | :Architectures: x86 | |
490 | :Type: vcpu ioctl | |
491 | :Parameters: struct kvm_translation (in/out) | |
492 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
493 | |
494 | Translates a virtual address according to the vcpu's current address | |
495 | translation mode. | |
496 | ||
106ee47d MCC |
497 | :: |
498 | ||
499 | struct kvm_translation { | |
9c1b96e3 AK |
500 | /* in */ |
501 | __u64 linear_address; | |
502 | ||
503 | /* out */ | |
504 | __u64 physical_address; | |
505 | __u8 valid; | |
506 | __u8 writeable; | |
507 | __u8 usermode; | |
508 | __u8 pad[5]; | |
106ee47d | 509 | }; |
9c1b96e3 | 510 | |
414fa985 | 511 | |
68ba6974 | 512 | 4.16 KVM_INTERRUPT |
106ee47d | 513 | ------------------ |
9c1b96e3 | 514 | |
106ee47d MCC |
515 | :Capability: basic |
516 | :Architectures: x86, ppc, mips | |
517 | :Type: vcpu ioctl | |
518 | :Parameters: struct kvm_interrupt (in) | |
519 | :Returns: 0 on success, negative on failure. | |
9c1b96e3 | 520 | |
1c1a9ce9 | 521 | Queues a hardware interrupt vector to be injected. |
9c1b96e3 | 522 | |
106ee47d MCC |
523 | :: |
524 | ||
525 | /* for KVM_INTERRUPT */ | |
526 | struct kvm_interrupt { | |
9c1b96e3 AK |
527 | /* in */ |
528 | __u32 irq; | |
106ee47d | 529 | }; |
9c1b96e3 | 530 | |
6f7a2bd4 | 531 | X86: |
106ee47d MCC |
532 | ^^^^ |
533 | ||
534 | :Returns: | |
6f7a2bd4 | 535 | |
106ee47d MCC |
536 | ========= =================================== |
537 | 0 on success, | |
538 | -EEXIST if an interrupt is already enqueued | |
3747c5d3 | 539 | -EINVAL the irq number is invalid |
106ee47d MCC |
540 | -ENXIO if the PIC is in the kernel |
541 | -EFAULT if the pointer is invalid | |
542 | ========= =================================== | |
1c1a9ce9 SR |
543 | |
544 | Note 'irq' is an interrupt vector, not an interrupt pin or line. This | |
545 | ioctl is useful if the in-kernel PIC is not used. | |
9c1b96e3 | 546 | |
6f7a2bd4 | 547 | PPC: |
106ee47d | 548 | ^^^^ |
6f7a2bd4 AG |
549 | |
550 | Queues an external interrupt to be injected. This ioctl is overleaded | |
551 | with 3 different irq values: | |
552 | ||
553 | a) KVM_INTERRUPT_SET | |
554 | ||
106ee47d MCC |
555 | This injects an edge type external interrupt into the guest once it's ready |
556 | to receive interrupts. When injected, the interrupt is done. | |
6f7a2bd4 AG |
557 | |
558 | b) KVM_INTERRUPT_UNSET | |
559 | ||
106ee47d | 560 | This unsets any pending interrupt. |
6f7a2bd4 | 561 | |
106ee47d | 562 | Only available with KVM_CAP_PPC_UNSET_IRQ. |
6f7a2bd4 AG |
563 | |
564 | c) KVM_INTERRUPT_SET_LEVEL | |
565 | ||
106ee47d MCC |
566 | This injects a level type external interrupt into the guest context. The |
567 | interrupt stays pending until a specific ioctl with KVM_INTERRUPT_UNSET | |
568 | is triggered. | |
6f7a2bd4 | 569 | |
106ee47d | 570 | Only available with KVM_CAP_PPC_IRQ_LEVEL. |
6f7a2bd4 AG |
571 | |
572 | Note that any value for 'irq' other than the ones stated above is invalid | |
573 | and incurs unexpected behavior. | |
574 | ||
5e124900 SC |
575 | This is an asynchronous vcpu ioctl and can be invoked from any thread. |
576 | ||
c2d2c21b | 577 | MIPS: |
106ee47d | 578 | ^^^^^ |
c2d2c21b JH |
579 | |
580 | Queues an external interrupt to be injected into the virtual CPU. A negative | |
581 | interrupt number dequeues the interrupt. | |
582 | ||
5e124900 SC |
583 | This is an asynchronous vcpu ioctl and can be invoked from any thread. |
584 | ||
414fa985 | 585 | |
68ba6974 | 586 | 4.17 KVM_DEBUG_GUEST |
106ee47d | 587 | -------------------- |
9c1b96e3 | 588 | |
106ee47d MCC |
589 | :Capability: basic |
590 | :Architectures: none | |
591 | :Type: vcpu ioctl | |
592 | :Parameters: none) | |
593 | :Returns: -1 on error | |
9c1b96e3 AK |
594 | |
595 | Support for this has been removed. Use KVM_SET_GUEST_DEBUG instead. | |
596 | ||
414fa985 | 597 | |
68ba6974 | 598 | 4.18 KVM_GET_MSRS |
106ee47d | 599 | ----------------- |
9c1b96e3 | 600 | |
106ee47d MCC |
601 | :Capability: basic (vcpu), KVM_CAP_GET_MSR_FEATURES (system) |
602 | :Architectures: x86 | |
603 | :Type: system ioctl, vcpu ioctl | |
604 | :Parameters: struct kvm_msrs (in/out) | |
605 | :Returns: number of msrs successfully returned; | |
606 | -1 on error | |
801e459a TL |
607 | |
608 | When used as a system ioctl: | |
609 | Reads the values of MSR-based features that are available for the VM. This | |
610 | is similar to KVM_GET_SUPPORTED_CPUID, but it returns MSR indices and values. | |
611 | The list of msr-based features can be obtained using KVM_GET_MSR_FEATURE_INDEX_LIST | |
612 | in a system ioctl. | |
9c1b96e3 | 613 | |
801e459a | 614 | When used as a vcpu ioctl: |
9c1b96e3 | 615 | Reads model-specific registers from the vcpu. Supported msr indices can |
801e459a | 616 | be obtained using KVM_GET_MSR_INDEX_LIST in a system ioctl. |
9c1b96e3 | 617 | |
106ee47d MCC |
618 | :: |
619 | ||
620 | struct kvm_msrs { | |
9c1b96e3 AK |
621 | __u32 nmsrs; /* number of msrs in entries */ |
622 | __u32 pad; | |
623 | ||
624 | struct kvm_msr_entry entries[0]; | |
106ee47d | 625 | }; |
9c1b96e3 | 626 | |
106ee47d | 627 | struct kvm_msr_entry { |
9c1b96e3 AK |
628 | __u32 index; |
629 | __u32 reserved; | |
630 | __u64 data; | |
106ee47d | 631 | }; |
9c1b96e3 AK |
632 | |
633 | Application code should set the 'nmsrs' member (which indicates the | |
634 | size of the entries array) and the 'index' member of each array entry. | |
635 | kvm will fill in the 'data' member. | |
636 | ||
414fa985 | 637 | |
68ba6974 | 638 | 4.19 KVM_SET_MSRS |
106ee47d | 639 | ----------------- |
9c1b96e3 | 640 | |
106ee47d MCC |
641 | :Capability: basic |
642 | :Architectures: x86 | |
643 | :Type: vcpu ioctl | |
644 | :Parameters: struct kvm_msrs (in) | |
645 | :Returns: number of msrs successfully set (see below), -1 on error | |
9c1b96e3 AK |
646 | |
647 | Writes model-specific registers to the vcpu. See KVM_GET_MSRS for the | |
648 | data structures. | |
649 | ||
650 | Application code should set the 'nmsrs' member (which indicates the | |
651 | size of the entries array), and the 'index' and 'data' members of each | |
652 | array entry. | |
653 | ||
b274a290 XL |
654 | It tries to set the MSRs in array entries[] one by one. If setting an MSR |
655 | fails, e.g., due to setting reserved bits, the MSR isn't supported/emulated | |
656 | by KVM, etc..., it stops processing the MSR list and returns the number of | |
657 | MSRs that have been set successfully. | |
658 | ||
414fa985 | 659 | |
68ba6974 | 660 | 4.20 KVM_SET_CPUID |
106ee47d | 661 | ------------------ |
9c1b96e3 | 662 | |
106ee47d MCC |
663 | :Capability: basic |
664 | :Architectures: x86 | |
665 | :Type: vcpu ioctl | |
666 | :Parameters: struct kvm_cpuid (in) | |
667 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
668 | |
669 | Defines the vcpu responses to the cpuid instruction. Applications | |
670 | should use the KVM_SET_CPUID2 ioctl if available. | |
671 | ||
18964092 XL |
672 | Note, when this IOCTL fails, KVM gives no guarantees that previous valid CPUID |
673 | configuration (if there is) is not corrupted. Userspace can get a copy of the | |
674 | resulting CPUID configuration through KVM_GET_CPUID2 in case. | |
675 | ||
106ee47d | 676 | :: |
9c1b96e3 | 677 | |
106ee47d | 678 | struct kvm_cpuid_entry { |
9c1b96e3 AK |
679 | __u32 function; |
680 | __u32 eax; | |
681 | __u32 ebx; | |
682 | __u32 ecx; | |
683 | __u32 edx; | |
684 | __u32 padding; | |
106ee47d | 685 | }; |
9c1b96e3 | 686 | |
106ee47d MCC |
687 | /* for KVM_SET_CPUID */ |
688 | struct kvm_cpuid { | |
9c1b96e3 AK |
689 | __u32 nent; |
690 | __u32 padding; | |
691 | struct kvm_cpuid_entry entries[0]; | |
106ee47d | 692 | }; |
9c1b96e3 | 693 | |
414fa985 | 694 | |
68ba6974 | 695 | 4.21 KVM_SET_SIGNAL_MASK |
106ee47d | 696 | ------------------------ |
9c1b96e3 | 697 | |
106ee47d MCC |
698 | :Capability: basic |
699 | :Architectures: all | |
700 | :Type: vcpu ioctl | |
701 | :Parameters: struct kvm_signal_mask (in) | |
702 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
703 | |
704 | Defines which signals are blocked during execution of KVM_RUN. This | |
705 | signal mask temporarily overrides the threads signal mask. Any | |
706 | unblocked signal received (except SIGKILL and SIGSTOP, which retain | |
707 | their traditional behaviour) will cause KVM_RUN to return with -EINTR. | |
708 | ||
709 | Note the signal will only be delivered if not blocked by the original | |
710 | signal mask. | |
711 | ||
106ee47d MCC |
712 | :: |
713 | ||
714 | /* for KVM_SET_SIGNAL_MASK */ | |
715 | struct kvm_signal_mask { | |
9c1b96e3 AK |
716 | __u32 len; |
717 | __u8 sigset[0]; | |
106ee47d | 718 | }; |
9c1b96e3 | 719 | |
414fa985 | 720 | |
68ba6974 | 721 | 4.22 KVM_GET_FPU |
106ee47d | 722 | ---------------- |
9c1b96e3 | 723 | |
106ee47d MCC |
724 | :Capability: basic |
725 | :Architectures: x86 | |
726 | :Type: vcpu ioctl | |
727 | :Parameters: struct kvm_fpu (out) | |
728 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
729 | |
730 | Reads the floating point state from the vcpu. | |
731 | ||
106ee47d MCC |
732 | :: |
733 | ||
734 | /* for KVM_GET_FPU and KVM_SET_FPU */ | |
735 | struct kvm_fpu { | |
9c1b96e3 AK |
736 | __u8 fpr[8][16]; |
737 | __u16 fcw; | |
738 | __u16 fsw; | |
739 | __u8 ftwx; /* in fxsave format */ | |
740 | __u8 pad1; | |
741 | __u16 last_opcode; | |
742 | __u64 last_ip; | |
743 | __u64 last_dp; | |
744 | __u8 xmm[16][16]; | |
745 | __u32 mxcsr; | |
746 | __u32 pad2; | |
106ee47d | 747 | }; |
9c1b96e3 | 748 | |
414fa985 | 749 | |
68ba6974 | 750 | 4.23 KVM_SET_FPU |
106ee47d | 751 | ---------------- |
9c1b96e3 | 752 | |
106ee47d MCC |
753 | :Capability: basic |
754 | :Architectures: x86 | |
755 | :Type: vcpu ioctl | |
756 | :Parameters: struct kvm_fpu (in) | |
757 | :Returns: 0 on success, -1 on error | |
9c1b96e3 AK |
758 | |
759 | Writes the floating point state to the vcpu. | |
760 | ||
106ee47d MCC |
761 | :: |
762 | ||
763 | /* for KVM_GET_FPU and KVM_SET_FPU */ | |
764 | struct kvm_fpu { | |
9c1b96e3 AK |
765 | __u8 fpr[8][16]; |
766 | __u16 fcw; | |
767 | __u16 fsw; | |
768 | __u8 ftwx; /* in fxsave format */ | |
769 | __u8 pad1; | |
770 | __u16 last_opcode; | |
771 | __u64 last_ip; | |
772 | __u64 last_dp; | |
773 | __u8 xmm[16][16]; | |
774 | __u32 mxcsr; | |
775 | __u32 pad2; | |
106ee47d | 776 | }; |
9c1b96e3 | 777 | |
414fa985 | 778 | |
68ba6974 | 779 | 4.24 KVM_CREATE_IRQCHIP |
106ee47d | 780 | ----------------------- |
5dadbfd6 | 781 | |
106ee47d MCC |
782 | :Capability: KVM_CAP_IRQCHIP, KVM_CAP_S390_IRQCHIP (s390) |
783 | :Architectures: x86, ARM, arm64, s390 | |
784 | :Type: vm ioctl | |
785 | :Parameters: none | |
786 | :Returns: 0 on success, -1 on error | |
5dadbfd6 | 787 | |
ac3d3735 AP |
788 | Creates an interrupt controller model in the kernel. |
789 | On x86, creates a virtual ioapic, a virtual PIC (two PICs, nested), and sets up | |
790 | future vcpus to have a local APIC. IRQ routing for GSIs 0-15 is set to both | |
791 | PIC and IOAPIC; GSI 16-23 only go to the IOAPIC. | |
792 | On ARM/arm64, a GICv2 is created. Any other GIC versions require the usage of | |
793 | KVM_CREATE_DEVICE, which also supports creating a GICv2. Using | |
794 | KVM_CREATE_DEVICE is preferred over KVM_CREATE_IRQCHIP for GICv2. | |
795 | On s390, a dummy irq routing table is created. | |
84223598 CH |
796 | |
797 | Note that on s390 the KVM_CAP_S390_IRQCHIP vm capability needs to be enabled | |
798 | before KVM_CREATE_IRQCHIP can be used. | |
5dadbfd6 | 799 | |
414fa985 | 800 | |
68ba6974 | 801 | 4.25 KVM_IRQ_LINE |
106ee47d | 802 | ----------------- |
5dadbfd6 | 803 | |
106ee47d MCC |
804 | :Capability: KVM_CAP_IRQCHIP |
805 | :Architectures: x86, arm, arm64 | |
806 | :Type: vm ioctl | |
807 | :Parameters: struct kvm_irq_level | |
808 | :Returns: 0 on success, -1 on error | |
5dadbfd6 AK |
809 | |
810 | Sets the level of a GSI input to the interrupt controller model in the kernel. | |
86ce8535 CD |
811 | On some architectures it is required that an interrupt controller model has |
812 | been previously created with KVM_CREATE_IRQCHIP. Note that edge-triggered | |
813 | interrupts require the level to be set to 1 and then back to 0. | |
814 | ||
100943c5 GS |
815 | On real hardware, interrupt pins can be active-low or active-high. This |
816 | does not matter for the level field of struct kvm_irq_level: 1 always | |
817 | means active (asserted), 0 means inactive (deasserted). | |
818 | ||
819 | x86 allows the operating system to program the interrupt polarity | |
820 | (active-low/active-high) for level-triggered interrupts, and KVM used | |
821 | to consider the polarity. However, due to bitrot in the handling of | |
822 | active-low interrupts, the above convention is now valid on x86 too. | |
823 | This is signaled by KVM_CAP_X86_IOAPIC_POLARITY_IGNORED. Userspace | |
824 | should not present interrupts to the guest as active-low unless this | |
825 | capability is present (or unless it is not using the in-kernel irqchip, | |
826 | of course). | |
827 | ||
828 | ||
379e04c7 MZ |
829 | ARM/arm64 can signal an interrupt either at the CPU level, or at the |
830 | in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to | |
831 | use PPIs designated for specific cpus. The irq field is interpreted | |
106ee47d | 832 | like this:: |
86ce8535 | 833 | |
92f35b75 MZ |
834 | bits: | 31 ... 28 | 27 ... 24 | 23 ... 16 | 15 ... 0 | |
835 | field: | vcpu2_index | irq_type | vcpu_index | irq_id | | |
86ce8535 CD |
836 | |
837 | The irq_type field has the following values: | |
106ee47d MCC |
838 | |
839 | - irq_type[0]: | |
840 | out-of-kernel GIC: irq_id 0 is IRQ, irq_id 1 is FIQ | |
841 | - irq_type[1]: | |
842 | in-kernel GIC: SPI, irq_id between 32 and 1019 (incl.) | |
86ce8535 | 843 | (the vcpu_index field is ignored) |
106ee47d MCC |
844 | - irq_type[2]: |
845 | in-kernel GIC: PPI, irq_id between 16 and 31 (incl.) | |
86ce8535 CD |
846 | |
847 | (The irq_id field thus corresponds nicely to the IRQ ID in the ARM GIC specs) | |
848 | ||
100943c5 | 849 | In both cases, level is used to assert/deassert the line. |
5dadbfd6 | 850 | |
92f35b75 MZ |
851 | When KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 is supported, the target vcpu is |
852 | identified as (256 * vcpu2_index + vcpu_index). Otherwise, vcpu2_index | |
853 | must be zero. | |
854 | ||
855 | Note that on arm/arm64, the KVM_CAP_IRQCHIP capability only conditions | |
856 | injection of interrupts for the in-kernel irqchip. KVM_IRQ_LINE can always | |
857 | be used for a userspace interrupt controller. | |
858 | ||
106ee47d MCC |
859 | :: |
860 | ||
861 | struct kvm_irq_level { | |
5dadbfd6 AK |
862 | union { |
863 | __u32 irq; /* GSI */ | |
864 | __s32 status; /* not used for KVM_IRQ_LEVEL */ | |
865 | }; | |
866 | __u32 level; /* 0 or 1 */ | |
106ee47d | 867 | }; |
5dadbfd6 | 868 | |
414fa985 | 869 | |
68ba6974 | 870 | 4.26 KVM_GET_IRQCHIP |
106ee47d | 871 | -------------------- |
5dadbfd6 | 872 | |
106ee47d MCC |
873 | :Capability: KVM_CAP_IRQCHIP |
874 | :Architectures: x86 | |
875 | :Type: vm ioctl | |
876 | :Parameters: struct kvm_irqchip (in/out) | |
877 | :Returns: 0 on success, -1 on error | |
5dadbfd6 AK |
878 | |
879 | Reads the state of a kernel interrupt controller created with | |
880 | KVM_CREATE_IRQCHIP into a buffer provided by the caller. | |
881 | ||
106ee47d MCC |
882 | :: |
883 | ||
884 | struct kvm_irqchip { | |
5dadbfd6 AK |
885 | __u32 chip_id; /* 0 = PIC1, 1 = PIC2, 2 = IOAPIC */ |
886 | __u32 pad; | |
887 | union { | |
888 | char dummy[512]; /* reserving space */ | |
889 | struct kvm_pic_state pic; | |
890 | struct kvm_ioapic_state ioapic; | |
891 | } chip; | |
106ee47d | 892 | }; |
5dadbfd6 | 893 | |
414fa985 | 894 | |
68ba6974 | 895 | 4.27 KVM_SET_IRQCHIP |
106ee47d | 896 | -------------------- |
5dadbfd6 | 897 | |
106ee47d MCC |
898 | :Capability: KVM_CAP_IRQCHIP |
899 | :Architectures: x86 | |
900 | :Type: vm ioctl | |
901 | :Parameters: struct kvm_irqchip (in) | |
902 | :Returns: 0 on success, -1 on error | |
5dadbfd6 AK |
903 | |
904 | Sets the state of a kernel interrupt controller created with | |
905 | KVM_CREATE_IRQCHIP from a buffer provided by the caller. | |
906 | ||
106ee47d MCC |
907 | :: |
908 | ||
909 | struct kvm_irqchip { | |
5dadbfd6 AK |
910 | __u32 chip_id; /* 0 = PIC1, 1 = PIC2, 2 = IOAPIC */ |
911 | __u32 pad; | |
912 | union { | |
913 | char dummy[512]; /* reserving space */ | |
914 | struct kvm_pic_state pic; | |
915 | struct kvm_ioapic_state ioapic; | |
916 | } chip; | |
106ee47d | 917 | }; |
5dadbfd6 | 918 | |
414fa985 | 919 | |
68ba6974 | 920 | 4.28 KVM_XEN_HVM_CONFIG |
106ee47d | 921 | ----------------------- |
ffde22ac | 922 | |
106ee47d MCC |
923 | :Capability: KVM_CAP_XEN_HVM |
924 | :Architectures: x86 | |
925 | :Type: vm ioctl | |
926 | :Parameters: struct kvm_xen_hvm_config (in) | |
927 | :Returns: 0 on success, -1 on error | |
ffde22ac ES |
928 | |
929 | Sets the MSR that the Xen HVM guest uses to initialize its hypercall | |
930 | page, and provides the starting address and size of the hypercall | |
931 | blobs in userspace. When the guest writes the MSR, kvm copies one | |
932 | page of a blob (32- or 64-bit, depending on the vcpu mode) to guest | |
933 | memory. | |
934 | ||
106ee47d MCC |
935 | :: |
936 | ||
937 | struct kvm_xen_hvm_config { | |
ffde22ac ES |
938 | __u32 flags; |
939 | __u32 msr; | |
940 | __u64 blob_addr_32; | |
941 | __u64 blob_addr_64; | |
942 | __u8 blob_size_32; | |
943 | __u8 blob_size_64; | |
944 | __u8 pad2[30]; | |
106ee47d | 945 | }; |
ffde22ac | 946 | |
414fa985 | 947 | |
68ba6974 | 948 | 4.29 KVM_GET_CLOCK |
106ee47d | 949 | ------------------ |
afbcf7ab | 950 | |
106ee47d MCC |
951 | :Capability: KVM_CAP_ADJUST_CLOCK |
952 | :Architectures: x86 | |
953 | :Type: vm ioctl | |
954 | :Parameters: struct kvm_clock_data (out) | |
955 | :Returns: 0 on success, -1 on error | |
afbcf7ab GC |
956 | |
957 | Gets the current timestamp of kvmclock as seen by the current guest. In | |
958 | conjunction with KVM_SET_CLOCK, it is used to ensure monotonicity on scenarios | |
959 | such as migration. | |
960 | ||
e3fd9a93 PB |
961 | When KVM_CAP_ADJUST_CLOCK is passed to KVM_CHECK_EXTENSION, it returns the |
962 | set of bits that KVM can return in struct kvm_clock_data's flag member. | |
963 | ||
964 | The only flag defined now is KVM_CLOCK_TSC_STABLE. If set, the returned | |
965 | value is the exact kvmclock value seen by all VCPUs at the instant | |
966 | when KVM_GET_CLOCK was called. If clear, the returned value is simply | |
967 | CLOCK_MONOTONIC plus a constant offset; the offset can be modified | |
968 | with KVM_SET_CLOCK. KVM will try to make all VCPUs follow this clock, | |
969 | but the exact value read by each VCPU could differ, because the host | |
970 | TSC is not stable. | |
971 | ||
106ee47d MCC |
972 | :: |
973 | ||
974 | struct kvm_clock_data { | |
afbcf7ab GC |
975 | __u64 clock; /* kvmclock current value */ |
976 | __u32 flags; | |
977 | __u32 pad[9]; | |
106ee47d | 978 | }; |
afbcf7ab | 979 | |
414fa985 | 980 | |
68ba6974 | 981 | 4.30 KVM_SET_CLOCK |
106ee47d | 982 | ------------------ |
afbcf7ab | 983 | |
106ee47d MCC |
984 | :Capability: KVM_CAP_ADJUST_CLOCK |
985 | :Architectures: x86 | |
986 | :Type: vm ioctl | |
987 | :Parameters: struct kvm_clock_data (in) | |
988 | :Returns: 0 on success, -1 on error | |
afbcf7ab | 989 | |
2044892d | 990 | Sets the current timestamp of kvmclock to the value specified in its parameter. |
afbcf7ab GC |
991 | In conjunction with KVM_GET_CLOCK, it is used to ensure monotonicity on scenarios |
992 | such as migration. | |
993 | ||
106ee47d MCC |
994 | :: |
995 | ||
996 | struct kvm_clock_data { | |
afbcf7ab GC |
997 | __u64 clock; /* kvmclock current value */ |
998 | __u32 flags; | |
999 | __u32 pad[9]; | |
106ee47d | 1000 | }; |
afbcf7ab | 1001 | |
414fa985 | 1002 | |
68ba6974 | 1003 | 4.31 KVM_GET_VCPU_EVENTS |
106ee47d | 1004 | ------------------------ |
3cfc3092 | 1005 | |
106ee47d MCC |
1006 | :Capability: KVM_CAP_VCPU_EVENTS |
1007 | :Extended by: KVM_CAP_INTR_SHADOW | |
1008 | :Architectures: x86, arm, arm64 | |
1009 | :Type: vcpu ioctl | |
1010 | :Parameters: struct kvm_vcpu_event (out) | |
1011 | :Returns: 0 on success, -1 on error | |
3cfc3092 | 1012 | |
b7b27fac | 1013 | X86: |
106ee47d | 1014 | ^^^^ |
b7b27fac | 1015 | |
3cfc3092 JK |
1016 | Gets currently pending exceptions, interrupts, and NMIs as well as related |
1017 | states of the vcpu. | |
1018 | ||
106ee47d MCC |
1019 | :: |
1020 | ||
1021 | struct kvm_vcpu_events { | |
3cfc3092 JK |
1022 | struct { |
1023 | __u8 injected; | |
1024 | __u8 nr; | |
1025 | __u8 has_error_code; | |
59073aaf | 1026 | __u8 pending; |
3cfc3092 JK |
1027 | __u32 error_code; |
1028 | } exception; | |
1029 | struct { | |
1030 | __u8 injected; | |
1031 | __u8 nr; | |
1032 | __u8 soft; | |
48005f64 | 1033 | __u8 shadow; |
3cfc3092 JK |
1034 | } interrupt; |
1035 | struct { | |
1036 | __u8 injected; | |
1037 | __u8 pending; | |
1038 | __u8 masked; | |
1039 | __u8 pad; | |
1040 | } nmi; | |
1041 | __u32 sipi_vector; | |
dab4b911 | 1042 | __u32 flags; |
f077825a PB |
1043 | struct { |
1044 | __u8 smm; | |
1045 | __u8 pending; | |
1046 | __u8 smm_inside_nmi; | |
1047 | __u8 latched_init; | |
1048 | } smi; | |
59073aaf JM |
1049 | __u8 reserved[27]; |
1050 | __u8 exception_has_payload; | |
1051 | __u64 exception_payload; | |
106ee47d | 1052 | }; |
3cfc3092 | 1053 | |
59073aaf | 1054 | The following bits are defined in the flags field: |
f077825a | 1055 | |
59073aaf | 1056 | - KVM_VCPUEVENT_VALID_SHADOW may be set to signal that |
f077825a | 1057 | interrupt.shadow contains a valid state. |
48005f64 | 1058 | |
59073aaf JM |
1059 | - KVM_VCPUEVENT_VALID_SMM may be set to signal that smi contains a |
1060 | valid state. | |
1061 | ||
1062 | - KVM_VCPUEVENT_VALID_PAYLOAD may be set to signal that the | |
1063 | exception_has_payload, exception_payload, and exception.pending | |
1064 | fields contain a valid state. This bit will be set whenever | |
1065 | KVM_CAP_EXCEPTION_PAYLOAD is enabled. | |
414fa985 | 1066 | |
b0960b95 | 1067 | ARM/ARM64: |
106ee47d | 1068 | ^^^^^^^^^^ |
b7b27fac DG |
1069 | |
1070 | If the guest accesses a device that is being emulated by the host kernel in | |
1071 | such a way that a real device would generate a physical SError, KVM may make | |
1072 | a virtual SError pending for that VCPU. This system error interrupt remains | |
1073 | pending until the guest takes the exception by unmasking PSTATE.A. | |
1074 | ||
1075 | Running the VCPU may cause it to take a pending SError, or make an access that | |
1076 | causes an SError to become pending. The event's description is only valid while | |
1077 | the VPCU is not running. | |
1078 | ||
1079 | This API provides a way to read and write the pending 'event' state that is not | |
1080 | visible to the guest. To save, restore or migrate a VCPU the struct representing | |
1081 | the state can be read then written using this GET/SET API, along with the other | |
1082 | guest-visible registers. It is not possible to 'cancel' an SError that has been | |
1083 | made pending. | |
1084 | ||
1085 | A device being emulated in user-space may also wish to generate an SError. To do | |
1086 | this the events structure can be populated by user-space. The current state | |
1087 | should be read first, to ensure no existing SError is pending. If an existing | |
1088 | SError is pending, the architecture's 'Multiple SError interrupts' rules should | |
1089 | be followed. (2.5.3 of DDI0587.a "ARM Reliability, Availability, and | |
1090 | Serviceability (RAS) Specification"). | |
1091 | ||
be26b3a7 DG |
1092 | SError exceptions always have an ESR value. Some CPUs have the ability to |
1093 | specify what the virtual SError's ESR value should be. These systems will | |
688e0581 | 1094 | advertise KVM_CAP_ARM_INJECT_SERROR_ESR. In this case exception.has_esr will |
be26b3a7 DG |
1095 | always have a non-zero value when read, and the agent making an SError pending |
1096 | should specify the ISS field in the lower 24 bits of exception.serror_esr. If | |
688e0581 | 1097 | the system supports KVM_CAP_ARM_INJECT_SERROR_ESR, but user-space sets the events |
be26b3a7 DG |
1098 | with exception.has_esr as zero, KVM will choose an ESR. |
1099 | ||
1100 | Specifying exception.has_esr on a system that does not support it will return | |
1101 | -EINVAL. Setting anything other than the lower 24bits of exception.serror_esr | |
1102 | will return -EINVAL. | |
1103 | ||
da345174 CD |
1104 | It is not possible to read back a pending external abort (injected via |
1105 | KVM_SET_VCPU_EVENTS or otherwise) because such an exception is always delivered | |
1106 | directly to the virtual CPU). | |
1107 | ||
106ee47d | 1108 | :: |
da345174 | 1109 | |
106ee47d | 1110 | struct kvm_vcpu_events { |
b7b27fac DG |
1111 | struct { |
1112 | __u8 serror_pending; | |
1113 | __u8 serror_has_esr; | |
da345174 | 1114 | __u8 ext_dabt_pending; |
b7b27fac | 1115 | /* Align it to 8 bytes */ |
da345174 | 1116 | __u8 pad[5]; |
b7b27fac DG |
1117 | __u64 serror_esr; |
1118 | } exception; | |
1119 | __u32 reserved[12]; | |
106ee47d | 1120 | }; |
b7b27fac | 1121 | |
68ba6974 | 1122 | 4.32 KVM_SET_VCPU_EVENTS |
106ee47d | 1123 | ------------------------ |
3cfc3092 | 1124 | |
106ee47d MCC |
1125 | :Capability: KVM_CAP_VCPU_EVENTS |
1126 | :Extended by: KVM_CAP_INTR_SHADOW | |
1127 | :Architectures: x86, arm, arm64 | |
1128 | :Type: vcpu ioctl | |
1129 | :Parameters: struct kvm_vcpu_event (in) | |
1130 | :Returns: 0 on success, -1 on error | |
3cfc3092 | 1131 | |
b7b27fac | 1132 | X86: |
106ee47d | 1133 | ^^^^ |
b7b27fac | 1134 | |
3cfc3092 JK |
1135 | Set pending exceptions, interrupts, and NMIs as well as related states of the |
1136 | vcpu. | |
1137 | ||
1138 | See KVM_GET_VCPU_EVENTS for the data structure. | |
1139 | ||
dab4b911 | 1140 | Fields that may be modified asynchronously by running VCPUs can be excluded |
f077825a PB |
1141 | from the update. These fields are nmi.pending, sipi_vector, smi.smm, |
1142 | smi.pending. Keep the corresponding bits in the flags field cleared to | |
1143 | suppress overwriting the current in-kernel state. The bits are: | |
dab4b911 | 1144 | |
106ee47d MCC |
1145 | =============================== ================================== |
1146 | KVM_VCPUEVENT_VALID_NMI_PENDING transfer nmi.pending to the kernel | |
1147 | KVM_VCPUEVENT_VALID_SIPI_VECTOR transfer sipi_vector | |
1148 | KVM_VCPUEVENT_VALID_SMM transfer the smi sub-struct. | |
1149 | =============================== ================================== | |
dab4b911 | 1150 | |
48005f64 JK |
1151 | If KVM_CAP_INTR_SHADOW is available, KVM_VCPUEVENT_VALID_SHADOW can be set in |
1152 | the flags field to signal that interrupt.shadow contains a valid state and | |
1153 | shall be written into the VCPU. | |
1154 | ||
f077825a PB |
1155 | KVM_VCPUEVENT_VALID_SMM can only be set if KVM_CAP_X86_SMM is available. |
1156 | ||
59073aaf JM |
1157 | If KVM_CAP_EXCEPTION_PAYLOAD is enabled, KVM_VCPUEVENT_VALID_PAYLOAD |
1158 | can be set in the flags field to signal that the | |
1159 | exception_has_payload, exception_payload, and exception.pending fields | |
1160 | contain a valid state and shall be written into the VCPU. | |
1161 | ||
b0960b95 | 1162 | ARM/ARM64: |
106ee47d | 1163 | ^^^^^^^^^^ |
b7b27fac | 1164 | |
da345174 CD |
1165 | User space may need to inject several types of events to the guest. |
1166 | ||
b7b27fac DG |
1167 | Set the pending SError exception state for this VCPU. It is not possible to |
1168 | 'cancel' an Serror that has been made pending. | |
1169 | ||
da345174 CD |
1170 | If the guest performed an access to I/O memory which could not be handled by |
1171 | userspace, for example because of missing instruction syndrome decode | |
1172 | information or because there is no device mapped at the accessed IPA, then | |
1173 | userspace can ask the kernel to inject an external abort using the address | |
1174 | from the exiting fault on the VCPU. It is a programming error to set | |
1175 | ext_dabt_pending after an exit which was not either KVM_EXIT_MMIO or | |
1176 | KVM_EXIT_ARM_NISV. This feature is only available if the system supports | |
1177 | KVM_CAP_ARM_INJECT_EXT_DABT. This is a helper which provides commonality in | |
1178 | how userspace reports accesses for the above cases to guests, across different | |
1179 | userspace implementations. Nevertheless, userspace can still emulate all Arm | |
1180 | exceptions by manipulating individual registers using the KVM_SET_ONE_REG API. | |
1181 | ||
b7b27fac DG |
1182 | See KVM_GET_VCPU_EVENTS for the data structure. |
1183 | ||
414fa985 | 1184 | |
68ba6974 | 1185 | 4.33 KVM_GET_DEBUGREGS |
106ee47d | 1186 | ---------------------- |
a1efbe77 | 1187 | |
106ee47d MCC |
1188 | :Capability: KVM_CAP_DEBUGREGS |
1189 | :Architectures: x86 | |
1190 | :Type: vm ioctl | |
1191 | :Parameters: struct kvm_debugregs (out) | |
1192 | :Returns: 0 on success, -1 on error | |
a1efbe77 JK |
1193 | |
1194 | Reads debug registers from the vcpu. | |
1195 | ||
106ee47d MCC |
1196 | :: |
1197 | ||
1198 | struct kvm_debugregs { | |
a1efbe77 JK |
1199 | __u64 db[4]; |
1200 | __u64 dr6; | |
1201 | __u64 dr7; | |
1202 | __u64 flags; | |
1203 | __u64 reserved[9]; | |
106ee47d | 1204 | }; |
a1efbe77 | 1205 | |
414fa985 | 1206 | |
68ba6974 | 1207 | 4.34 KVM_SET_DEBUGREGS |
106ee47d | 1208 | ---------------------- |
a1efbe77 | 1209 | |
106ee47d MCC |
1210 | :Capability: KVM_CAP_DEBUGREGS |
1211 | :Architectures: x86 | |
1212 | :Type: vm ioctl | |
1213 | :Parameters: struct kvm_debugregs (in) | |
1214 | :Returns: 0 on success, -1 on error | |
a1efbe77 JK |
1215 | |
1216 | Writes debug registers into the vcpu. | |
1217 | ||
1218 | See KVM_GET_DEBUGREGS for the data structure. The flags field is unused | |
1219 | yet and must be cleared on entry. | |
1220 | ||
414fa985 | 1221 | |
68ba6974 | 1222 | 4.35 KVM_SET_USER_MEMORY_REGION |
106ee47d MCC |
1223 | ------------------------------- |
1224 | ||
1225 | :Capability: KVM_CAP_USER_MEMORY | |
1226 | :Architectures: all | |
1227 | :Type: vm ioctl | |
1228 | :Parameters: struct kvm_userspace_memory_region (in) | |
1229 | :Returns: 0 on success, -1 on error | |
0f2d8f4d | 1230 | |
106ee47d | 1231 | :: |
0f2d8f4d | 1232 | |
106ee47d | 1233 | struct kvm_userspace_memory_region { |
0f2d8f4d AK |
1234 | __u32 slot; |
1235 | __u32 flags; | |
1236 | __u64 guest_phys_addr; | |
1237 | __u64 memory_size; /* bytes */ | |
1238 | __u64 userspace_addr; /* start of the userspace allocated memory */ | |
106ee47d | 1239 | }; |
0f2d8f4d | 1240 | |
106ee47d MCC |
1241 | /* for kvm_memory_region::flags */ |
1242 | #define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0) | |
1243 | #define KVM_MEM_READONLY (1UL << 1) | |
0f2d8f4d | 1244 | |
e2788c4a PB |
1245 | This ioctl allows the user to create, modify or delete a guest physical |
1246 | memory slot. Bits 0-15 of "slot" specify the slot id and this value | |
1247 | should be less than the maximum number of user memory slots supported per | |
c110ae57 PB |
1248 | VM. The maximum allowed slots can be queried using KVM_CAP_NR_MEMSLOTS. |
1249 | Slots may not overlap in guest physical address space. | |
0f2d8f4d | 1250 | |
f481b069 PB |
1251 | If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot" |
1252 | specifies the address space which is being modified. They must be | |
1253 | less than the value that KVM_CHECK_EXTENSION returns for the | |
1254 | KVM_CAP_MULTI_ADDRESS_SPACE capability. Slots in separate address spaces | |
1255 | are unrelated; the restriction on overlapping slots only applies within | |
1256 | each address space. | |
1257 | ||
e2788c4a PB |
1258 | Deleting a slot is done by passing zero for memory_size. When changing |
1259 | an existing slot, it may be moved in the guest physical memory space, | |
1260 | or its flags may be modified, but it may not be resized. | |
1261 | ||
0f2d8f4d AK |
1262 | Memory for the region is taken starting at the address denoted by the |
1263 | field userspace_addr, which must point at user addressable memory for | |
1264 | the entire memory slot size. Any object may back this memory, including | |
1265 | anonymous memory, ordinary files, and hugetlbfs. | |
1266 | ||
1267 | It is recommended that the lower 21 bits of guest_phys_addr and userspace_addr | |
1268 | be identical. This allows large pages in the guest to be backed by large | |
1269 | pages in the host. | |
1270 | ||
75d61fbc TY |
1271 | The flags field supports two flags: KVM_MEM_LOG_DIRTY_PAGES and |
1272 | KVM_MEM_READONLY. The former can be set to instruct KVM to keep track of | |
1273 | writes to memory within the slot. See KVM_GET_DIRTY_LOG ioctl to know how to | |
1274 | use it. The latter can be set, if KVM_CAP_READONLY_MEM capability allows it, | |
1275 | to make a new slot read-only. In this case, writes to this memory will be | |
1276 | posted to userspace as KVM_EXIT_MMIO exits. | |
7efd8fa1 JK |
1277 | |
1278 | When the KVM_CAP_SYNC_MMU capability is available, changes in the backing of | |
1279 | the memory region are automatically reflected into the guest. For example, an | |
1280 | mmap() that affects the region will be made visible immediately. Another | |
1281 | example is madvise(MADV_DROP). | |
0f2d8f4d AK |
1282 | |
1283 | It is recommended to use this API instead of the KVM_SET_MEMORY_REGION ioctl. | |
1284 | The KVM_SET_MEMORY_REGION does not allow fine grained control over memory | |
1285 | allocation and is deprecated. | |
3cfc3092 | 1286 | |
414fa985 | 1287 | |
68ba6974 | 1288 | 4.36 KVM_SET_TSS_ADDR |
106ee47d | 1289 | --------------------- |
8a5416db | 1290 | |
106ee47d MCC |
1291 | :Capability: KVM_CAP_SET_TSS_ADDR |
1292 | :Architectures: x86 | |
1293 | :Type: vm ioctl | |
1294 | :Parameters: unsigned long tss_address (in) | |
1295 | :Returns: 0 on success, -1 on error | |
8a5416db AK |
1296 | |
1297 | This ioctl defines the physical address of a three-page region in the guest | |
1298 | physical address space. The region must be within the first 4GB of the | |
1299 | guest physical address space and must not conflict with any memory slot | |
1300 | or any mmio address. The guest may malfunction if it accesses this memory | |
1301 | region. | |
1302 | ||
1303 | This ioctl is required on Intel-based hosts. This is needed on Intel hardware | |
1304 | because of a quirk in the virtualization implementation (see the internals | |
1305 | documentation when it pops into existence). | |
1306 | ||
414fa985 | 1307 | |
68ba6974 | 1308 | 4.37 KVM_ENABLE_CAP |
106ee47d | 1309 | ------------------- |
71fbfd5f | 1310 | |
106ee47d MCC |
1311 | :Capability: KVM_CAP_ENABLE_CAP |
1312 | :Architectures: mips, ppc, s390 | |
1313 | :Type: vcpu ioctl | |
1314 | :Parameters: struct kvm_enable_cap (in) | |
1315 | :Returns: 0 on success; -1 on error | |
e5d83c74 | 1316 | |
106ee47d MCC |
1317 | :Capability: KVM_CAP_ENABLE_CAP_VM |
1318 | :Architectures: all | |
1319 | :Type: vcpu ioctl | |
1320 | :Parameters: struct kvm_enable_cap (in) | |
1321 | :Returns: 0 on success; -1 on error | |
1322 | ||
1323 | .. note:: | |
71fbfd5f | 1324 | |
106ee47d MCC |
1325 | Not all extensions are enabled by default. Using this ioctl the application |
1326 | can enable an extension, making it available to the guest. | |
71fbfd5f AG |
1327 | |
1328 | On systems that do not support this ioctl, it always fails. On systems that | |
1329 | do support it, it only works for extensions that are supported for enablement. | |
1330 | ||
1331 | To check if a capability can be enabled, the KVM_CHECK_EXTENSION ioctl should | |
1332 | be used. | |
1333 | ||
106ee47d MCC |
1334 | :: |
1335 | ||
1336 | struct kvm_enable_cap { | |
71fbfd5f AG |
1337 | /* in */ |
1338 | __u32 cap; | |
1339 | ||
1340 | The capability that is supposed to get enabled. | |
1341 | ||
106ee47d MCC |
1342 | :: |
1343 | ||
71fbfd5f AG |
1344 | __u32 flags; |
1345 | ||
1346 | A bitfield indicating future enhancements. Has to be 0 for now. | |
1347 | ||
106ee47d MCC |
1348 | :: |
1349 | ||
71fbfd5f AG |
1350 | __u64 args[4]; |
1351 | ||
1352 | Arguments for enabling a feature. If a feature needs initial values to | |
1353 | function properly, this is the place to put them. | |
1354 | ||
106ee47d MCC |
1355 | :: |
1356 | ||
71fbfd5f | 1357 | __u8 pad[64]; |
106ee47d | 1358 | }; |
71fbfd5f | 1359 | |
d938dc55 CH |
1360 | The vcpu ioctl should be used for vcpu-specific capabilities, the vm ioctl |
1361 | for vm-wide capabilities. | |
414fa985 | 1362 | |
68ba6974 | 1363 | 4.38 KVM_GET_MP_STATE |
106ee47d | 1364 | --------------------- |
b843f065 | 1365 | |
106ee47d MCC |
1366 | :Capability: KVM_CAP_MP_STATE |
1367 | :Architectures: x86, s390, arm, arm64 | |
1368 | :Type: vcpu ioctl | |
1369 | :Parameters: struct kvm_mp_state (out) | |
1370 | :Returns: 0 on success; -1 on error | |
1371 | ||
1372 | :: | |
b843f065 | 1373 | |
106ee47d | 1374 | struct kvm_mp_state { |
b843f065 | 1375 | __u32 mp_state; |
106ee47d | 1376 | }; |
b843f065 AK |
1377 | |
1378 | Returns the vcpu's current "multiprocessing state" (though also valid on | |
1379 | uniprocessor guests). | |
1380 | ||
1381 | Possible values are: | |
1382 | ||
106ee47d MCC |
1383 | ========================== =============================================== |
1384 | KVM_MP_STATE_RUNNABLE the vcpu is currently running [x86,arm/arm64] | |
1385 | KVM_MP_STATE_UNINITIALIZED the vcpu is an application processor (AP) | |
c32a4272 | 1386 | which has not yet received an INIT signal [x86] |
106ee47d | 1387 | KVM_MP_STATE_INIT_RECEIVED the vcpu has received an INIT signal, and is |
c32a4272 | 1388 | now ready for a SIPI [x86] |
106ee47d | 1389 | KVM_MP_STATE_HALTED the vcpu has executed a HLT instruction and |
c32a4272 | 1390 | is waiting for an interrupt [x86] |
106ee47d | 1391 | KVM_MP_STATE_SIPI_RECEIVED the vcpu has just received a SIPI (vector |
c32a4272 | 1392 | accessible via KVM_GET_VCPU_EVENTS) [x86] |
106ee47d MCC |
1393 | KVM_MP_STATE_STOPPED the vcpu is stopped [s390,arm/arm64] |
1394 | KVM_MP_STATE_CHECK_STOP the vcpu is in a special error state [s390] | |
1395 | KVM_MP_STATE_OPERATING the vcpu is operating (running or halted) | |
6352e4d2 | 1396 | [s390] |
106ee47d | 1397 | KVM_MP_STATE_LOAD the vcpu is in a special load/startup state |
6352e4d2 | 1398 | [s390] |
106ee47d | 1399 | ========================== =============================================== |
b843f065 | 1400 | |
c32a4272 | 1401 | On x86, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an |
0b4820d6 DH |
1402 | in-kernel irqchip, the multiprocessing state must be maintained by userspace on |
1403 | these architectures. | |
b843f065 | 1404 | |
ecccf0cc | 1405 | For arm/arm64: |
106ee47d | 1406 | ^^^^^^^^^^^^^^ |
ecccf0cc AB |
1407 | |
1408 | The only states that are valid are KVM_MP_STATE_STOPPED and | |
1409 | KVM_MP_STATE_RUNNABLE which reflect if the vcpu is paused or not. | |
414fa985 | 1410 | |
68ba6974 | 1411 | 4.39 KVM_SET_MP_STATE |
106ee47d | 1412 | --------------------- |
b843f065 | 1413 | |
106ee47d MCC |
1414 | :Capability: KVM_CAP_MP_STATE |
1415 | :Architectures: x86, s390, arm, arm64 | |
1416 | :Type: vcpu ioctl | |
1417 | :Parameters: struct kvm_mp_state (in) | |
1418 | :Returns: 0 on success; -1 on error | |
b843f065 AK |
1419 | |
1420 | Sets the vcpu's current "multiprocessing state"; see KVM_GET_MP_STATE for | |
1421 | arguments. | |
1422 | ||
c32a4272 | 1423 | On x86, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an |
0b4820d6 DH |
1424 | in-kernel irqchip, the multiprocessing state must be maintained by userspace on |
1425 | these architectures. | |
b843f065 | 1426 | |
ecccf0cc | 1427 | For arm/arm64: |
106ee47d | 1428 | ^^^^^^^^^^^^^^ |
ecccf0cc AB |
1429 | |
1430 | The only states that are valid are KVM_MP_STATE_STOPPED and | |
1431 | KVM_MP_STATE_RUNNABLE which reflect if the vcpu should be paused or not. | |
414fa985 | 1432 | |
68ba6974 | 1433 | 4.40 KVM_SET_IDENTITY_MAP_ADDR |
106ee47d | 1434 | ------------------------------ |
47dbb84f | 1435 | |
106ee47d MCC |
1436 | :Capability: KVM_CAP_SET_IDENTITY_MAP_ADDR |
1437 | :Architectures: x86 | |
1438 | :Type: vm ioctl | |
1439 | :Parameters: unsigned long identity (in) | |
1440 | :Returns: 0 on success, -1 on error | |
47dbb84f AK |
1441 | |
1442 | This ioctl defines the physical address of a one-page region in the guest | |
1443 | physical address space. The region must be within the first 4GB of the | |
1444 | guest physical address space and must not conflict with any memory slot | |
1445 | or any mmio address. The guest may malfunction if it accesses this memory | |
1446 | region. | |
1447 | ||
726b99c4 DH |
1448 | Setting the address to 0 will result in resetting the address to its default |
1449 | (0xfffbc000). | |
1450 | ||
47dbb84f AK |
1451 | This ioctl is required on Intel-based hosts. This is needed on Intel hardware |
1452 | because of a quirk in the virtualization implementation (see the internals | |
1453 | documentation when it pops into existence). | |
1454 | ||
1af1ac91 | 1455 | Fails if any VCPU has already been created. |
414fa985 | 1456 | |
68ba6974 | 1457 | 4.41 KVM_SET_BOOT_CPU_ID |
106ee47d | 1458 | ------------------------ |
57bc24cf | 1459 | |
106ee47d MCC |
1460 | :Capability: KVM_CAP_SET_BOOT_CPU_ID |
1461 | :Architectures: x86 | |
1462 | :Type: vm ioctl | |
1463 | :Parameters: unsigned long vcpu_id | |
1464 | :Returns: 0 on success, -1 on error | |
57bc24cf AK |
1465 | |
1466 | Define which vcpu is the Bootstrap Processor (BSP). Values are the same | |
1467 | as the vcpu id in KVM_CREATE_VCPU. If this ioctl is not called, the default | |
1468 | is vcpu 0. | |
1469 | ||
414fa985 | 1470 | |
68ba6974 | 1471 | 4.42 KVM_GET_XSAVE |
106ee47d | 1472 | ------------------ |
2d5b5a66 | 1473 | |
106ee47d MCC |
1474 | :Capability: KVM_CAP_XSAVE |
1475 | :Architectures: x86 | |
1476 | :Type: vcpu ioctl | |
1477 | :Parameters: struct kvm_xsave (out) | |
1478 | :Returns: 0 on success, -1 on error | |
1479 | ||
1480 | ||
1481 | :: | |
2d5b5a66 | 1482 | |
106ee47d | 1483 | struct kvm_xsave { |
2d5b5a66 | 1484 | __u32 region[1024]; |
106ee47d | 1485 | }; |
2d5b5a66 SY |
1486 | |
1487 | This ioctl would copy current vcpu's xsave struct to the userspace. | |
1488 | ||
414fa985 | 1489 | |
68ba6974 | 1490 | 4.43 KVM_SET_XSAVE |
106ee47d | 1491 | ------------------ |
2d5b5a66 | 1492 | |
106ee47d MCC |
1493 | :Capability: KVM_CAP_XSAVE |
1494 | :Architectures: x86 | |
1495 | :Type: vcpu ioctl | |
1496 | :Parameters: struct kvm_xsave (in) | |
1497 | :Returns: 0 on success, -1 on error | |
1498 | ||
1499 | :: | |
2d5b5a66 | 1500 | |
106ee47d MCC |
1501 | |
1502 | struct kvm_xsave { | |
2d5b5a66 | 1503 | __u32 region[1024]; |
106ee47d | 1504 | }; |
2d5b5a66 SY |
1505 | |
1506 | This ioctl would copy userspace's xsave struct to the kernel. | |
1507 | ||
414fa985 | 1508 | |
68ba6974 | 1509 | 4.44 KVM_GET_XCRS |
106ee47d | 1510 | ----------------- |
2d5b5a66 | 1511 | |
106ee47d MCC |
1512 | :Capability: KVM_CAP_XCRS |
1513 | :Architectures: x86 | |
1514 | :Type: vcpu ioctl | |
1515 | :Parameters: struct kvm_xcrs (out) | |
1516 | :Returns: 0 on success, -1 on error | |
1517 | ||
1518 | :: | |
2d5b5a66 | 1519 | |
106ee47d | 1520 | struct kvm_xcr { |
2d5b5a66 SY |
1521 | __u32 xcr; |
1522 | __u32 reserved; | |
1523 | __u64 value; | |
106ee47d | 1524 | }; |
2d5b5a66 | 1525 | |
106ee47d | 1526 | struct kvm_xcrs { |
2d5b5a66 SY |
1527 | __u32 nr_xcrs; |
1528 | __u32 flags; | |
1529 | struct kvm_xcr xcrs[KVM_MAX_XCRS]; | |
1530 | __u64 padding[16]; | |
106ee47d | 1531 | }; |
2d5b5a66 SY |
1532 | |
1533 | This ioctl would copy current vcpu's xcrs to the userspace. | |
1534 | ||
414fa985 | 1535 | |
68ba6974 | 1536 | 4.45 KVM_SET_XCRS |
106ee47d | 1537 | ----------------- |
2d5b5a66 | 1538 | |
106ee47d MCC |
1539 | :Capability: KVM_CAP_XCRS |
1540 | :Architectures: x86 | |
1541 | :Type: vcpu ioctl | |
1542 | :Parameters: struct kvm_xcrs (in) | |
1543 | :Returns: 0 on success, -1 on error | |
1544 | ||
1545 | :: | |
2d5b5a66 | 1546 | |
106ee47d | 1547 | struct kvm_xcr { |
2d5b5a66 SY |
1548 | __u32 xcr; |
1549 | __u32 reserved; | |
1550 | __u64 value; | |
106ee47d | 1551 | }; |
2d5b5a66 | 1552 | |
106ee47d | 1553 | struct kvm_xcrs { |
2d5b5a66 SY |
1554 | __u32 nr_xcrs; |
1555 | __u32 flags; | |
1556 | struct kvm_xcr xcrs[KVM_MAX_XCRS]; | |
1557 | __u64 padding[16]; | |
106ee47d | 1558 | }; |
2d5b5a66 SY |
1559 | |
1560 | This ioctl would set vcpu's xcr to the value userspace specified. | |
1561 | ||
414fa985 | 1562 | |
68ba6974 | 1563 | 4.46 KVM_GET_SUPPORTED_CPUID |
106ee47d MCC |
1564 | ---------------------------- |
1565 | ||
1566 | :Capability: KVM_CAP_EXT_CPUID | |
1567 | :Architectures: x86 | |
1568 | :Type: system ioctl | |
1569 | :Parameters: struct kvm_cpuid2 (in/out) | |
1570 | :Returns: 0 on success, -1 on error | |
d153513d | 1571 | |
106ee47d | 1572 | :: |
d153513d | 1573 | |
106ee47d | 1574 | struct kvm_cpuid2 { |
d153513d AK |
1575 | __u32 nent; |
1576 | __u32 padding; | |
1577 | struct kvm_cpuid_entry2 entries[0]; | |
106ee47d | 1578 | }; |
d153513d | 1579 | |
106ee47d | 1580 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) |
7ff6c035 SC |
1581 | #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) /* deprecated */ |
1582 | #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) /* deprecated */ | |
d153513d | 1583 | |
106ee47d | 1584 | struct kvm_cpuid_entry2 { |
d153513d AK |
1585 | __u32 function; |
1586 | __u32 index; | |
1587 | __u32 flags; | |
1588 | __u32 eax; | |
1589 | __u32 ebx; | |
1590 | __u32 ecx; | |
1591 | __u32 edx; | |
1592 | __u32 padding[3]; | |
106ee47d | 1593 | }; |
d153513d | 1594 | |
df9cb9cc JM |
1595 | This ioctl returns x86 cpuid features which are supported by both the |
1596 | hardware and kvm in its default configuration. Userspace can use the | |
1597 | information returned by this ioctl to construct cpuid information (for | |
1598 | KVM_SET_CPUID2) that is consistent with hardware, kernel, and | |
1599 | userspace capabilities, and with user requirements (for example, the | |
1600 | user may wish to constrain cpuid to emulate older hardware, or for | |
1601 | feature consistency across a cluster). | |
1602 | ||
1603 | Note that certain capabilities, such as KVM_CAP_X86_DISABLE_EXITS, may | |
1604 | expose cpuid features (e.g. MONITOR) which are not supported by kvm in | |
1605 | its default configuration. If userspace enables such capabilities, it | |
1606 | is responsible for modifying the results of this ioctl appropriately. | |
d153513d AK |
1607 | |
1608 | Userspace invokes KVM_GET_SUPPORTED_CPUID by passing a kvm_cpuid2 structure | |
1609 | with the 'nent' field indicating the number of entries in the variable-size | |
1610 | array 'entries'. If the number of entries is too low to describe the cpu | |
1611 | capabilities, an error (E2BIG) is returned. If the number is too high, | |
1612 | the 'nent' field is adjusted and an error (ENOMEM) is returned. If the | |
1613 | number is just right, the 'nent' field is adjusted to the number of valid | |
1614 | entries in the 'entries' array, which is then filled. | |
1615 | ||
1616 | The entries returned are the host cpuid as returned by the cpuid instruction, | |
c39cbd2a AK |
1617 | with unknown or unsupported features masked out. Some features (for example, |
1618 | x2apic), may not be present in the host cpu, but are exposed by kvm if it can | |
1619 | emulate them efficiently. The fields in each entry are defined as follows: | |
d153513d | 1620 | |
106ee47d MCC |
1621 | function: |
1622 | the eax value used to obtain the entry | |
1623 | ||
1624 | index: | |
1625 | the ecx value used to obtain the entry (for entries that are | |
d153513d | 1626 | affected by ecx) |
106ee47d MCC |
1627 | |
1628 | flags: | |
1629 | an OR of zero or more of the following: | |
1630 | ||
d153513d AK |
1631 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX: |
1632 | if the index field is valid | |
106ee47d MCC |
1633 | |
1634 | eax, ebx, ecx, edx: | |
1635 | the values returned by the cpuid instruction for | |
d153513d AK |
1636 | this function/index combination |
1637 | ||
4d25a066 JK |
1638 | The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned |
1639 | as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC | |
106ee47d | 1640 | support. Instead it is reported via:: |
4d25a066 JK |
1641 | |
1642 | ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER) | |
1643 | ||
1644 | if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the | |
1645 | feature in userspace, then you can enable the feature for KVM_SET_CPUID2. | |
1646 | ||
414fa985 | 1647 | |
68ba6974 | 1648 | 4.47 KVM_PPC_GET_PVINFO |
106ee47d MCC |
1649 | ----------------------- |
1650 | ||
1651 | :Capability: KVM_CAP_PPC_GET_PVINFO | |
1652 | :Architectures: ppc | |
1653 | :Type: vm ioctl | |
1654 | :Parameters: struct kvm_ppc_pvinfo (out) | |
1655 | :Returns: 0 on success, !0 on error | |
15711e9c | 1656 | |
106ee47d | 1657 | :: |
15711e9c | 1658 | |
106ee47d | 1659 | struct kvm_ppc_pvinfo { |
15711e9c AG |
1660 | __u32 flags; |
1661 | __u32 hcall[4]; | |
1662 | __u8 pad[108]; | |
106ee47d | 1663 | }; |
15711e9c AG |
1664 | |
1665 | This ioctl fetches PV specific information that need to be passed to the guest | |
1666 | using the device tree or other means from vm context. | |
1667 | ||
9202e076 | 1668 | The hcall array defines 4 instructions that make up a hypercall. |
15711e9c AG |
1669 | |
1670 | If any additional field gets added to this structure later on, a bit for that | |
1671 | additional piece of information will be set in the flags bitmap. | |
1672 | ||
106ee47d | 1673 | The flags bitmap is defined as:: |
9202e076 LYB |
1674 | |
1675 | /* the host supports the ePAPR idle hcall | |
1676 | #define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0) | |
414fa985 | 1677 | |
68ba6974 | 1678 | 4.52 KVM_SET_GSI_ROUTING |
106ee47d | 1679 | ------------------------ |
49f48172 | 1680 | |
106ee47d MCC |
1681 | :Capability: KVM_CAP_IRQ_ROUTING |
1682 | :Architectures: x86 s390 arm arm64 | |
1683 | :Type: vm ioctl | |
1684 | :Parameters: struct kvm_irq_routing (in) | |
1685 | :Returns: 0 on success, -1 on error | |
49f48172 JK |
1686 | |
1687 | Sets the GSI routing table entries, overwriting any previously set entries. | |
1688 | ||
180ae7b1 | 1689 | On arm/arm64, GSI routing has the following limitation: |
106ee47d | 1690 | |
180ae7b1 EA |
1691 | - GSI routing does not apply to KVM_IRQ_LINE but only to KVM_IRQFD. |
1692 | ||
106ee47d MCC |
1693 | :: |
1694 | ||
1695 | struct kvm_irq_routing { | |
49f48172 JK |
1696 | __u32 nr; |
1697 | __u32 flags; | |
1698 | struct kvm_irq_routing_entry entries[0]; | |
106ee47d | 1699 | }; |
49f48172 JK |
1700 | |
1701 | No flags are specified so far, the corresponding field must be set to zero. | |
1702 | ||
106ee47d MCC |
1703 | :: |
1704 | ||
1705 | struct kvm_irq_routing_entry { | |
49f48172 JK |
1706 | __u32 gsi; |
1707 | __u32 type; | |
1708 | __u32 flags; | |
1709 | __u32 pad; | |
1710 | union { | |
1711 | struct kvm_irq_routing_irqchip irqchip; | |
1712 | struct kvm_irq_routing_msi msi; | |
84223598 | 1713 | struct kvm_irq_routing_s390_adapter adapter; |
5c919412 | 1714 | struct kvm_irq_routing_hv_sint hv_sint; |
49f48172 JK |
1715 | __u32 pad[8]; |
1716 | } u; | |
106ee47d | 1717 | }; |
49f48172 | 1718 | |
106ee47d MCC |
1719 | /* gsi routing entry types */ |
1720 | #define KVM_IRQ_ROUTING_IRQCHIP 1 | |
1721 | #define KVM_IRQ_ROUTING_MSI 2 | |
1722 | #define KVM_IRQ_ROUTING_S390_ADAPTER 3 | |
1723 | #define KVM_IRQ_ROUTING_HV_SINT 4 | |
49f48172 | 1724 | |
76a10b86 | 1725 | flags: |
106ee47d | 1726 | |
6f49b2f3 PB |
1727 | - KVM_MSI_VALID_DEVID: used along with KVM_IRQ_ROUTING_MSI routing entry |
1728 | type, specifies that the devid field contains a valid value. The per-VM | |
1729 | KVM_CAP_MSI_DEVID capability advertises the requirement to provide | |
1730 | the device ID. If this capability is not available, userspace should | |
1731 | never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail. | |
76a10b86 | 1732 | - zero otherwise |
49f48172 | 1733 | |
106ee47d MCC |
1734 | :: |
1735 | ||
1736 | struct kvm_irq_routing_irqchip { | |
49f48172 JK |
1737 | __u32 irqchip; |
1738 | __u32 pin; | |
106ee47d | 1739 | }; |
49f48172 | 1740 | |
106ee47d | 1741 | struct kvm_irq_routing_msi { |
49f48172 JK |
1742 | __u32 address_lo; |
1743 | __u32 address_hi; | |
1744 | __u32 data; | |
76a10b86 EA |
1745 | union { |
1746 | __u32 pad; | |
1747 | __u32 devid; | |
1748 | }; | |
106ee47d | 1749 | }; |
49f48172 | 1750 | |
6f49b2f3 PB |
1751 | If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier |
1752 | for the device that wrote the MSI message. For PCI, this is usually a | |
1753 | BFD identifier in the lower 16 bits. | |
76a10b86 | 1754 | |
37131313 RK |
1755 | On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS |
1756 | feature of KVM_CAP_X2APIC_API capability is enabled. If it is enabled, | |
1757 | address_hi bits 31-8 provide bits 31-8 of the destination id. Bits 7-0 of | |
1758 | address_hi must be zero. | |
1759 | ||
106ee47d MCC |
1760 | :: |
1761 | ||
1762 | struct kvm_irq_routing_s390_adapter { | |
84223598 CH |
1763 | __u64 ind_addr; |
1764 | __u64 summary_addr; | |
1765 | __u64 ind_offset; | |
1766 | __u32 summary_offset; | |
1767 | __u32 adapter_id; | |
106ee47d | 1768 | }; |
84223598 | 1769 | |
106ee47d | 1770 | struct kvm_irq_routing_hv_sint { |
5c919412 AS |
1771 | __u32 vcpu; |
1772 | __u32 sint; | |
106ee47d | 1773 | }; |
414fa985 | 1774 | |
414fa985 JK |
1775 | |
1776 | 4.55 KVM_SET_TSC_KHZ | |
106ee47d | 1777 | -------------------- |
92a1f12d | 1778 | |
106ee47d MCC |
1779 | :Capability: KVM_CAP_TSC_CONTROL |
1780 | :Architectures: x86 | |
1781 | :Type: vcpu ioctl | |
1782 | :Parameters: virtual tsc_khz | |
1783 | :Returns: 0 on success, -1 on error | |
92a1f12d JR |
1784 | |
1785 | Specifies the tsc frequency for the virtual machine. The unit of the | |
1786 | frequency is KHz. | |
1787 | ||
414fa985 JK |
1788 | |
1789 | 4.56 KVM_GET_TSC_KHZ | |
106ee47d | 1790 | -------------------- |
92a1f12d | 1791 | |
106ee47d MCC |
1792 | :Capability: KVM_CAP_GET_TSC_KHZ |
1793 | :Architectures: x86 | |
1794 | :Type: vcpu ioctl | |
1795 | :Parameters: none | |
1796 | :Returns: virtual tsc-khz on success, negative value on error | |
92a1f12d JR |
1797 | |
1798 | Returns the tsc frequency of the guest. The unit of the return value is | |
1799 | KHz. If the host has unstable tsc this ioctl returns -EIO instead as an | |
1800 | error. | |
1801 | ||
414fa985 JK |
1802 | |
1803 | 4.57 KVM_GET_LAPIC | |
106ee47d | 1804 | ------------------ |
e7677933 | 1805 | |
106ee47d MCC |
1806 | :Capability: KVM_CAP_IRQCHIP |
1807 | :Architectures: x86 | |
1808 | :Type: vcpu ioctl | |
1809 | :Parameters: struct kvm_lapic_state (out) | |
1810 | :Returns: 0 on success, -1 on error | |
e7677933 | 1811 | |
106ee47d MCC |
1812 | :: |
1813 | ||
1814 | #define KVM_APIC_REG_SIZE 0x400 | |
1815 | struct kvm_lapic_state { | |
e7677933 | 1816 | char regs[KVM_APIC_REG_SIZE]; |
106ee47d | 1817 | }; |
e7677933 AK |
1818 | |
1819 | Reads the Local APIC registers and copies them into the input argument. The | |
1820 | data format and layout are the same as documented in the architecture manual. | |
1821 | ||
37131313 RK |
1822 | If KVM_X2APIC_API_USE_32BIT_IDS feature of KVM_CAP_X2APIC_API is |
1823 | enabled, then the format of APIC_ID register depends on the APIC mode | |
1824 | (reported by MSR_IA32_APICBASE) of its VCPU. x2APIC stores APIC ID in | |
1825 | the APIC_ID register (bytes 32-35). xAPIC only allows an 8-bit APIC ID | |
1826 | which is stored in bits 31-24 of the APIC register, or equivalently in | |
1827 | byte 35 of struct kvm_lapic_state's regs field. KVM_GET_LAPIC must then | |
1828 | be called after MSR_IA32_APICBASE has been set with KVM_SET_MSR. | |
1829 | ||
1830 | If KVM_X2APIC_API_USE_32BIT_IDS feature is disabled, struct kvm_lapic_state | |
1831 | always uses xAPIC format. | |
1832 | ||
414fa985 JK |
1833 | |
1834 | 4.58 KVM_SET_LAPIC | |
106ee47d | 1835 | ------------------ |
e7677933 | 1836 | |
106ee47d MCC |
1837 | :Capability: KVM_CAP_IRQCHIP |
1838 | :Architectures: x86 | |
1839 | :Type: vcpu ioctl | |
1840 | :Parameters: struct kvm_lapic_state (in) | |
1841 | :Returns: 0 on success, -1 on error | |
e7677933 | 1842 | |
106ee47d MCC |
1843 | :: |
1844 | ||
1845 | #define KVM_APIC_REG_SIZE 0x400 | |
1846 | struct kvm_lapic_state { | |
e7677933 | 1847 | char regs[KVM_APIC_REG_SIZE]; |
106ee47d | 1848 | }; |
e7677933 | 1849 | |
df5cbb27 | 1850 | Copies the input argument into the Local APIC registers. The data format |
e7677933 AK |
1851 | and layout are the same as documented in the architecture manual. |
1852 | ||
37131313 RK |
1853 | The format of the APIC ID register (bytes 32-35 of struct kvm_lapic_state's |
1854 | regs field) depends on the state of the KVM_CAP_X2APIC_API capability. | |
1855 | See the note in KVM_GET_LAPIC. | |
1856 | ||
414fa985 JK |
1857 | |
1858 | 4.59 KVM_IOEVENTFD | |
106ee47d | 1859 | ------------------ |
55399a02 | 1860 | |
106ee47d MCC |
1861 | :Capability: KVM_CAP_IOEVENTFD |
1862 | :Architectures: all | |
1863 | :Type: vm ioctl | |
1864 | :Parameters: struct kvm_ioeventfd (in) | |
1865 | :Returns: 0 on success, !0 on error | |
55399a02 SL |
1866 | |
1867 | This ioctl attaches or detaches an ioeventfd to a legal pio/mmio address | |
1868 | within the guest. A guest write in the registered address will signal the | |
1869 | provided event instead of triggering an exit. | |
1870 | ||
106ee47d MCC |
1871 | :: |
1872 | ||
1873 | struct kvm_ioeventfd { | |
55399a02 SL |
1874 | __u64 datamatch; |
1875 | __u64 addr; /* legal pio/mmio address */ | |
e9ea5069 | 1876 | __u32 len; /* 0, 1, 2, 4, or 8 bytes */ |
55399a02 SL |
1877 | __s32 fd; |
1878 | __u32 flags; | |
1879 | __u8 pad[36]; | |
106ee47d | 1880 | }; |
55399a02 | 1881 | |
2b83451b CH |
1882 | For the special case of virtio-ccw devices on s390, the ioevent is matched |
1883 | to a subchannel/virtqueue tuple instead. | |
1884 | ||
106ee47d | 1885 | The following flags are defined:: |
55399a02 | 1886 | |
106ee47d MCC |
1887 | #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch) |
1888 | #define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio) | |
1889 | #define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign) | |
1890 | #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \ | |
2b83451b | 1891 | (1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify) |
55399a02 SL |
1892 | |
1893 | If datamatch flag is set, the event will be signaled only if the written value | |
1894 | to the registered address is equal to datamatch in struct kvm_ioeventfd. | |
1895 | ||
2b83451b CH |
1896 | For virtio-ccw devices, addr contains the subchannel id and datamatch the |
1897 | virtqueue index. | |
1898 | ||
e9ea5069 JW |
1899 | With KVM_CAP_IOEVENTFD_ANY_LENGTH, a zero length ioeventfd is allowed, and |
1900 | the kernel will ignore the length of guest write and may get a faster vmexit. | |
1901 | The speedup may only apply to specific architectures, but the ioeventfd will | |
1902 | work anyway. | |
414fa985 JK |
1903 | |
1904 | 4.60 KVM_DIRTY_TLB | |
106ee47d | 1905 | ------------------ |
dc83b8bc | 1906 | |
106ee47d MCC |
1907 | :Capability: KVM_CAP_SW_TLB |
1908 | :Architectures: ppc | |
1909 | :Type: vcpu ioctl | |
1910 | :Parameters: struct kvm_dirty_tlb (in) | |
1911 | :Returns: 0 on success, -1 on error | |
1912 | ||
1913 | :: | |
dc83b8bc | 1914 | |
106ee47d | 1915 | struct kvm_dirty_tlb { |
dc83b8bc SW |
1916 | __u64 bitmap; |
1917 | __u32 num_dirty; | |
106ee47d | 1918 | }; |
dc83b8bc SW |
1919 | |
1920 | This must be called whenever userspace has changed an entry in the shared | |
1921 | TLB, prior to calling KVM_RUN on the associated vcpu. | |
1922 | ||
1923 | The "bitmap" field is the userspace address of an array. This array | |
1924 | consists of a number of bits, equal to the total number of TLB entries as | |
1925 | determined by the last successful call to KVM_CONFIG_TLB, rounded up to the | |
1926 | nearest multiple of 64. | |
1927 | ||
1928 | Each bit corresponds to one TLB entry, ordered the same as in the shared TLB | |
1929 | array. | |
1930 | ||
1931 | The array is little-endian: the bit 0 is the least significant bit of the | |
1932 | first byte, bit 8 is the least significant bit of the second byte, etc. | |
1933 | This avoids any complications with differing word sizes. | |
1934 | ||
1935 | The "num_dirty" field is a performance hint for KVM to determine whether it | |
1936 | should skip processing the bitmap and just invalidate everything. It must | |
1937 | be set to the number of set bits in the bitmap. | |
1938 | ||
414fa985 | 1939 | |
54738c09 | 1940 | 4.62 KVM_CREATE_SPAPR_TCE |
106ee47d | 1941 | ------------------------- |
54738c09 | 1942 | |
106ee47d MCC |
1943 | :Capability: KVM_CAP_SPAPR_TCE |
1944 | :Architectures: powerpc | |
1945 | :Type: vm ioctl | |
1946 | :Parameters: struct kvm_create_spapr_tce (in) | |
1947 | :Returns: file descriptor for manipulating the created TCE table | |
54738c09 DG |
1948 | |
1949 | This creates a virtual TCE (translation control entry) table, which | |
1950 | is an IOMMU for PAPR-style virtual I/O. It is used to translate | |
1951 | logical addresses used in virtual I/O into guest physical addresses, | |
1952 | and provides a scatter/gather capability for PAPR virtual I/O. | |
1953 | ||
106ee47d MCC |
1954 | :: |
1955 | ||
1956 | /* for KVM_CAP_SPAPR_TCE */ | |
1957 | struct kvm_create_spapr_tce { | |
54738c09 DG |
1958 | __u64 liobn; |
1959 | __u32 window_size; | |
106ee47d | 1960 | }; |
54738c09 DG |
1961 | |
1962 | The liobn field gives the logical IO bus number for which to create a | |
1963 | TCE table. The window_size field specifies the size of the DMA window | |
1964 | which this TCE table will translate - the table will contain one 64 | |
1965 | bit TCE entry for every 4kiB of the DMA window. | |
1966 | ||
1967 | When the guest issues an H_PUT_TCE hcall on a liobn for which a TCE | |
1968 | table has been created using this ioctl(), the kernel will handle it | |
1969 | in real mode, updating the TCE table. H_PUT_TCE calls for other | |
1970 | liobns will cause a vm exit and must be handled by userspace. | |
1971 | ||
1972 | The return value is a file descriptor which can be passed to mmap(2) | |
1973 | to map the created TCE table into userspace. This lets userspace read | |
1974 | the entries written by kernel-handled H_PUT_TCE calls, and also lets | |
1975 | userspace update the TCE table directly which is useful in some | |
1976 | circumstances. | |
1977 | ||
414fa985 | 1978 | |
aa04b4cc | 1979 | 4.63 KVM_ALLOCATE_RMA |
106ee47d | 1980 | --------------------- |
aa04b4cc | 1981 | |
106ee47d MCC |
1982 | :Capability: KVM_CAP_PPC_RMA |
1983 | :Architectures: powerpc | |
1984 | :Type: vm ioctl | |
1985 | :Parameters: struct kvm_allocate_rma (out) | |
1986 | :Returns: file descriptor for mapping the allocated RMA | |
aa04b4cc PM |
1987 | |
1988 | This allocates a Real Mode Area (RMA) from the pool allocated at boot | |
1989 | time by the kernel. An RMA is a physically-contiguous, aligned region | |
1990 | of memory used on older POWER processors to provide the memory which | |
1991 | will be accessed by real-mode (MMU off) accesses in a KVM guest. | |
1992 | POWER processors support a set of sizes for the RMA that usually | |
1993 | includes 64MB, 128MB, 256MB and some larger powers of two. | |
1994 | ||
106ee47d MCC |
1995 | :: |
1996 | ||
1997 | /* for KVM_ALLOCATE_RMA */ | |
1998 | struct kvm_allocate_rma { | |
aa04b4cc | 1999 | __u64 rma_size; |
106ee47d | 2000 | }; |
aa04b4cc PM |
2001 | |
2002 | The return value is a file descriptor which can be passed to mmap(2) | |
2003 | to map the allocated RMA into userspace. The mapped area can then be | |
2004 | passed to the KVM_SET_USER_MEMORY_REGION ioctl to establish it as the | |
2005 | RMA for a virtual machine. The size of the RMA in bytes (which is | |
2006 | fixed at host kernel boot time) is returned in the rma_size field of | |
2007 | the argument structure. | |
2008 | ||
2009 | The KVM_CAP_PPC_RMA capability is 1 or 2 if the KVM_ALLOCATE_RMA ioctl | |
2010 | is supported; 2 if the processor requires all virtual machines to have | |
2011 | an RMA, or 1 if the processor can use an RMA but doesn't require it, | |
2012 | because it supports the Virtual RMA (VRMA) facility. | |
2013 | ||
414fa985 | 2014 | |
3f745f1e | 2015 | 4.64 KVM_NMI |
106ee47d | 2016 | ------------ |
3f745f1e | 2017 | |
106ee47d MCC |
2018 | :Capability: KVM_CAP_USER_NMI |
2019 | :Architectures: x86 | |
2020 | :Type: vcpu ioctl | |
2021 | :Parameters: none | |
2022 | :Returns: 0 on success, -1 on error | |
3f745f1e AK |
2023 | |
2024 | Queues an NMI on the thread's vcpu. Note this is well defined only | |
2025 | when KVM_CREATE_IRQCHIP has not been called, since this is an interface | |
2026 | between the virtual cpu core and virtual local APIC. After KVM_CREATE_IRQCHIP | |
2027 | has been called, this interface is completely emulated within the kernel. | |
2028 | ||
2029 | To use this to emulate the LINT1 input with KVM_CREATE_IRQCHIP, use the | |
2030 | following algorithm: | |
2031 | ||
5d4f6f3d | 2032 | - pause the vcpu |
3f745f1e AK |
2033 | - read the local APIC's state (KVM_GET_LAPIC) |
2034 | - check whether changing LINT1 will queue an NMI (see the LVT entry for LINT1) | |
2035 | - if so, issue KVM_NMI | |
2036 | - resume the vcpu | |
2037 | ||
2038 | Some guests configure the LINT1 NMI input to cause a panic, aiding in | |
2039 | debugging. | |
2040 | ||
414fa985 | 2041 | |
e24ed81f | 2042 | 4.65 KVM_S390_UCAS_MAP |
106ee47d | 2043 | ---------------------- |
27e0393f | 2044 | |
106ee47d MCC |
2045 | :Capability: KVM_CAP_S390_UCONTROL |
2046 | :Architectures: s390 | |
2047 | :Type: vcpu ioctl | |
2048 | :Parameters: struct kvm_s390_ucas_mapping (in) | |
2049 | :Returns: 0 in case of success | |
2050 | ||
2051 | The parameter is defined like this:: | |
27e0393f | 2052 | |
27e0393f CO |
2053 | struct kvm_s390_ucas_mapping { |
2054 | __u64 user_addr; | |
2055 | __u64 vcpu_addr; | |
2056 | __u64 length; | |
2057 | }; | |
2058 | ||
2059 | This ioctl maps the memory at "user_addr" with the length "length" to | |
2060 | the vcpu's address space starting at "vcpu_addr". All parameters need to | |
f884ab15 | 2061 | be aligned by 1 megabyte. |
27e0393f | 2062 | |
414fa985 | 2063 | |
e24ed81f | 2064 | 4.66 KVM_S390_UCAS_UNMAP |
106ee47d | 2065 | ------------------------ |
27e0393f | 2066 | |
106ee47d MCC |
2067 | :Capability: KVM_CAP_S390_UCONTROL |
2068 | :Architectures: s390 | |
2069 | :Type: vcpu ioctl | |
2070 | :Parameters: struct kvm_s390_ucas_mapping (in) | |
2071 | :Returns: 0 in case of success | |
2072 | ||
2073 | The parameter is defined like this:: | |
27e0393f | 2074 | |
27e0393f CO |
2075 | struct kvm_s390_ucas_mapping { |
2076 | __u64 user_addr; | |
2077 | __u64 vcpu_addr; | |
2078 | __u64 length; | |
2079 | }; | |
2080 | ||
2081 | This ioctl unmaps the memory in the vcpu's address space starting at | |
2082 | "vcpu_addr" with the length "length". The field "user_addr" is ignored. | |
f884ab15 | 2083 | All parameters need to be aligned by 1 megabyte. |
27e0393f | 2084 | |
414fa985 | 2085 | |
e24ed81f | 2086 | 4.67 KVM_S390_VCPU_FAULT |
106ee47d | 2087 | ------------------------ |
ccc7910f | 2088 | |
106ee47d MCC |
2089 | :Capability: KVM_CAP_S390_UCONTROL |
2090 | :Architectures: s390 | |
2091 | :Type: vcpu ioctl | |
2092 | :Parameters: vcpu absolute address (in) | |
2093 | :Returns: 0 in case of success | |
ccc7910f CO |
2094 | |
2095 | This call creates a page table entry on the virtual cpu's address space | |
2096 | (for user controlled virtual machines) or the virtual machine's address | |
2097 | space (for regular virtual machines). This only works for minor faults, | |
2098 | thus it's recommended to access subject memory page via the user page | |
2099 | table upfront. This is useful to handle validity intercepts for user | |
2100 | controlled virtual machines to fault in the virtual cpu's lowcore pages | |
2101 | prior to calling the KVM_RUN ioctl. | |
2102 | ||
414fa985 | 2103 | |
e24ed81f | 2104 | 4.68 KVM_SET_ONE_REG |
106ee47d MCC |
2105 | -------------------- |
2106 | ||
2107 | :Capability: KVM_CAP_ONE_REG | |
2108 | :Architectures: all | |
2109 | :Type: vcpu ioctl | |
2110 | :Parameters: struct kvm_one_reg (in) | |
2111 | :Returns: 0 on success, negative value on failure | |
e24ed81f | 2112 | |
395f562f | 2113 | Errors: |
106ee47d MCC |
2114 | |
2115 | ====== ============================================================ | |
2116 | ENOENT no such register | |
68cf7b1f JF |
2117 | EINVAL invalid register ID, or no such register or used with VMs in |
2118 | protected virtualization mode on s390 | |
106ee47d MCC |
2119 | EPERM (arm64) register access not allowed before vcpu finalization |
2120 | ====== ============================================================ | |
2121 | ||
fe365b4e DM |
2122 | (These error codes are indicative only: do not rely on a specific error |
2123 | code being returned in a specific situation.) | |
e24ed81f | 2124 | |
106ee47d MCC |
2125 | :: |
2126 | ||
2127 | struct kvm_one_reg { | |
e24ed81f AG |
2128 | __u64 id; |
2129 | __u64 addr; | |
106ee47d | 2130 | }; |
e24ed81f AG |
2131 | |
2132 | Using this ioctl, a single vcpu register can be set to a specific value | |
2133 | defined by user space with the passed in struct kvm_one_reg, where id | |
2134 | refers to the register identifier as described below and addr is a pointer | |
2135 | to a variable with the respective size. There can be architecture agnostic | |
2136 | and architecture specific registers. Each have their own range of operation | |
2137 | and their own constants and width. To keep track of the implemented | |
2138 | registers, find a list below: | |
2139 | ||
106ee47d MCC |
2140 | ======= =============================== ============ |
2141 | Arch Register Width (bits) | |
2142 | ======= =============================== ============ | |
2143 | PPC KVM_REG_PPC_HIOR 64 | |
2144 | PPC KVM_REG_PPC_IAC1 64 | |
2145 | PPC KVM_REG_PPC_IAC2 64 | |
2146 | PPC KVM_REG_PPC_IAC3 64 | |
2147 | PPC KVM_REG_PPC_IAC4 64 | |
2148 | PPC KVM_REG_PPC_DAC1 64 | |
2149 | PPC KVM_REG_PPC_DAC2 64 | |
2150 | PPC KVM_REG_PPC_DABR 64 | |
2151 | PPC KVM_REG_PPC_DSCR 64 | |
2152 | PPC KVM_REG_PPC_PURR 64 | |
2153 | PPC KVM_REG_PPC_SPURR 64 | |
2154 | PPC KVM_REG_PPC_DAR 64 | |
2155 | PPC KVM_REG_PPC_DSISR 32 | |
2156 | PPC KVM_REG_PPC_AMR 64 | |
2157 | PPC KVM_REG_PPC_UAMOR 64 | |
2158 | PPC KVM_REG_PPC_MMCR0 64 | |
2159 | PPC KVM_REG_PPC_MMCR1 64 | |
2160 | PPC KVM_REG_PPC_MMCRA 64 | |
2161 | PPC KVM_REG_PPC_MMCR2 64 | |
2162 | PPC KVM_REG_PPC_MMCRS 64 | |
5752fe0b | 2163 | PPC KVM_REG_PPC_MMCR3 64 |
106ee47d MCC |
2164 | PPC KVM_REG_PPC_SIAR 64 |
2165 | PPC KVM_REG_PPC_SDAR 64 | |
2166 | PPC KVM_REG_PPC_SIER 64 | |
5752fe0b AR |
2167 | PPC KVM_REG_PPC_SIER2 64 |
2168 | PPC KVM_REG_PPC_SIER3 64 | |
106ee47d MCC |
2169 | PPC KVM_REG_PPC_PMC1 32 |
2170 | PPC KVM_REG_PPC_PMC2 32 | |
2171 | PPC KVM_REG_PPC_PMC3 32 | |
2172 | PPC KVM_REG_PPC_PMC4 32 | |
2173 | PPC KVM_REG_PPC_PMC5 32 | |
2174 | PPC KVM_REG_PPC_PMC6 32 | |
2175 | PPC KVM_REG_PPC_PMC7 32 | |
2176 | PPC KVM_REG_PPC_PMC8 32 | |
2177 | PPC KVM_REG_PPC_FPR0 64 | |
2178 | ... | |
2179 | PPC KVM_REG_PPC_FPR31 64 | |
2180 | PPC KVM_REG_PPC_VR0 128 | |
2181 | ... | |
2182 | PPC KVM_REG_PPC_VR31 128 | |
2183 | PPC KVM_REG_PPC_VSR0 128 | |
2184 | ... | |
2185 | PPC KVM_REG_PPC_VSR31 128 | |
2186 | PPC KVM_REG_PPC_FPSCR 64 | |
2187 | PPC KVM_REG_PPC_VSCR 32 | |
2188 | PPC KVM_REG_PPC_VPA_ADDR 64 | |
2189 | PPC KVM_REG_PPC_VPA_SLB 128 | |
2190 | PPC KVM_REG_PPC_VPA_DTL 128 | |
2191 | PPC KVM_REG_PPC_EPCR 32 | |
2192 | PPC KVM_REG_PPC_EPR 32 | |
2193 | PPC KVM_REG_PPC_TCR 32 | |
2194 | PPC KVM_REG_PPC_TSR 32 | |
2195 | PPC KVM_REG_PPC_OR_TSR 32 | |
2196 | PPC KVM_REG_PPC_CLEAR_TSR 32 | |
2197 | PPC KVM_REG_PPC_MAS0 32 | |
2198 | PPC KVM_REG_PPC_MAS1 32 | |
2199 | PPC KVM_REG_PPC_MAS2 64 | |
2200 | PPC KVM_REG_PPC_MAS7_3 64 | |
2201 | PPC KVM_REG_PPC_MAS4 32 | |
2202 | PPC KVM_REG_PPC_MAS6 32 | |
2203 | PPC KVM_REG_PPC_MMUCFG 32 | |
2204 | PPC KVM_REG_PPC_TLB0CFG 32 | |
2205 | PPC KVM_REG_PPC_TLB1CFG 32 | |
2206 | PPC KVM_REG_PPC_TLB2CFG 32 | |
2207 | PPC KVM_REG_PPC_TLB3CFG 32 | |
2208 | PPC KVM_REG_PPC_TLB0PS 32 | |
2209 | PPC KVM_REG_PPC_TLB1PS 32 | |
2210 | PPC KVM_REG_PPC_TLB2PS 32 | |
2211 | PPC KVM_REG_PPC_TLB3PS 32 | |
2212 | PPC KVM_REG_PPC_EPTCFG 32 | |
2213 | PPC KVM_REG_PPC_ICP_STATE 64 | |
2214 | PPC KVM_REG_PPC_VP_STATE 128 | |
2215 | PPC KVM_REG_PPC_TB_OFFSET 64 | |
2216 | PPC KVM_REG_PPC_SPMC1 32 | |
2217 | PPC KVM_REG_PPC_SPMC2 32 | |
2218 | PPC KVM_REG_PPC_IAMR 64 | |
2219 | PPC KVM_REG_PPC_TFHAR 64 | |
2220 | PPC KVM_REG_PPC_TFIAR 64 | |
2221 | PPC KVM_REG_PPC_TEXASR 64 | |
2222 | PPC KVM_REG_PPC_FSCR 64 | |
2223 | PPC KVM_REG_PPC_PSPB 32 | |
2224 | PPC KVM_REG_PPC_EBBHR 64 | |
2225 | PPC KVM_REG_PPC_EBBRR 64 | |
2226 | PPC KVM_REG_PPC_BESCR 64 | |
2227 | PPC KVM_REG_PPC_TAR 64 | |
2228 | PPC KVM_REG_PPC_DPDES 64 | |
2229 | PPC KVM_REG_PPC_DAWR 64 | |
2230 | PPC KVM_REG_PPC_DAWRX 64 | |
2231 | PPC KVM_REG_PPC_CIABR 64 | |
2232 | PPC KVM_REG_PPC_IC 64 | |
2233 | PPC KVM_REG_PPC_VTB 64 | |
2234 | PPC KVM_REG_PPC_CSIGR 64 | |
2235 | PPC KVM_REG_PPC_TACR 64 | |
2236 | PPC KVM_REG_PPC_TCSCR 64 | |
2237 | PPC KVM_REG_PPC_PID 64 | |
2238 | PPC KVM_REG_PPC_ACOP 64 | |
2239 | PPC KVM_REG_PPC_VRSAVE 32 | |
2240 | PPC KVM_REG_PPC_LPCR 32 | |
2241 | PPC KVM_REG_PPC_LPCR_64 64 | |
2242 | PPC KVM_REG_PPC_PPR 64 | |
2243 | PPC KVM_REG_PPC_ARCH_COMPAT 32 | |
2244 | PPC KVM_REG_PPC_DABRX 32 | |
2245 | PPC KVM_REG_PPC_WORT 64 | |
2246 | PPC KVM_REG_PPC_SPRG9 64 | |
2247 | PPC KVM_REG_PPC_DBSR 32 | |
2248 | PPC KVM_REG_PPC_TIDR 64 | |
2249 | PPC KVM_REG_PPC_PSSCR 64 | |
2250 | PPC KVM_REG_PPC_DEC_EXPIRY 64 | |
2251 | PPC KVM_REG_PPC_PTCR 64 | |
2252 | PPC KVM_REG_PPC_TM_GPR0 64 | |
2253 | ... | |
2254 | PPC KVM_REG_PPC_TM_GPR31 64 | |
2255 | PPC KVM_REG_PPC_TM_VSR0 128 | |
2256 | ... | |
2257 | PPC KVM_REG_PPC_TM_VSR63 128 | |
2258 | PPC KVM_REG_PPC_TM_CR 64 | |
2259 | PPC KVM_REG_PPC_TM_LR 64 | |
2260 | PPC KVM_REG_PPC_TM_CTR 64 | |
2261 | PPC KVM_REG_PPC_TM_FPSCR 64 | |
2262 | PPC KVM_REG_PPC_TM_AMR 64 | |
2263 | PPC KVM_REG_PPC_TM_PPR 64 | |
2264 | PPC KVM_REG_PPC_TM_VRSAVE 64 | |
2265 | PPC KVM_REG_PPC_TM_VSCR 32 | |
2266 | PPC KVM_REG_PPC_TM_DSCR 64 | |
2267 | PPC KVM_REG_PPC_TM_TAR 64 | |
2268 | PPC KVM_REG_PPC_TM_XER 64 | |
2269 | ||
2270 | MIPS KVM_REG_MIPS_R0 64 | |
2271 | ... | |
2272 | MIPS KVM_REG_MIPS_R31 64 | |
2273 | MIPS KVM_REG_MIPS_HI 64 | |
2274 | MIPS KVM_REG_MIPS_LO 64 | |
2275 | MIPS KVM_REG_MIPS_PC 64 | |
2276 | MIPS KVM_REG_MIPS_CP0_INDEX 32 | |
2277 | MIPS KVM_REG_MIPS_CP0_ENTRYLO0 64 | |
2278 | MIPS KVM_REG_MIPS_CP0_ENTRYLO1 64 | |
2279 | MIPS KVM_REG_MIPS_CP0_CONTEXT 64 | |
2280 | MIPS KVM_REG_MIPS_CP0_CONTEXTCONFIG 32 | |
2281 | MIPS KVM_REG_MIPS_CP0_USERLOCAL 64 | |
2282 | MIPS KVM_REG_MIPS_CP0_XCONTEXTCONFIG 64 | |
2283 | MIPS KVM_REG_MIPS_CP0_PAGEMASK 32 | |
2284 | MIPS KVM_REG_MIPS_CP0_PAGEGRAIN 32 | |
2285 | MIPS KVM_REG_MIPS_CP0_SEGCTL0 64 | |
2286 | MIPS KVM_REG_MIPS_CP0_SEGCTL1 64 | |
2287 | MIPS KVM_REG_MIPS_CP0_SEGCTL2 64 | |
2288 | MIPS KVM_REG_MIPS_CP0_PWBASE 64 | |
2289 | MIPS KVM_REG_MIPS_CP0_PWFIELD 64 | |
2290 | MIPS KVM_REG_MIPS_CP0_PWSIZE 64 | |
2291 | MIPS KVM_REG_MIPS_CP0_WIRED 32 | |
2292 | MIPS KVM_REG_MIPS_CP0_PWCTL 32 | |
2293 | MIPS KVM_REG_MIPS_CP0_HWRENA 32 | |
2294 | MIPS KVM_REG_MIPS_CP0_BADVADDR 64 | |
2295 | MIPS KVM_REG_MIPS_CP0_BADINSTR 32 | |
2296 | MIPS KVM_REG_MIPS_CP0_BADINSTRP 32 | |
2297 | MIPS KVM_REG_MIPS_CP0_COUNT 32 | |
2298 | MIPS KVM_REG_MIPS_CP0_ENTRYHI 64 | |
2299 | MIPS KVM_REG_MIPS_CP0_COMPARE 32 | |
2300 | MIPS KVM_REG_MIPS_CP0_STATUS 32 | |
2301 | MIPS KVM_REG_MIPS_CP0_INTCTL 32 | |
2302 | MIPS KVM_REG_MIPS_CP0_CAUSE 32 | |
2303 | MIPS KVM_REG_MIPS_CP0_EPC 64 | |
2304 | MIPS KVM_REG_MIPS_CP0_PRID 32 | |
2305 | MIPS KVM_REG_MIPS_CP0_EBASE 64 | |
2306 | MIPS KVM_REG_MIPS_CP0_CONFIG 32 | |
2307 | MIPS KVM_REG_MIPS_CP0_CONFIG1 32 | |
2308 | MIPS KVM_REG_MIPS_CP0_CONFIG2 32 | |
2309 | MIPS KVM_REG_MIPS_CP0_CONFIG3 32 | |
2310 | MIPS KVM_REG_MIPS_CP0_CONFIG4 32 | |
2311 | MIPS KVM_REG_MIPS_CP0_CONFIG5 32 | |
2312 | MIPS KVM_REG_MIPS_CP0_CONFIG7 32 | |
2313 | MIPS KVM_REG_MIPS_CP0_XCONTEXT 64 | |
2314 | MIPS KVM_REG_MIPS_CP0_ERROREPC 64 | |
2315 | MIPS KVM_REG_MIPS_CP0_KSCRATCH1 64 | |
2316 | MIPS KVM_REG_MIPS_CP0_KSCRATCH2 64 | |
2317 | MIPS KVM_REG_MIPS_CP0_KSCRATCH3 64 | |
2318 | MIPS KVM_REG_MIPS_CP0_KSCRATCH4 64 | |
2319 | MIPS KVM_REG_MIPS_CP0_KSCRATCH5 64 | |
2320 | MIPS KVM_REG_MIPS_CP0_KSCRATCH6 64 | |
2321 | MIPS KVM_REG_MIPS_CP0_MAAR(0..63) 64 | |
2322 | MIPS KVM_REG_MIPS_COUNT_CTL 64 | |
2323 | MIPS KVM_REG_MIPS_COUNT_RESUME 64 | |
2324 | MIPS KVM_REG_MIPS_COUNT_HZ 64 | |
2325 | MIPS KVM_REG_MIPS_FPR_32(0..31) 32 | |
2326 | MIPS KVM_REG_MIPS_FPR_64(0..31) 64 | |
2327 | MIPS KVM_REG_MIPS_VEC_128(0..31) 128 | |
2328 | MIPS KVM_REG_MIPS_FCR_IR 32 | |
2329 | MIPS KVM_REG_MIPS_FCR_CSR 32 | |
2330 | MIPS KVM_REG_MIPS_MSA_IR 32 | |
2331 | MIPS KVM_REG_MIPS_MSA_CSR 32 | |
2332 | ======= =============================== ============ | |
414fa985 | 2333 | |
749cf76c CD |
2334 | ARM registers are mapped using the lower 32 bits. The upper 16 of that |
2335 | is the register group type, or coprocessor number: | |
2336 | ||
106ee47d MCC |
2337 | ARM core registers have the following id bit patterns:: |
2338 | ||
aa404ddf | 2339 | 0x4020 0000 0010 <index into the kvm_regs struct:16> |
749cf76c | 2340 | |
106ee47d MCC |
2341 | ARM 32-bit CP15 registers have the following id bit patterns:: |
2342 | ||
aa404ddf | 2343 | 0x4020 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> |
1138245c | 2344 | |
106ee47d MCC |
2345 | ARM 64-bit CP15 registers have the following id bit patterns:: |
2346 | ||
aa404ddf | 2347 | 0x4030 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> |
749cf76c | 2348 | |
106ee47d MCC |
2349 | ARM CCSIDR registers are demultiplexed by CSSELR value:: |
2350 | ||
aa404ddf | 2351 | 0x4020 0000 0011 00 <csselr:8> |
749cf76c | 2352 | |
106ee47d MCC |
2353 | ARM 32-bit VFP control registers have the following id bit patterns:: |
2354 | ||
aa404ddf | 2355 | 0x4020 0000 0012 1 <regno:12> |
4fe21e4c | 2356 | |
106ee47d MCC |
2357 | ARM 64-bit FP registers have the following id bit patterns:: |
2358 | ||
aa404ddf | 2359 | 0x4030 0000 0012 0 <regno:12> |
4fe21e4c | 2360 | |
106ee47d MCC |
2361 | ARM firmware pseudo-registers have the following bit pattern:: |
2362 | ||
85bd0ba1 MZ |
2363 | 0x4030 0000 0014 <regno:16> |
2364 | ||
379e04c7 MZ |
2365 | |
2366 | arm64 registers are mapped using the lower 32 bits. The upper 16 of | |
2367 | that is the register group type, or coprocessor number: | |
2368 | ||
2369 | arm64 core/FP-SIMD registers have the following id bit patterns. Note | |
2370 | that the size of the access is variable, as the kvm_regs structure | |
2371 | contains elements ranging from 32 to 128 bits. The index is a 32bit | |
106ee47d MCC |
2372 | value in the kvm_regs structure seen as a 32bit array:: |
2373 | ||
379e04c7 MZ |
2374 | 0x60x0 0000 0010 <index into the kvm_regs struct:16> |
2375 | ||
fd3bc912 | 2376 | Specifically: |
106ee47d MCC |
2377 | |
2378 | ======================= ========= ===== ======================================= | |
fd3bc912 | 2379 | Encoding Register Bits kvm_regs member |
106ee47d | 2380 | ======================= ========= ===== ======================================= |
fd3bc912 DM |
2381 | 0x6030 0000 0010 0000 X0 64 regs.regs[0] |
2382 | 0x6030 0000 0010 0002 X1 64 regs.regs[1] | |
106ee47d | 2383 | ... |
fd3bc912 DM |
2384 | 0x6030 0000 0010 003c X30 64 regs.regs[30] |
2385 | 0x6030 0000 0010 003e SP 64 regs.sp | |
2386 | 0x6030 0000 0010 0040 PC 64 regs.pc | |
2387 | 0x6030 0000 0010 0042 PSTATE 64 regs.pstate | |
2388 | 0x6030 0000 0010 0044 SP_EL1 64 sp_el1 | |
2389 | 0x6030 0000 0010 0046 ELR_EL1 64 elr_el1 | |
2390 | 0x6030 0000 0010 0048 SPSR_EL1 64 spsr[KVM_SPSR_EL1] (alias SPSR_SVC) | |
2391 | 0x6030 0000 0010 004a SPSR_ABT 64 spsr[KVM_SPSR_ABT] | |
2392 | 0x6030 0000 0010 004c SPSR_UND 64 spsr[KVM_SPSR_UND] | |
2393 | 0x6030 0000 0010 004e SPSR_IRQ 64 spsr[KVM_SPSR_IRQ] | |
2394 | 0x6060 0000 0010 0050 SPSR_FIQ 64 spsr[KVM_SPSR_FIQ] | |
106ee47d MCC |
2395 | 0x6040 0000 0010 0054 V0 128 fp_regs.vregs[0] [1]_ |
2396 | 0x6040 0000 0010 0058 V1 128 fp_regs.vregs[1] [1]_ | |
2397 | ... | |
2398 | 0x6040 0000 0010 00d0 V31 128 fp_regs.vregs[31] [1]_ | |
fd3bc912 DM |
2399 | 0x6020 0000 0010 00d4 FPSR 32 fp_regs.fpsr |
2400 | 0x6020 0000 0010 00d5 FPCR 32 fp_regs.fpcr | |
106ee47d | 2401 | ======================= ========= ===== ======================================= |
fd3bc912 | 2402 | |
106ee47d MCC |
2403 | .. [1] These encodings are not accepted for SVE-enabled vcpus. See |
2404 | KVM_ARM_VCPU_INIT. | |
50036ad0 | 2405 | |
106ee47d MCC |
2406 | The equivalent register content can be accessed via bits [127:0] of |
2407 | the corresponding SVE Zn registers instead for vcpus that have SVE | |
2408 | enabled (see below). | |
2409 | ||
2410 | arm64 CCSIDR registers are demultiplexed by CSSELR value:: | |
50036ad0 | 2411 | |
379e04c7 MZ |
2412 | 0x6020 0000 0011 00 <csselr:8> |
2413 | ||
106ee47d MCC |
2414 | arm64 system registers have the following id bit patterns:: |
2415 | ||
379e04c7 MZ |
2416 | 0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3> |
2417 | ||
106ee47d MCC |
2418 | .. warning:: |
2419 | ||
290a6bb0 AJ |
2420 | Two system register IDs do not follow the specified pattern. These |
2421 | are KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT, which map to | |
2422 | system registers CNTV_CVAL_EL0 and CNTVCT_EL0 respectively. These | |
2423 | two had their values accidentally swapped, which means TIMER_CVAL is | |
2424 | derived from the register encoding for CNTVCT_EL0 and TIMER_CNT is | |
2425 | derived from the register encoding for CNTV_CVAL_EL0. As this is | |
2426 | API, it must remain this way. | |
2427 | ||
106ee47d MCC |
2428 | arm64 firmware pseudo-registers have the following bit pattern:: |
2429 | ||
85bd0ba1 MZ |
2430 | 0x6030 0000 0014 <regno:16> |
2431 | ||
106ee47d MCC |
2432 | arm64 SVE registers have the following bit patterns:: |
2433 | ||
50036ad0 DM |
2434 | 0x6080 0000 0015 00 <n:5> <slice:5> Zn bits[2048*slice + 2047 : 2048*slice] |
2435 | 0x6050 0000 0015 04 <n:4> <slice:5> Pn bits[256*slice + 255 : 256*slice] | |
2436 | 0x6050 0000 0015 060 <slice:5> FFR bits[256*slice + 255 : 256*slice] | |
2437 | 0x6060 0000 0015 ffff KVM_REG_ARM64_SVE_VLS pseudo-register | |
2438 | ||
43b8e1f0 DM |
2439 | Access to register IDs where 2048 * slice >= 128 * max_vq will fail with |
2440 | ENOENT. max_vq is the vcpu's maximum supported vector length in 128-bit | |
106ee47d | 2441 | quadwords: see [2]_ below. |
50036ad0 DM |
2442 | |
2443 | These registers are only accessible on vcpus for which SVE is enabled. | |
2444 | See KVM_ARM_VCPU_INIT for details. | |
2445 | ||
2446 | In addition, except for KVM_REG_ARM64_SVE_VLS, these registers are not | |
2447 | accessible until the vcpu's SVE configuration has been finalized | |
2448 | using KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE). See KVM_ARM_VCPU_INIT | |
2449 | and KVM_ARM_VCPU_FINALIZE for more information about this procedure. | |
2450 | ||
2451 | KVM_REG_ARM64_SVE_VLS is a pseudo-register that allows the set of vector | |
2452 | lengths supported by the vcpu to be discovered and configured by | |
2453 | userspace. When transferred to or from user memory via KVM_GET_ONE_REG | |
4bd774e5 DM |
2454 | or KVM_SET_ONE_REG, the value of this register is of type |
2455 | __u64[KVM_ARM64_SVE_VLS_WORDS], and encodes the set of vector lengths as | |
106ee47d | 2456 | follows:: |
50036ad0 | 2457 | |
106ee47d | 2458 | __u64 vector_lengths[KVM_ARM64_SVE_VLS_WORDS]; |
50036ad0 | 2459 | |
106ee47d MCC |
2460 | if (vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX && |
2461 | ((vector_lengths[(vq - KVM_ARM64_SVE_VQ_MIN) / 64] >> | |
4bd774e5 | 2462 | ((vq - KVM_ARM64_SVE_VQ_MIN) % 64)) & 1)) |
50036ad0 | 2463 | /* Vector length vq * 16 bytes supported */ |
106ee47d | 2464 | else |
50036ad0 DM |
2465 | /* Vector length vq * 16 bytes not supported */ |
2466 | ||
106ee47d MCC |
2467 | .. [2] The maximum value vq for which the above condition is true is |
2468 | max_vq. This is the maximum vector length available to the guest on | |
2469 | this vcpu, and determines which register slices are visible through | |
2470 | this ioctl interface. | |
50036ad0 | 2471 | |
b693d0b3 | 2472 | (See Documentation/arm64/sve.rst for an explanation of the "vq" |
50036ad0 DM |
2473 | nomenclature.) |
2474 | ||
2475 | KVM_REG_ARM64_SVE_VLS is only accessible after KVM_ARM_VCPU_INIT. | |
2476 | KVM_ARM_VCPU_INIT initialises it to the best set of vector lengths that | |
2477 | the host supports. | |
2478 | ||
2479 | Userspace may subsequently modify it if desired until the vcpu's SVE | |
2480 | configuration is finalized using KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE). | |
2481 | ||
2482 | Apart from simply removing all vector lengths from the host set that | |
2483 | exceed some value, support for arbitrarily chosen sets of vector lengths | |
2484 | is hardware-dependent and may not be available. Attempting to configure | |
2485 | an invalid set of vector lengths via KVM_SET_ONE_REG will fail with | |
2486 | EINVAL. | |
2487 | ||
2488 | After the vcpu's SVE configuration is finalized, further attempts to | |
2489 | write this register will fail with EPERM. | |
2490 | ||
c2d2c21b JH |
2491 | |
2492 | MIPS registers are mapped using the lower 32 bits. The upper 16 of that is | |
2493 | the register group type: | |
2494 | ||
106ee47d MCC |
2495 | MIPS core registers (see above) have the following id bit patterns:: |
2496 | ||
c2d2c21b JH |
2497 | 0x7030 0000 0000 <reg:16> |
2498 | ||
2499 | MIPS CP0 registers (see KVM_REG_MIPS_CP0_* above) have the following id bit | |
106ee47d MCC |
2500 | patterns depending on whether they're 32-bit or 64-bit registers:: |
2501 | ||
c2d2c21b JH |
2502 | 0x7020 0000 0001 00 <reg:5> <sel:3> (32-bit) |
2503 | 0x7030 0000 0001 00 <reg:5> <sel:3> (64-bit) | |
2504 | ||
013044cc JH |
2505 | Note: KVM_REG_MIPS_CP0_ENTRYLO0 and KVM_REG_MIPS_CP0_ENTRYLO1 are the MIPS64 |
2506 | versions of the EntryLo registers regardless of the word size of the host | |
2507 | hardware, host kernel, guest, and whether XPA is present in the guest, i.e. | |
2508 | with the RI and XI bits (if they exist) in bits 63 and 62 respectively, and | |
2509 | the PFNX field starting at bit 30. | |
2510 | ||
d42a008f | 2511 | MIPS MAARs (see KVM_REG_MIPS_CP0_MAAR(*) above) have the following id bit |
106ee47d MCC |
2512 | patterns:: |
2513 | ||
d42a008f JH |
2514 | 0x7030 0000 0001 01 <reg:8> |
2515 | ||
106ee47d MCC |
2516 | MIPS KVM control registers (see above) have the following id bit patterns:: |
2517 | ||
c2d2c21b JH |
2518 | 0x7030 0000 0002 <reg:16> |
2519 | ||
379245cd JH |
2520 | MIPS FPU registers (see KVM_REG_MIPS_FPR_{32,64}() above) have the following |
2521 | id bit patterns depending on the size of the register being accessed. They are | |
2522 | always accessed according to the current guest FPU mode (Status.FR and | |
2523 | Config5.FRE), i.e. as the guest would see them, and they become unpredictable | |
ab86bd60 JH |
2524 | if the guest FPU mode is changed. MIPS SIMD Architecture (MSA) vector |
2525 | registers (see KVM_REG_MIPS_VEC_128() above) have similar patterns as they | |
106ee47d MCC |
2526 | overlap the FPU registers:: |
2527 | ||
379245cd JH |
2528 | 0x7020 0000 0003 00 <0:3> <reg:5> (32-bit FPU registers) |
2529 | 0x7030 0000 0003 00 <0:3> <reg:5> (64-bit FPU registers) | |
ab86bd60 | 2530 | 0x7040 0000 0003 00 <0:3> <reg:5> (128-bit MSA vector registers) |
379245cd JH |
2531 | |
2532 | MIPS FPU control registers (see KVM_REG_MIPS_FCR_{IR,CSR} above) have the | |
106ee47d MCC |
2533 | following id bit patterns:: |
2534 | ||
379245cd JH |
2535 | 0x7020 0000 0003 01 <0:3> <reg:5> |
2536 | ||
ab86bd60 | 2537 | MIPS MSA control registers (see KVM_REG_MIPS_MSA_{IR,CSR} above) have the |
106ee47d MCC |
2538 | following id bit patterns:: |
2539 | ||
ab86bd60 JH |
2540 | 0x7020 0000 0003 02 <0:3> <reg:5> |
2541 | ||
c2d2c21b | 2542 | |
e24ed81f | 2543 | 4.69 KVM_GET_ONE_REG |
106ee47d MCC |
2544 | -------------------- |
2545 | ||
2546 | :Capability: KVM_CAP_ONE_REG | |
2547 | :Architectures: all | |
2548 | :Type: vcpu ioctl | |
2549 | :Parameters: struct kvm_one_reg (in and out) | |
2550 | :Returns: 0 on success, negative value on failure | |
e24ed81f | 2551 | |
fe365b4e | 2552 | Errors include: |
106ee47d MCC |
2553 | |
2554 | ======== ============================================================ | |
2555 | ENOENT no such register | |
68cf7b1f JF |
2556 | EINVAL invalid register ID, or no such register or used with VMs in |
2557 | protected virtualization mode on s390 | |
106ee47d MCC |
2558 | EPERM (arm64) register access not allowed before vcpu finalization |
2559 | ======== ============================================================ | |
2560 | ||
fe365b4e DM |
2561 | (These error codes are indicative only: do not rely on a specific error |
2562 | code being returned in a specific situation.) | |
e24ed81f AG |
2563 | |
2564 | This ioctl allows to receive the value of a single register implemented | |
2565 | in a vcpu. The register to read is indicated by the "id" field of the | |
2566 | kvm_one_reg struct passed in. On success, the register value can be found | |
2567 | at the memory location pointed to by "addr". | |
2568 | ||
2569 | The list of registers accessible using this interface is identical to the | |
2e232702 | 2570 | list in 4.68. |
e24ed81f | 2571 | |
414fa985 | 2572 | |
1c0b28c2 | 2573 | 4.70 KVM_KVMCLOCK_CTRL |
106ee47d | 2574 | ---------------------- |
1c0b28c2 | 2575 | |
106ee47d MCC |
2576 | :Capability: KVM_CAP_KVMCLOCK_CTRL |
2577 | :Architectures: Any that implement pvclocks (currently x86 only) | |
2578 | :Type: vcpu ioctl | |
2579 | :Parameters: None | |
2580 | :Returns: 0 on success, -1 on error | |
1c0b28c2 | 2581 | |
35c59990 JA |
2582 | This ioctl sets a flag accessible to the guest indicating that the specified |
2583 | vCPU has been paused by the host userspace. | |
2584 | ||
2585 | The host will set a flag in the pvclock structure that is checked from the | |
2586 | soft lockup watchdog. The flag is part of the pvclock structure that is | |
2587 | shared between guest and host, specifically the second bit of the flags | |
1c0b28c2 EM |
2588 | field of the pvclock_vcpu_time_info structure. It will be set exclusively by |
2589 | the host and read/cleared exclusively by the guest. The guest operation of | |
35c59990 | 2590 | checking and clearing the flag must be an atomic operation so |
1c0b28c2 EM |
2591 | load-link/store-conditional, or equivalent must be used. There are two cases |
2592 | where the guest will clear the flag: when the soft lockup watchdog timer resets | |
2593 | itself or when a soft lockup is detected. This ioctl can be called any time | |
2594 | after pausing the vcpu, but before it is resumed. | |
2595 | ||
414fa985 | 2596 | |
07975ad3 | 2597 | 4.71 KVM_SIGNAL_MSI |
106ee47d | 2598 | ------------------- |
07975ad3 | 2599 | |
106ee47d MCC |
2600 | :Capability: KVM_CAP_SIGNAL_MSI |
2601 | :Architectures: x86 arm arm64 | |
2602 | :Type: vm ioctl | |
2603 | :Parameters: struct kvm_msi (in) | |
2604 | :Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error | |
07975ad3 JK |
2605 | |
2606 | Directly inject a MSI message. Only valid with in-kernel irqchip that handles | |
2607 | MSI messages. | |
2608 | ||
106ee47d MCC |
2609 | :: |
2610 | ||
2611 | struct kvm_msi { | |
07975ad3 JK |
2612 | __u32 address_lo; |
2613 | __u32 address_hi; | |
2614 | __u32 data; | |
2615 | __u32 flags; | |
2b8ddd93 AP |
2616 | __u32 devid; |
2617 | __u8 pad[12]; | |
106ee47d | 2618 | }; |
07975ad3 | 2619 | |
106ee47d MCC |
2620 | flags: |
2621 | KVM_MSI_VALID_DEVID: devid contains a valid value. The per-VM | |
6f49b2f3 PB |
2622 | KVM_CAP_MSI_DEVID capability advertises the requirement to provide |
2623 | the device ID. If this capability is not available, userspace | |
2624 | should never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail. | |
2b8ddd93 | 2625 | |
6f49b2f3 PB |
2626 | If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier |
2627 | for the device that wrote the MSI message. For PCI, this is usually a | |
2628 | BFD identifier in the lower 16 bits. | |
07975ad3 | 2629 | |
055b6ae9 PB |
2630 | On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS |
2631 | feature of KVM_CAP_X2APIC_API capability is enabled. If it is enabled, | |
2632 | address_hi bits 31-8 provide bits 31-8 of the destination id. Bits 7-0 of | |
2633 | address_hi must be zero. | |
37131313 | 2634 | |
414fa985 | 2635 | |
0589ff6c | 2636 | 4.71 KVM_CREATE_PIT2 |
106ee47d | 2637 | -------------------- |
0589ff6c | 2638 | |
106ee47d MCC |
2639 | :Capability: KVM_CAP_PIT2 |
2640 | :Architectures: x86 | |
2641 | :Type: vm ioctl | |
2642 | :Parameters: struct kvm_pit_config (in) | |
2643 | :Returns: 0 on success, -1 on error | |
0589ff6c JK |
2644 | |
2645 | Creates an in-kernel device model for the i8254 PIT. This call is only valid | |
2646 | after enabling in-kernel irqchip support via KVM_CREATE_IRQCHIP. The following | |
106ee47d | 2647 | parameters have to be passed:: |
0589ff6c | 2648 | |
106ee47d | 2649 | struct kvm_pit_config { |
0589ff6c JK |
2650 | __u32 flags; |
2651 | __u32 pad[15]; | |
106ee47d | 2652 | }; |
0589ff6c | 2653 | |
106ee47d | 2654 | Valid flags are:: |
0589ff6c | 2655 | |
106ee47d | 2656 | #define KVM_PIT_SPEAKER_DUMMY 1 /* emulate speaker port stub */ |
0589ff6c | 2657 | |
b6ddf05f | 2658 | PIT timer interrupts may use a per-VM kernel thread for injection. If it |
106ee47d | 2659 | exists, this thread will have a name of the following pattern:: |
b6ddf05f | 2660 | |
106ee47d | 2661 | kvm-pit/<owner-process-pid> |
b6ddf05f JK |
2662 | |
2663 | When running a guest with elevated priorities, the scheduling parameters of | |
2664 | this thread may have to be adjusted accordingly. | |
2665 | ||
0589ff6c JK |
2666 | This IOCTL replaces the obsolete KVM_CREATE_PIT. |
2667 | ||
2668 | ||
2669 | 4.72 KVM_GET_PIT2 | |
106ee47d | 2670 | ----------------- |
0589ff6c | 2671 | |
106ee47d MCC |
2672 | :Capability: KVM_CAP_PIT_STATE2 |
2673 | :Architectures: x86 | |
2674 | :Type: vm ioctl | |
2675 | :Parameters: struct kvm_pit_state2 (out) | |
2676 | :Returns: 0 on success, -1 on error | |
0589ff6c JK |
2677 | |
2678 | Retrieves the state of the in-kernel PIT model. Only valid after | |
106ee47d | 2679 | KVM_CREATE_PIT2. The state is returned in the following structure:: |
0589ff6c | 2680 | |
106ee47d | 2681 | struct kvm_pit_state2 { |
0589ff6c JK |
2682 | struct kvm_pit_channel_state channels[3]; |
2683 | __u32 flags; | |
2684 | __u32 reserved[9]; | |
106ee47d | 2685 | }; |
0589ff6c | 2686 | |
106ee47d | 2687 | Valid flags are:: |
0589ff6c | 2688 | |
106ee47d MCC |
2689 | /* disable PIT in HPET legacy mode */ |
2690 | #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 | |
0589ff6c JK |
2691 | |
2692 | This IOCTL replaces the obsolete KVM_GET_PIT. | |
2693 | ||
2694 | ||
2695 | 4.73 KVM_SET_PIT2 | |
106ee47d | 2696 | ----------------- |
0589ff6c | 2697 | |
106ee47d MCC |
2698 | :Capability: KVM_CAP_PIT_STATE2 |
2699 | :Architectures: x86 | |
2700 | :Type: vm ioctl | |
2701 | :Parameters: struct kvm_pit_state2 (in) | |
2702 | :Returns: 0 on success, -1 on error | |
0589ff6c JK |
2703 | |
2704 | Sets the state of the in-kernel PIT model. Only valid after KVM_CREATE_PIT2. | |
2705 | See KVM_GET_PIT2 for details on struct kvm_pit_state2. | |
2706 | ||
2707 | This IOCTL replaces the obsolete KVM_SET_PIT. | |
2708 | ||
2709 | ||
5b74716e | 2710 | 4.74 KVM_PPC_GET_SMMU_INFO |
106ee47d | 2711 | -------------------------- |
5b74716e | 2712 | |
106ee47d MCC |
2713 | :Capability: KVM_CAP_PPC_GET_SMMU_INFO |
2714 | :Architectures: powerpc | |
2715 | :Type: vm ioctl | |
2716 | :Parameters: None | |
2717 | :Returns: 0 on success, -1 on error | |
5b74716e BH |
2718 | |
2719 | This populates and returns a structure describing the features of | |
2720 | the "Server" class MMU emulation supported by KVM. | |
cc22c354 | 2721 | This can in turn be used by userspace to generate the appropriate |
5b74716e BH |
2722 | device-tree properties for the guest operating system. |
2723 | ||
c98be0c9 | 2724 | The structure contains some global information, followed by an |
106ee47d | 2725 | array of supported segment page sizes:: |
5b74716e BH |
2726 | |
2727 | struct kvm_ppc_smmu_info { | |
2728 | __u64 flags; | |
2729 | __u32 slb_size; | |
2730 | __u32 pad; | |
2731 | struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ]; | |
2732 | }; | |
2733 | ||
2734 | The supported flags are: | |
2735 | ||
2736 | - KVM_PPC_PAGE_SIZES_REAL: | |
2737 | When that flag is set, guest page sizes must "fit" the backing | |
2738 | store page sizes. When not set, any page size in the list can | |
2739 | be used regardless of how they are backed by userspace. | |
2740 | ||
2741 | - KVM_PPC_1T_SEGMENTS | |
2742 | The emulated MMU supports 1T segments in addition to the | |
2743 | standard 256M ones. | |
2744 | ||
901f8c3f PM |
2745 | - KVM_PPC_NO_HASH |
2746 | This flag indicates that HPT guests are not supported by KVM, | |
2747 | thus all guests must use radix MMU mode. | |
2748 | ||
5b74716e BH |
2749 | The "slb_size" field indicates how many SLB entries are supported |
2750 | ||
2751 | The "sps" array contains 8 entries indicating the supported base | |
2752 | page sizes for a segment in increasing order. Each entry is defined | |
106ee47d | 2753 | as follow:: |
5b74716e BH |
2754 | |
2755 | struct kvm_ppc_one_seg_page_size { | |
2756 | __u32 page_shift; /* Base page shift of segment (or 0) */ | |
2757 | __u32 slb_enc; /* SLB encoding for BookS */ | |
2758 | struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ]; | |
2759 | }; | |
2760 | ||
2761 | An entry with a "page_shift" of 0 is unused. Because the array is | |
2762 | organized in increasing order, a lookup can stop when encoutering | |
2763 | such an entry. | |
2764 | ||
2765 | The "slb_enc" field provides the encoding to use in the SLB for the | |
2766 | page size. The bits are in positions such as the value can directly | |
2767 | be OR'ed into the "vsid" argument of the slbmte instruction. | |
2768 | ||
2769 | The "enc" array is a list which for each of those segment base page | |
2770 | size provides the list of supported actual page sizes (which can be | |
2771 | only larger or equal to the base page size), along with the | |
f884ab15 | 2772 | corresponding encoding in the hash PTE. Similarly, the array is |
5b74716e | 2773 | 8 entries sorted by increasing sizes and an entry with a "0" shift |
106ee47d | 2774 | is an empty entry and a terminator:: |
5b74716e BH |
2775 | |
2776 | struct kvm_ppc_one_page_size { | |
2777 | __u32 page_shift; /* Page shift (or 0) */ | |
2778 | __u32 pte_enc; /* Encoding in the HPTE (>>12) */ | |
2779 | }; | |
2780 | ||
2781 | The "pte_enc" field provides a value that can OR'ed into the hash | |
2782 | PTE's RPN field (ie, it needs to be shifted left by 12 to OR it | |
2783 | into the hash PTE second double word). | |
2784 | ||
f36992e3 | 2785 | 4.75 KVM_IRQFD |
106ee47d | 2786 | -------------- |
f36992e3 | 2787 | |
106ee47d MCC |
2788 | :Capability: KVM_CAP_IRQFD |
2789 | :Architectures: x86 s390 arm arm64 | |
2790 | :Type: vm ioctl | |
2791 | :Parameters: struct kvm_irqfd (in) | |
2792 | :Returns: 0 on success, -1 on error | |
f36992e3 AW |
2793 | |
2794 | Allows setting an eventfd to directly trigger a guest interrupt. | |
2795 | kvm_irqfd.fd specifies the file descriptor to use as the eventfd and | |
2796 | kvm_irqfd.gsi specifies the irqchip pin toggled by this event. When | |
17180032 | 2797 | an event is triggered on the eventfd, an interrupt is injected into |
f36992e3 AW |
2798 | the guest using the specified gsi pin. The irqfd is removed using |
2799 | the KVM_IRQFD_FLAG_DEASSIGN flag, specifying both kvm_irqfd.fd | |
2800 | and kvm_irqfd.gsi. | |
2801 | ||
7a84428a AW |
2802 | With KVM_CAP_IRQFD_RESAMPLE, KVM_IRQFD supports a de-assert and notify |
2803 | mechanism allowing emulation of level-triggered, irqfd-based | |
2804 | interrupts. When KVM_IRQFD_FLAG_RESAMPLE is set the user must pass an | |
2805 | additional eventfd in the kvm_irqfd.resamplefd field. When operating | |
2806 | in resample mode, posting of an interrupt through kvm_irq.fd asserts | |
2807 | the specified gsi in the irqchip. When the irqchip is resampled, such | |
17180032 | 2808 | as from an EOI, the gsi is de-asserted and the user is notified via |
7a84428a AW |
2809 | kvm_irqfd.resamplefd. It is the user's responsibility to re-queue |
2810 | the interrupt if the device making use of it still requires service. | |
2811 | Note that closing the resamplefd is not sufficient to disable the | |
2812 | irqfd. The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment | |
2813 | and need not be specified with KVM_IRQFD_FLAG_DEASSIGN. | |
2814 | ||
180ae7b1 | 2815 | On arm/arm64, gsi routing being supported, the following can happen: |
106ee47d | 2816 | |
180ae7b1 EA |
2817 | - in case no routing entry is associated to this gsi, injection fails |
2818 | - in case the gsi is associated to an irqchip routing entry, | |
2819 | irqchip.pin + 32 corresponds to the injected SPI ID. | |
995a0ee9 EA |
2820 | - in case the gsi is associated to an MSI routing entry, the MSI |
2821 | message and device ID are translated into an LPI (support restricted | |
2822 | to GICv3 ITS in-kernel emulation). | |
174178fe | 2823 | |
5fecc9d8 | 2824 | 4.76 KVM_PPC_ALLOCATE_HTAB |
106ee47d | 2825 | -------------------------- |
32fad281 | 2826 | |
106ee47d MCC |
2827 | :Capability: KVM_CAP_PPC_ALLOC_HTAB |
2828 | :Architectures: powerpc | |
2829 | :Type: vm ioctl | |
2830 | :Parameters: Pointer to u32 containing hash table order (in/out) | |
2831 | :Returns: 0 on success, -1 on error | |
32fad281 PM |
2832 | |
2833 | This requests the host kernel to allocate an MMU hash table for a | |
2834 | guest using the PAPR paravirtualization interface. This only does | |
2835 | anything if the kernel is configured to use the Book 3S HV style of | |
2836 | virtualization. Otherwise the capability doesn't exist and the ioctl | |
2837 | returns an ENOTTY error. The rest of this description assumes Book 3S | |
2838 | HV. | |
2839 | ||
2840 | There must be no vcpus running when this ioctl is called; if there | |
2841 | are, it will do nothing and return an EBUSY error. | |
2842 | ||
2843 | The parameter is a pointer to a 32-bit unsigned integer variable | |
2844 | containing the order (log base 2) of the desired size of the hash | |
2845 | table, which must be between 18 and 46. On successful return from the | |
f98a8bf9 | 2846 | ioctl, the value will not be changed by the kernel. |
32fad281 PM |
2847 | |
2848 | If no hash table has been allocated when any vcpu is asked to run | |
2849 | (with the KVM_RUN ioctl), the host kernel will allocate a | |
2850 | default-sized hash table (16 MB). | |
2851 | ||
2852 | If this ioctl is called when a hash table has already been allocated, | |
f98a8bf9 DG |
2853 | with a different order from the existing hash table, the existing hash |
2854 | table will be freed and a new one allocated. If this is ioctl is | |
2855 | called when a hash table has already been allocated of the same order | |
2856 | as specified, the kernel will clear out the existing hash table (zero | |
2857 | all HPTEs). In either case, if the guest is using the virtualized | |
2858 | real-mode area (VRMA) facility, the kernel will re-create the VMRA | |
2859 | HPTEs on the next KVM_RUN of any vcpu. | |
32fad281 | 2860 | |
416ad65f | 2861 | 4.77 KVM_S390_INTERRUPT |
106ee47d | 2862 | ----------------------- |
416ad65f | 2863 | |
106ee47d MCC |
2864 | :Capability: basic |
2865 | :Architectures: s390 | |
2866 | :Type: vm ioctl, vcpu ioctl | |
2867 | :Parameters: struct kvm_s390_interrupt (in) | |
2868 | :Returns: 0 on success, -1 on error | |
416ad65f CH |
2869 | |
2870 | Allows to inject an interrupt to the guest. Interrupts can be floating | |
2871 | (vm ioctl) or per cpu (vcpu ioctl), depending on the interrupt type. | |
2872 | ||
106ee47d | 2873 | Interrupt parameters are passed via kvm_s390_interrupt:: |
416ad65f | 2874 | |
106ee47d | 2875 | struct kvm_s390_interrupt { |
416ad65f CH |
2876 | __u32 type; |
2877 | __u32 parm; | |
2878 | __u64 parm64; | |
106ee47d | 2879 | }; |
416ad65f CH |
2880 | |
2881 | type can be one of the following: | |
2882 | ||
106ee47d MCC |
2883 | KVM_S390_SIGP_STOP (vcpu) |
2884 | - sigp stop; optional flags in parm | |
2885 | KVM_S390_PROGRAM_INT (vcpu) | |
2886 | - program check; code in parm | |
2887 | KVM_S390_SIGP_SET_PREFIX (vcpu) | |
2888 | - sigp set prefix; prefix address in parm | |
2889 | KVM_S390_RESTART (vcpu) | |
2890 | - restart | |
2891 | KVM_S390_INT_CLOCK_COMP (vcpu) | |
2892 | - clock comparator interrupt | |
2893 | KVM_S390_INT_CPU_TIMER (vcpu) | |
2894 | - CPU timer interrupt | |
2895 | KVM_S390_INT_VIRTIO (vm) | |
2896 | - virtio external interrupt; external interrupt | |
2897 | parameters in parm and parm64 | |
2898 | KVM_S390_INT_SERVICE (vm) | |
2899 | - sclp external interrupt; sclp parameter in parm | |
2900 | KVM_S390_INT_EMERGENCY (vcpu) | |
2901 | - sigp emergency; source cpu in parm | |
2902 | KVM_S390_INT_EXTERNAL_CALL (vcpu) | |
2903 | - sigp external call; source cpu in parm | |
2904 | KVM_S390_INT_IO(ai,cssid,ssid,schid) (vm) | |
2905 | - compound value to indicate an | |
2906 | I/O interrupt (ai - adapter interrupt; cssid,ssid,schid - subchannel); | |
2907 | I/O interruption parameters in parm (subchannel) and parm64 (intparm, | |
2908 | interruption subclass) | |
2909 | KVM_S390_MCHK (vm, vcpu) | |
2910 | - machine check interrupt; cr 14 bits in parm, machine check interrupt | |
2911 | code in parm64 (note that machine checks needing further payload are not | |
2912 | supported by this ioctl) | |
416ad65f | 2913 | |
5e124900 | 2914 | This is an asynchronous vcpu ioctl and can be invoked from any thread. |
416ad65f | 2915 | |
a2932923 | 2916 | 4.78 KVM_PPC_GET_HTAB_FD |
106ee47d | 2917 | ------------------------ |
a2932923 | 2918 | |
106ee47d MCC |
2919 | :Capability: KVM_CAP_PPC_HTAB_FD |
2920 | :Architectures: powerpc | |
2921 | :Type: vm ioctl | |
2922 | :Parameters: Pointer to struct kvm_get_htab_fd (in) | |
2923 | :Returns: file descriptor number (>= 0) on success, -1 on error | |
a2932923 PM |
2924 | |
2925 | This returns a file descriptor that can be used either to read out the | |
2926 | entries in the guest's hashed page table (HPT), or to write entries to | |
2927 | initialize the HPT. The returned fd can only be written to if the | |
2928 | KVM_GET_HTAB_WRITE bit is set in the flags field of the argument, and | |
2929 | can only be read if that bit is clear. The argument struct looks like | |
106ee47d | 2930 | this:: |
a2932923 | 2931 | |
106ee47d MCC |
2932 | /* For KVM_PPC_GET_HTAB_FD */ |
2933 | struct kvm_get_htab_fd { | |
a2932923 PM |
2934 | __u64 flags; |
2935 | __u64 start_index; | |
2936 | __u64 reserved[2]; | |
106ee47d | 2937 | }; |
a2932923 | 2938 | |
106ee47d MCC |
2939 | /* Values for kvm_get_htab_fd.flags */ |
2940 | #define KVM_GET_HTAB_BOLTED_ONLY ((__u64)0x1) | |
2941 | #define KVM_GET_HTAB_WRITE ((__u64)0x2) | |
a2932923 | 2942 | |
106ee47d | 2943 | The 'start_index' field gives the index in the HPT of the entry at |
a2932923 PM |
2944 | which to start reading. It is ignored when writing. |
2945 | ||
2946 | Reads on the fd will initially supply information about all | |
2947 | "interesting" HPT entries. Interesting entries are those with the | |
2948 | bolted bit set, if the KVM_GET_HTAB_BOLTED_ONLY bit is set, otherwise | |
2949 | all entries. When the end of the HPT is reached, the read() will | |
2950 | return. If read() is called again on the fd, it will start again from | |
2951 | the beginning of the HPT, but will only return HPT entries that have | |
2952 | changed since they were last read. | |
2953 | ||
2954 | Data read or written is structured as a header (8 bytes) followed by a | |
2955 | series of valid HPT entries (16 bytes) each. The header indicates how | |
2956 | many valid HPT entries there are and how many invalid entries follow | |
2957 | the valid entries. The invalid entries are not represented explicitly | |
106ee47d | 2958 | in the stream. The header format is:: |
a2932923 | 2959 | |
106ee47d | 2960 | struct kvm_get_htab_header { |
a2932923 PM |
2961 | __u32 index; |
2962 | __u16 n_valid; | |
2963 | __u16 n_invalid; | |
106ee47d | 2964 | }; |
a2932923 PM |
2965 | |
2966 | Writes to the fd create HPT entries starting at the index given in the | |
106ee47d MCC |
2967 | header; first 'n_valid' valid entries with contents from the data |
2968 | written, then 'n_invalid' invalid entries, invalidating any previously | |
a2932923 PM |
2969 | valid entries found. |
2970 | ||
852b6d57 | 2971 | 4.79 KVM_CREATE_DEVICE |
106ee47d MCC |
2972 | ---------------------- |
2973 | ||
2974 | :Capability: KVM_CAP_DEVICE_CTRL | |
2975 | :Type: vm ioctl | |
2976 | :Parameters: struct kvm_create_device (in/out) | |
2977 | :Returns: 0 on success, -1 on error | |
852b6d57 | 2978 | |
852b6d57 | 2979 | Errors: |
106ee47d MCC |
2980 | |
2981 | ====== ======================================================= | |
2982 | ENODEV The device type is unknown or unsupported | |
2983 | EEXIST Device already created, and this type of device may not | |
852b6d57 | 2984 | be instantiated multiple times |
106ee47d | 2985 | ====== ======================================================= |
852b6d57 SW |
2986 | |
2987 | Other error conditions may be defined by individual device types or | |
2988 | have their standard meanings. | |
2989 | ||
2990 | Creates an emulated device in the kernel. The file descriptor returned | |
2991 | in fd can be used with KVM_SET/GET/HAS_DEVICE_ATTR. | |
2992 | ||
2993 | If the KVM_CREATE_DEVICE_TEST flag is set, only test whether the | |
2994 | device type is supported (not necessarily whether it can be created | |
2995 | in the current vm). | |
2996 | ||
2997 | Individual devices should not define flags. Attributes should be used | |
2998 | for specifying any behavior that is not implied by the device type | |
2999 | number. | |
3000 | ||
106ee47d MCC |
3001 | :: |
3002 | ||
3003 | struct kvm_create_device { | |
852b6d57 SW |
3004 | __u32 type; /* in: KVM_DEV_TYPE_xxx */ |
3005 | __u32 fd; /* out: device handle */ | |
3006 | __u32 flags; /* in: KVM_CREATE_DEVICE_xxx */ | |
106ee47d | 3007 | }; |
852b6d57 SW |
3008 | |
3009 | 4.80 KVM_SET_DEVICE_ATTR/KVM_GET_DEVICE_ATTR | |
106ee47d MCC |
3010 | -------------------------------------------- |
3011 | ||
3012 | :Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device, | |
3013 | KVM_CAP_VCPU_ATTRIBUTES for vcpu device | |
3014 | :Type: device ioctl, vm ioctl, vcpu ioctl | |
3015 | :Parameters: struct kvm_device_attr | |
3016 | :Returns: 0 on success, -1 on error | |
852b6d57 | 3017 | |
852b6d57 | 3018 | Errors: |
106ee47d MCC |
3019 | |
3020 | ===== ============================================================= | |
3021 | ENXIO The group or attribute is unknown/unsupported for this device | |
f9cbd9b0 | 3022 | or hardware support is missing. |
106ee47d | 3023 | EPERM The attribute cannot (currently) be accessed this way |
852b6d57 SW |
3024 | (e.g. read-only attribute, or attribute that only makes |
3025 | sense when the device is in a different state) | |
106ee47d | 3026 | ===== ============================================================= |
852b6d57 SW |
3027 | |
3028 | Other error conditions may be defined by individual device types. | |
3029 | ||
3030 | Gets/sets a specified piece of device configuration and/or state. The | |
3031 | semantics are device-specific. See individual device documentation in | |
3032 | the "devices" directory. As with ONE_REG, the size of the data | |
3033 | transferred is defined by the particular attribute. | |
3034 | ||
106ee47d MCC |
3035 | :: |
3036 | ||
3037 | struct kvm_device_attr { | |
852b6d57 SW |
3038 | __u32 flags; /* no flags currently defined */ |
3039 | __u32 group; /* device-defined */ | |
3040 | __u64 attr; /* group-defined */ | |
3041 | __u64 addr; /* userspace address of attr data */ | |
106ee47d | 3042 | }; |
852b6d57 SW |
3043 | |
3044 | 4.81 KVM_HAS_DEVICE_ATTR | |
106ee47d MCC |
3045 | ------------------------ |
3046 | ||
3047 | :Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device, | |
3048 | KVM_CAP_VCPU_ATTRIBUTES for vcpu device | |
3049 | :Type: device ioctl, vm ioctl, vcpu ioctl | |
3050 | :Parameters: struct kvm_device_attr | |
3051 | :Returns: 0 on success, -1 on error | |
852b6d57 | 3052 | |
852b6d57 | 3053 | Errors: |
106ee47d MCC |
3054 | |
3055 | ===== ============================================================= | |
3056 | ENXIO The group or attribute is unknown/unsupported for this device | |
f9cbd9b0 | 3057 | or hardware support is missing. |
106ee47d | 3058 | ===== ============================================================= |
852b6d57 SW |
3059 | |
3060 | Tests whether a device supports a particular attribute. A successful | |
3061 | return indicates the attribute is implemented. It does not necessarily | |
3062 | indicate that the attribute can be read or written in the device's | |
3063 | current state. "addr" is ignored. | |
f36992e3 | 3064 | |
d8968f1f | 3065 | 4.82 KVM_ARM_VCPU_INIT |
106ee47d MCC |
3066 | ---------------------- |
3067 | ||
3068 | :Capability: basic | |
3069 | :Architectures: arm, arm64 | |
3070 | :Type: vcpu ioctl | |
3071 | :Parameters: struct kvm_vcpu_init (in) | |
3072 | :Returns: 0 on success; -1 on error | |
749cf76c | 3073 | |
749cf76c | 3074 | Errors: |
106ee47d MCC |
3075 | |
3076 | ====== ================================================================= | |
3077 | EINVAL the target is unknown, or the combination of features is invalid. | |
3078 | ENOENT a features bit specified is unknown. | |
3079 | ====== ================================================================= | |
749cf76c CD |
3080 | |
3081 | This tells KVM what type of CPU to present to the guest, and what | |
3082 | optional features it should have. This will cause a reset of the cpu | |
3083 | registers to their initial values. If this is not called, KVM_RUN will | |
3084 | return ENOEXEC for that vcpu. | |
3085 | ||
3086 | Note that because some registers reflect machine topology, all vcpus | |
3087 | should be created before this ioctl is invoked. | |
3088 | ||
f7fa034d CD |
3089 | Userspace can call this function multiple times for a given vcpu, including |
3090 | after the vcpu has been run. This will reset the vcpu to its initial | |
3091 | state. All calls to this function after the initial call must use the same | |
3092 | target and same set of feature flags, otherwise EINVAL will be returned. | |
3093 | ||
aa024c2f | 3094 | Possible features: |
106ee47d | 3095 | |
aa024c2f | 3096 | - KVM_ARM_VCPU_POWER_OFF: Starts the CPU in a power-off state. |
3ad8b3de CD |
3097 | Depends on KVM_CAP_ARM_PSCI. If not set, the CPU will be powered on |
3098 | and execute guest code when KVM_RUN is called. | |
379e04c7 MZ |
3099 | - KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode. |
3100 | Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only). | |
85bd0ba1 MZ |
3101 | - KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision |
3102 | backward compatible with v0.2) for the CPU. | |
50bb0c94 | 3103 | Depends on KVM_CAP_ARM_PSCI_0_2. |
808e7381 SZ |
3104 | - KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU. |
3105 | Depends on KVM_CAP_ARM_PMU_V3. | |
aa024c2f | 3106 | |
a22fa321 ADK |
3107 | - KVM_ARM_VCPU_PTRAUTH_ADDRESS: Enables Address Pointer authentication |
3108 | for arm64 only. | |
a243c16d ADK |
3109 | Depends on KVM_CAP_ARM_PTRAUTH_ADDRESS. |
3110 | If KVM_CAP_ARM_PTRAUTH_ADDRESS and KVM_CAP_ARM_PTRAUTH_GENERIC are | |
3111 | both present, then both KVM_ARM_VCPU_PTRAUTH_ADDRESS and | |
3112 | KVM_ARM_VCPU_PTRAUTH_GENERIC must be requested or neither must be | |
3113 | requested. | |
a22fa321 ADK |
3114 | |
3115 | - KVM_ARM_VCPU_PTRAUTH_GENERIC: Enables Generic Pointer authentication | |
3116 | for arm64 only. | |
a243c16d ADK |
3117 | Depends on KVM_CAP_ARM_PTRAUTH_GENERIC. |
3118 | If KVM_CAP_ARM_PTRAUTH_ADDRESS and KVM_CAP_ARM_PTRAUTH_GENERIC are | |
3119 | both present, then both KVM_ARM_VCPU_PTRAUTH_ADDRESS and | |
3120 | KVM_ARM_VCPU_PTRAUTH_GENERIC must be requested or neither must be | |
3121 | requested. | |
a22fa321 | 3122 | |
50036ad0 DM |
3123 | - KVM_ARM_VCPU_SVE: Enables SVE for the CPU (arm64 only). |
3124 | Depends on KVM_CAP_ARM_SVE. | |
3125 | Requires KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE): | |
3126 | ||
3127 | * After KVM_ARM_VCPU_INIT: | |
3128 | ||
3129 | - KVM_REG_ARM64_SVE_VLS may be read using KVM_GET_ONE_REG: the | |
3130 | initial value of this pseudo-register indicates the best set of | |
3131 | vector lengths possible for a vcpu on this host. | |
3132 | ||
3133 | * Before KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE): | |
3134 | ||
3135 | - KVM_RUN and KVM_GET_REG_LIST are not available; | |
3136 | ||
3137 | - KVM_GET_ONE_REG and KVM_SET_ONE_REG cannot be used to access | |
3138 | the scalable archietctural SVE registers | |
3139 | KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() or | |
3140 | KVM_REG_ARM64_SVE_FFR; | |
3141 | ||
3142 | - KVM_REG_ARM64_SVE_VLS may optionally be written using | |
3143 | KVM_SET_ONE_REG, to modify the set of vector lengths available | |
3144 | for the vcpu. | |
3145 | ||
3146 | * After KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE): | |
3147 | ||
3148 | - the KVM_REG_ARM64_SVE_VLS pseudo-register is immutable, and can | |
3149 | no longer be written using KVM_SET_ONE_REG. | |
749cf76c | 3150 | |
740edfc0 | 3151 | 4.83 KVM_ARM_PREFERRED_TARGET |
106ee47d MCC |
3152 | ----------------------------- |
3153 | ||
3154 | :Capability: basic | |
3155 | :Architectures: arm, arm64 | |
3156 | :Type: vm ioctl | |
a84b757e | 3157 | :Parameters: struct kvm_vcpu_init (out) |
106ee47d | 3158 | :Returns: 0 on success; -1 on error |
740edfc0 | 3159 | |
740edfc0 | 3160 | Errors: |
106ee47d MCC |
3161 | |
3162 | ====== ========================================== | |
3163 | ENODEV no preferred target available for the host | |
3164 | ====== ========================================== | |
740edfc0 AP |
3165 | |
3166 | This queries KVM for preferred CPU target type which can be emulated | |
3167 | by KVM on underlying host. | |
3168 | ||
3169 | The ioctl returns struct kvm_vcpu_init instance containing information | |
3170 | about preferred CPU target type and recommended features for it. The | |
3171 | kvm_vcpu_init->features bitmap returned will have feature bits set if | |
3172 | the preferred target recommends setting these features, but this is | |
3173 | not mandatory. | |
3174 | ||
3175 | The information returned by this ioctl can be used to prepare an instance | |
3176 | of struct kvm_vcpu_init for KVM_ARM_VCPU_INIT ioctl which will result in | |
3747c5d3 | 3177 | VCPU matching underlying host. |
740edfc0 AP |
3178 | |
3179 | ||
3180 | 4.84 KVM_GET_REG_LIST | |
106ee47d MCC |
3181 | --------------------- |
3182 | ||
3183 | :Capability: basic | |
3184 | :Architectures: arm, arm64, mips | |
3185 | :Type: vcpu ioctl | |
3186 | :Parameters: struct kvm_reg_list (in/out) | |
3187 | :Returns: 0 on success; -1 on error | |
749cf76c | 3188 | |
749cf76c | 3189 | Errors: |
106ee47d MCC |
3190 | |
3191 | ===== ============================================================== | |
3192 | E2BIG the reg index list is too big to fit in the array specified by | |
749cf76c | 3193 | the user (the number required will be written into n). |
106ee47d MCC |
3194 | ===== ============================================================== |
3195 | ||
3196 | :: | |
749cf76c | 3197 | |
106ee47d | 3198 | struct kvm_reg_list { |
749cf76c CD |
3199 | __u64 n; /* number of registers in reg[] */ |
3200 | __u64 reg[0]; | |
106ee47d | 3201 | }; |
749cf76c CD |
3202 | |
3203 | This ioctl returns the guest registers that are supported for the | |
3204 | KVM_GET_ONE_REG/KVM_SET_ONE_REG calls. | |
3205 | ||
ce01e4e8 CD |
3206 | |
3207 | 4.85 KVM_ARM_SET_DEVICE_ADDR (deprecated) | |
106ee47d MCC |
3208 | ----------------------------------------- |
3209 | ||
3210 | :Capability: KVM_CAP_ARM_SET_DEVICE_ADDR | |
3211 | :Architectures: arm, arm64 | |
3212 | :Type: vm ioctl | |
3213 | :Parameters: struct kvm_arm_device_address (in) | |
3214 | :Returns: 0 on success, -1 on error | |
3401d546 | 3215 | |
3401d546 | 3216 | Errors: |
3401d546 | 3217 | |
106ee47d MCC |
3218 | ====== ============================================ |
3219 | ENODEV The device id is unknown | |
3220 | ENXIO Device not supported on current system | |
3221 | EEXIST Address already set | |
3222 | E2BIG Address outside guest physical address space | |
3223 | EBUSY Address overlaps with other device range | |
3224 | ====== ============================================ | |
3225 | ||
3226 | :: | |
3227 | ||
3228 | struct kvm_arm_device_addr { | |
3401d546 CD |
3229 | __u64 id; |
3230 | __u64 addr; | |
106ee47d | 3231 | }; |
3401d546 CD |
3232 | |
3233 | Specify a device address in the guest's physical address space where guests | |
3234 | can access emulated or directly exposed devices, which the host kernel needs | |
3235 | to know about. The id field is an architecture specific identifier for a | |
3236 | specific device. | |
3237 | ||
379e04c7 | 3238 | ARM/arm64 divides the id field into two parts, a device id and an |
106ee47d | 3239 | address type id specific to the individual device:: |
3401d546 CD |
3240 | |
3241 | bits: | 63 ... 32 | 31 ... 16 | 15 ... 0 | | |
3242 | field: | 0x00000000 | device id | addr type id | | |
3243 | ||
379e04c7 MZ |
3244 | ARM/arm64 currently only require this when using the in-kernel GIC |
3245 | support for the hardware VGIC features, using KVM_ARM_DEVICE_VGIC_V2 | |
3246 | as the device id. When setting the base address for the guest's | |
3247 | mapping of the VGIC virtual CPU and distributor interface, the ioctl | |
3248 | must be called after calling KVM_CREATE_IRQCHIP, but before calling | |
3249 | KVM_RUN on any of the VCPUs. Calling this ioctl twice for any of the | |
3250 | base addresses will return -EEXIST. | |
3401d546 | 3251 | |
ce01e4e8 CD |
3252 | Note, this IOCTL is deprecated and the more flexible SET/GET_DEVICE_ATTR API |
3253 | should be used instead. | |
3254 | ||
3255 | ||
740edfc0 | 3256 | 4.86 KVM_PPC_RTAS_DEFINE_TOKEN |
106ee47d | 3257 | ------------------------------ |
8e591cb7 | 3258 | |
106ee47d MCC |
3259 | :Capability: KVM_CAP_PPC_RTAS |
3260 | :Architectures: ppc | |
3261 | :Type: vm ioctl | |
3262 | :Parameters: struct kvm_rtas_token_args | |
3263 | :Returns: 0 on success, -1 on error | |
8e591cb7 ME |
3264 | |
3265 | Defines a token value for a RTAS (Run Time Abstraction Services) | |
3266 | service in order to allow it to be handled in the kernel. The | |
3267 | argument struct gives the name of the service, which must be the name | |
3268 | of a service that has a kernel-side implementation. If the token | |
3269 | value is non-zero, it will be associated with that service, and | |
3270 | subsequent RTAS calls by the guest specifying that token will be | |
3271 | handled by the kernel. If the token value is 0, then any token | |
3272 | associated with the service will be forgotten, and subsequent RTAS | |
3273 | calls by the guest for that service will be passed to userspace to be | |
3274 | handled. | |
3275 | ||
4bd9d344 | 3276 | 4.87 KVM_SET_GUEST_DEBUG |
106ee47d | 3277 | ------------------------ |
4bd9d344 | 3278 | |
106ee47d MCC |
3279 | :Capability: KVM_CAP_SET_GUEST_DEBUG |
3280 | :Architectures: x86, s390, ppc, arm64 | |
3281 | :Type: vcpu ioctl | |
3282 | :Parameters: struct kvm_guest_debug (in) | |
3283 | :Returns: 0 on success; -1 on error | |
3284 | ||
3285 | :: | |
4bd9d344 | 3286 | |
106ee47d | 3287 | struct kvm_guest_debug { |
4bd9d344 AB |
3288 | __u32 control; |
3289 | __u32 pad; | |
3290 | struct kvm_guest_debug_arch arch; | |
106ee47d | 3291 | }; |
4bd9d344 AB |
3292 | |
3293 | Set up the processor specific debug registers and configure vcpu for | |
3294 | handling guest debug events. There are two parts to the structure, the | |
3295 | first a control bitfield indicates the type of debug events to handle | |
3296 | when running. Common control bits are: | |
3297 | ||
3298 | - KVM_GUESTDBG_ENABLE: guest debugging is enabled | |
3299 | - KVM_GUESTDBG_SINGLESTEP: the next run should single-step | |
3300 | ||
3301 | The top 16 bits of the control field are architecture specific control | |
3302 | flags which can include the following: | |
3303 | ||
4bd611ca | 3304 | - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86, arm64] |
834bf887 | 3305 | - KVM_GUESTDBG_USE_HW_BP: using hardware breakpoints [x86, s390, arm64] |
4bd9d344 AB |
3306 | - KVM_GUESTDBG_INJECT_DB: inject DB type exception [x86] |
3307 | - KVM_GUESTDBG_INJECT_BP: inject BP type exception [x86] | |
3308 | - KVM_GUESTDBG_EXIT_PENDING: trigger an immediate guest exit [s390] | |
3309 | ||
3310 | For example KVM_GUESTDBG_USE_SW_BP indicates that software breakpoints | |
3311 | are enabled in memory so we need to ensure breakpoint exceptions are | |
3312 | correctly trapped and the KVM run loop exits at the breakpoint and not | |
3313 | running off into the normal guest vector. For KVM_GUESTDBG_USE_HW_BP | |
3314 | we need to ensure the guest vCPUs architecture specific registers are | |
3315 | updated to the correct (supplied) values. | |
3316 | ||
3317 | The second part of the structure is architecture specific and | |
3318 | typically contains a set of debug registers. | |
3319 | ||
834bf887 AB |
3320 | For arm64 the number of debug registers is implementation defined and |
3321 | can be determined by querying the KVM_CAP_GUEST_DEBUG_HW_BPS and | |
3322 | KVM_CAP_GUEST_DEBUG_HW_WPS capabilities which return a positive number | |
3323 | indicating the number of supported registers. | |
3324 | ||
1a9167a2 FR |
3325 | For ppc, the KVM_CAP_PPC_GUEST_DEBUG_SSTEP capability indicates whether |
3326 | the single-step debug event (KVM_GUESTDBG_SINGLESTEP) is supported. | |
3327 | ||
4bd9d344 AB |
3328 | When debug events exit the main run loop with the reason |
3329 | KVM_EXIT_DEBUG with the kvm_debug_exit_arch part of the kvm_run | |
3330 | structure containing architecture specific debug information. | |
3401d546 | 3331 | |
209cf19f | 3332 | 4.88 KVM_GET_EMULATED_CPUID |
106ee47d MCC |
3333 | --------------------------- |
3334 | ||
3335 | :Capability: KVM_CAP_EXT_EMUL_CPUID | |
3336 | :Architectures: x86 | |
3337 | :Type: system ioctl | |
3338 | :Parameters: struct kvm_cpuid2 (in/out) | |
3339 | :Returns: 0 on success, -1 on error | |
209cf19f | 3340 | |
106ee47d | 3341 | :: |
209cf19f | 3342 | |
106ee47d | 3343 | struct kvm_cpuid2 { |
209cf19f AB |
3344 | __u32 nent; |
3345 | __u32 flags; | |
3346 | struct kvm_cpuid_entry2 entries[0]; | |
106ee47d | 3347 | }; |
209cf19f AB |
3348 | |
3349 | The member 'flags' is used for passing flags from userspace. | |
3350 | ||
106ee47d | 3351 | :: |
209cf19f | 3352 | |
106ee47d | 3353 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) |
7ff6c035 SC |
3354 | #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) /* deprecated */ |
3355 | #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) /* deprecated */ | |
106ee47d MCC |
3356 | |
3357 | struct kvm_cpuid_entry2 { | |
209cf19f AB |
3358 | __u32 function; |
3359 | __u32 index; | |
3360 | __u32 flags; | |
3361 | __u32 eax; | |
3362 | __u32 ebx; | |
3363 | __u32 ecx; | |
3364 | __u32 edx; | |
3365 | __u32 padding[3]; | |
106ee47d | 3366 | }; |
209cf19f AB |
3367 | |
3368 | This ioctl returns x86 cpuid features which are emulated by | |
3369 | kvm.Userspace can use the information returned by this ioctl to query | |
3370 | which features are emulated by kvm instead of being present natively. | |
3371 | ||
3372 | Userspace invokes KVM_GET_EMULATED_CPUID by passing a kvm_cpuid2 | |
3373 | structure with the 'nent' field indicating the number of entries in | |
3374 | the variable-size array 'entries'. If the number of entries is too low | |
3375 | to describe the cpu capabilities, an error (E2BIG) is returned. If the | |
3376 | number is too high, the 'nent' field is adjusted and an error (ENOMEM) | |
3377 | is returned. If the number is just right, the 'nent' field is adjusted | |
3378 | to the number of valid entries in the 'entries' array, which is then | |
3379 | filled. | |
3380 | ||
3381 | The entries returned are the set CPUID bits of the respective features | |
3382 | which kvm emulates, as returned by the CPUID instruction, with unknown | |
3383 | or unsupported feature bits cleared. | |
3384 | ||
3385 | Features like x2apic, for example, may not be present in the host cpu | |
3386 | but are exposed by kvm in KVM_GET_SUPPORTED_CPUID because they can be | |
3387 | emulated efficiently and thus not included here. | |
3388 | ||
3389 | The fields in each entry are defined as follows: | |
3390 | ||
106ee47d MCC |
3391 | function: |
3392 | the eax value used to obtain the entry | |
3393 | index: | |
3394 | the ecx value used to obtain the entry (for entries that are | |
209cf19f | 3395 | affected by ecx) |
106ee47d MCC |
3396 | flags: |
3397 | an OR of zero or more of the following: | |
3398 | ||
209cf19f AB |
3399 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX: |
3400 | if the index field is valid | |
106ee47d MCC |
3401 | |
3402 | eax, ebx, ecx, edx: | |
3403 | ||
3404 | the values returned by the cpuid instruction for | |
209cf19f AB |
3405 | this function/index combination |
3406 | ||
41408c28 | 3407 | 4.89 KVM_S390_MEM_OP |
106ee47d | 3408 | -------------------- |
41408c28 | 3409 | |
106ee47d MCC |
3410 | :Capability: KVM_CAP_S390_MEM_OP |
3411 | :Architectures: s390 | |
3412 | :Type: vcpu ioctl | |
3413 | :Parameters: struct kvm_s390_mem_op (in) | |
3414 | :Returns: = 0 on success, | |
3415 | < 0 on generic error (e.g. -EFAULT or -ENOMEM), | |
3416 | > 0 if an exception occurred while walking the page tables | |
41408c28 | 3417 | |
5d4f6f3d | 3418 | Read or write data from/to the logical (virtual) memory of a VCPU. |
41408c28 | 3419 | |
106ee47d | 3420 | Parameters are specified via the following structure:: |
41408c28 | 3421 | |
106ee47d | 3422 | struct kvm_s390_mem_op { |
41408c28 TH |
3423 | __u64 gaddr; /* the guest address */ |
3424 | __u64 flags; /* flags */ | |
3425 | __u32 size; /* amount of bytes */ | |
3426 | __u32 op; /* type of operation */ | |
3427 | __u64 buf; /* buffer in userspace */ | |
3428 | __u8 ar; /* the access register number */ | |
3429 | __u8 reserved[31]; /* should be set to 0 */ | |
106ee47d | 3430 | }; |
41408c28 TH |
3431 | |
3432 | The type of operation is specified in the "op" field. It is either | |
3433 | KVM_S390_MEMOP_LOGICAL_READ for reading from logical memory space or | |
3434 | KVM_S390_MEMOP_LOGICAL_WRITE for writing to logical memory space. The | |
3435 | KVM_S390_MEMOP_F_CHECK_ONLY flag can be set in the "flags" field to check | |
3436 | whether the corresponding memory access would create an access exception | |
3437 | (without touching the data in the memory at the destination). In case an | |
3438 | access exception occurred while walking the MMU tables of the guest, the | |
3439 | ioctl returns a positive error number to indicate the type of exception. | |
3440 | This exception is also raised directly at the corresponding VCPU if the | |
3441 | flag KVM_S390_MEMOP_F_INJECT_EXCEPTION is set in the "flags" field. | |
3442 | ||
3443 | The start address of the memory region has to be specified in the "gaddr" | |
b4d863c3 CH |
3444 | field, and the length of the region in the "size" field (which must not |
3445 | be 0). The maximum value for "size" can be obtained by checking the | |
3446 | KVM_CAP_S390_MEM_OP capability. "buf" is the buffer supplied by the | |
3447 | userspace application where the read data should be written to for | |
3448 | KVM_S390_MEMOP_LOGICAL_READ, or where the data that should be written is | |
3449 | stored for a KVM_S390_MEMOP_LOGICAL_WRITE. When KVM_S390_MEMOP_F_CHECK_ONLY | |
3450 | is specified, "buf" is unused and can be NULL. "ar" designates the access | |
3451 | register number to be used; the valid range is 0..15. | |
41408c28 TH |
3452 | |
3453 | The "reserved" field is meant for future extensions. It is not used by | |
3454 | KVM with the currently defined set of flags. | |
3455 | ||
30ee2a98 | 3456 | 4.90 KVM_S390_GET_SKEYS |
106ee47d | 3457 | ----------------------- |
30ee2a98 | 3458 | |
106ee47d MCC |
3459 | :Capability: KVM_CAP_S390_SKEYS |
3460 | :Architectures: s390 | |
3461 | :Type: vm ioctl | |
3462 | :Parameters: struct kvm_s390_skeys | |
3463 | :Returns: 0 on success, KVM_S390_GET_KEYS_NONE if guest is not using storage | |
3464 | keys, negative value on error | |
30ee2a98 JH |
3465 | |
3466 | This ioctl is used to get guest storage key values on the s390 | |
106ee47d | 3467 | architecture. The ioctl takes parameters via the kvm_s390_skeys struct:: |
30ee2a98 | 3468 | |
106ee47d | 3469 | struct kvm_s390_skeys { |
30ee2a98 JH |
3470 | __u64 start_gfn; |
3471 | __u64 count; | |
3472 | __u64 skeydata_addr; | |
3473 | __u32 flags; | |
3474 | __u32 reserved[9]; | |
106ee47d | 3475 | }; |
30ee2a98 JH |
3476 | |
3477 | The start_gfn field is the number of the first guest frame whose storage keys | |
3478 | you want to get. | |
3479 | ||
3480 | The count field is the number of consecutive frames (starting from start_gfn) | |
3481 | whose storage keys to get. The count field must be at least 1 and the maximum | |
3482 | allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range | |
3483 | will cause the ioctl to return -EINVAL. | |
3484 | ||
3485 | The skeydata_addr field is the address to a buffer large enough to hold count | |
3486 | bytes. This buffer will be filled with storage key data by the ioctl. | |
3487 | ||
3488 | 4.91 KVM_S390_SET_SKEYS | |
106ee47d | 3489 | ----------------------- |
30ee2a98 | 3490 | |
106ee47d MCC |
3491 | :Capability: KVM_CAP_S390_SKEYS |
3492 | :Architectures: s390 | |
3493 | :Type: vm ioctl | |
3494 | :Parameters: struct kvm_s390_skeys | |
3495 | :Returns: 0 on success, negative value on error | |
30ee2a98 JH |
3496 | |
3497 | This ioctl is used to set guest storage key values on the s390 | |
3498 | architecture. The ioctl takes parameters via the kvm_s390_skeys struct. | |
3499 | See section on KVM_S390_GET_SKEYS for struct definition. | |
3500 | ||
3501 | The start_gfn field is the number of the first guest frame whose storage keys | |
3502 | you want to set. | |
3503 | ||
3504 | The count field is the number of consecutive frames (starting from start_gfn) | |
3505 | whose storage keys to get. The count field must be at least 1 and the maximum | |
3506 | allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range | |
3507 | will cause the ioctl to return -EINVAL. | |
3508 | ||
3509 | The skeydata_addr field is the address to a buffer containing count bytes of | |
3510 | storage keys. Each byte in the buffer will be set as the storage key for a | |
3511 | single frame starting at start_gfn for count frames. | |
3512 | ||
3513 | Note: If any architecturally invalid key value is found in the given data then | |
3514 | the ioctl will return -EINVAL. | |
3515 | ||
47b43c52 | 3516 | 4.92 KVM_S390_IRQ |
106ee47d MCC |
3517 | ----------------- |
3518 | ||
3519 | :Capability: KVM_CAP_S390_INJECT_IRQ | |
3520 | :Architectures: s390 | |
3521 | :Type: vcpu ioctl | |
3522 | :Parameters: struct kvm_s390_irq (in) | |
3523 | :Returns: 0 on success, -1 on error | |
47b43c52 | 3524 | |
47b43c52 | 3525 | Errors: |
106ee47d MCC |
3526 | |
3527 | ||
3528 | ====== ================================================================= | |
3529 | EINVAL interrupt type is invalid | |
3530 | type is KVM_S390_SIGP_STOP and flag parameter is invalid value, | |
47b43c52 | 3531 | type is KVM_S390_INT_EXTERNAL_CALL and code is bigger |
106ee47d MCC |
3532 | than the maximum of VCPUs |
3533 | EBUSY type is KVM_S390_SIGP_SET_PREFIX and vcpu is not stopped, | |
3534 | type is KVM_S390_SIGP_STOP and a stop irq is already pending, | |
47b43c52 | 3535 | type is KVM_S390_INT_EXTERNAL_CALL and an external call interrupt |
106ee47d MCC |
3536 | is already pending |
3537 | ====== ================================================================= | |
47b43c52 JF |
3538 | |
3539 | Allows to inject an interrupt to the guest. | |
3540 | ||
3541 | Using struct kvm_s390_irq as a parameter allows | |
3542 | to inject additional payload which is not | |
3543 | possible via KVM_S390_INTERRUPT. | |
3544 | ||
106ee47d | 3545 | Interrupt parameters are passed via kvm_s390_irq:: |
47b43c52 | 3546 | |
106ee47d | 3547 | struct kvm_s390_irq { |
47b43c52 JF |
3548 | __u64 type; |
3549 | union { | |
3550 | struct kvm_s390_io_info io; | |
3551 | struct kvm_s390_ext_info ext; | |
3552 | struct kvm_s390_pgm_info pgm; | |
3553 | struct kvm_s390_emerg_info emerg; | |
3554 | struct kvm_s390_extcall_info extcall; | |
3555 | struct kvm_s390_prefix_info prefix; | |
3556 | struct kvm_s390_stop_info stop; | |
3557 | struct kvm_s390_mchk_info mchk; | |
3558 | char reserved[64]; | |
3559 | } u; | |
106ee47d | 3560 | }; |
47b43c52 JF |
3561 | |
3562 | type can be one of the following: | |
3563 | ||
106ee47d MCC |
3564 | - KVM_S390_SIGP_STOP - sigp stop; parameter in .stop |
3565 | - KVM_S390_PROGRAM_INT - program check; parameters in .pgm | |
3566 | - KVM_S390_SIGP_SET_PREFIX - sigp set prefix; parameters in .prefix | |
3567 | - KVM_S390_RESTART - restart; no parameters | |
3568 | - KVM_S390_INT_CLOCK_COMP - clock comparator interrupt; no parameters | |
3569 | - KVM_S390_INT_CPU_TIMER - CPU timer interrupt; no parameters | |
3570 | - KVM_S390_INT_EMERGENCY - sigp emergency; parameters in .emerg | |
3571 | - KVM_S390_INT_EXTERNAL_CALL - sigp external call; parameters in .extcall | |
3572 | - KVM_S390_MCHK - machine check interrupt; parameters in .mchk | |
47b43c52 | 3573 | |
5e124900 | 3574 | This is an asynchronous vcpu ioctl and can be invoked from any thread. |
47b43c52 | 3575 | |
816c7667 | 3576 | 4.94 KVM_S390_GET_IRQ_STATE |
106ee47d | 3577 | --------------------------- |
816c7667 | 3578 | |
106ee47d MCC |
3579 | :Capability: KVM_CAP_S390_IRQ_STATE |
3580 | :Architectures: s390 | |
3581 | :Type: vcpu ioctl | |
3582 | :Parameters: struct kvm_s390_irq_state (out) | |
3583 | :Returns: >= number of bytes copied into buffer, | |
3584 | -EINVAL if buffer size is 0, | |
3585 | -ENOBUFS if buffer size is too small to fit all pending interrupts, | |
3586 | -EFAULT if the buffer address was invalid | |
816c7667 JF |
3587 | |
3588 | This ioctl allows userspace to retrieve the complete state of all currently | |
3589 | pending interrupts in a single buffer. Use cases include migration | |
3590 | and introspection. The parameter structure contains the address of a | |
106ee47d | 3591 | userspace buffer and its length:: |
816c7667 | 3592 | |
106ee47d | 3593 | struct kvm_s390_irq_state { |
816c7667 | 3594 | __u64 buf; |
bb64da9a | 3595 | __u32 flags; /* will stay unused for compatibility reasons */ |
816c7667 | 3596 | __u32 len; |
bb64da9a | 3597 | __u32 reserved[4]; /* will stay unused for compatibility reasons */ |
106ee47d | 3598 | }; |
816c7667 JF |
3599 | |
3600 | Userspace passes in the above struct and for each pending interrupt a | |
3601 | struct kvm_s390_irq is copied to the provided buffer. | |
3602 | ||
bb64da9a CB |
3603 | The structure contains a flags and a reserved field for future extensions. As |
3604 | the kernel never checked for flags == 0 and QEMU never pre-zeroed flags and | |
3605 | reserved, these fields can not be used in the future without breaking | |
3606 | compatibility. | |
3607 | ||
816c7667 JF |
3608 | If -ENOBUFS is returned the buffer provided was too small and userspace |
3609 | may retry with a bigger buffer. | |
3610 | ||
3611 | 4.95 KVM_S390_SET_IRQ_STATE | |
106ee47d MCC |
3612 | --------------------------- |
3613 | ||
3614 | :Capability: KVM_CAP_S390_IRQ_STATE | |
3615 | :Architectures: s390 | |
3616 | :Type: vcpu ioctl | |
3617 | :Parameters: struct kvm_s390_irq_state (in) | |
3618 | :Returns: 0 on success, | |
3619 | -EFAULT if the buffer address was invalid, | |
3620 | -EINVAL for an invalid buffer length (see below), | |
3621 | -EBUSY if there were already interrupts pending, | |
3622 | errors occurring when actually injecting the | |
816c7667 JF |
3623 | interrupt. See KVM_S390_IRQ. |
3624 | ||
3625 | This ioctl allows userspace to set the complete state of all cpu-local | |
3626 | interrupts currently pending for the vcpu. It is intended for restoring | |
3627 | interrupt state after a migration. The input parameter is a userspace buffer | |
106ee47d | 3628 | containing a struct kvm_s390_irq_state:: |
816c7667 | 3629 | |
106ee47d | 3630 | struct kvm_s390_irq_state { |
816c7667 | 3631 | __u64 buf; |
bb64da9a | 3632 | __u32 flags; /* will stay unused for compatibility reasons */ |
816c7667 | 3633 | __u32 len; |
bb64da9a | 3634 | __u32 reserved[4]; /* will stay unused for compatibility reasons */ |
106ee47d | 3635 | }; |
816c7667 | 3636 | |
bb64da9a CB |
3637 | The restrictions for flags and reserved apply as well. |
3638 | (see KVM_S390_GET_IRQ_STATE) | |
3639 | ||
816c7667 JF |
3640 | The userspace memory referenced by buf contains a struct kvm_s390_irq |
3641 | for each interrupt to be injected into the guest. | |
3642 | If one of the interrupts could not be injected for some reason the | |
3643 | ioctl aborts. | |
3644 | ||
3645 | len must be a multiple of sizeof(struct kvm_s390_irq). It must be > 0 | |
3646 | and it must not exceed (max_vcpus + 32) * sizeof(struct kvm_s390_irq), | |
3647 | which is the maximum number of possibly pending cpu-local interrupts. | |
47b43c52 | 3648 | |
ed8e5a24 | 3649 | 4.96 KVM_SMI |
106ee47d | 3650 | ------------ |
f077825a | 3651 | |
106ee47d MCC |
3652 | :Capability: KVM_CAP_X86_SMM |
3653 | :Architectures: x86 | |
3654 | :Type: vcpu ioctl | |
3655 | :Parameters: none | |
3656 | :Returns: 0 on success, -1 on error | |
f077825a PB |
3657 | |
3658 | Queues an SMI on the thread's vcpu. | |
3659 | ||
d3695aa4 | 3660 | 4.97 KVM_CAP_PPC_MULTITCE |
106ee47d | 3661 | ------------------------- |
d3695aa4 | 3662 | |
106ee47d MCC |
3663 | :Capability: KVM_CAP_PPC_MULTITCE |
3664 | :Architectures: ppc | |
3665 | :Type: vm | |
d3695aa4 AK |
3666 | |
3667 | This capability means the kernel is capable of handling hypercalls | |
3668 | H_PUT_TCE_INDIRECT and H_STUFF_TCE without passing those into the user | |
3669 | space. This significantly accelerates DMA operations for PPC KVM guests. | |
3670 | User space should expect that its handlers for these hypercalls | |
3671 | are not going to be called if user space previously registered LIOBN | |
3672 | in KVM (via KVM_CREATE_SPAPR_TCE or similar calls). | |
3673 | ||
3674 | In order to enable H_PUT_TCE_INDIRECT and H_STUFF_TCE use in the guest, | |
3675 | user space might have to advertise it for the guest. For example, | |
3676 | IBM pSeries (sPAPR) guest starts using them if "hcall-multi-tce" is | |
3677 | present in the "ibm,hypertas-functions" device-tree property. | |
3678 | ||
3679 | The hypercalls mentioned above may or may not be processed successfully | |
3680 | in the kernel based fast path. If they can not be handled by the kernel, | |
3681 | they will get passed on to user space. So user space still has to have | |
3682 | an implementation for these despite the in kernel acceleration. | |
3683 | ||
3684 | This capability is always enabled. | |
3685 | ||
58ded420 | 3686 | 4.98 KVM_CREATE_SPAPR_TCE_64 |
106ee47d | 3687 | ---------------------------- |
58ded420 | 3688 | |
106ee47d MCC |
3689 | :Capability: KVM_CAP_SPAPR_TCE_64 |
3690 | :Architectures: powerpc | |
3691 | :Type: vm ioctl | |
3692 | :Parameters: struct kvm_create_spapr_tce_64 (in) | |
3693 | :Returns: file descriptor for manipulating the created TCE table | |
58ded420 AK |
3694 | |
3695 | This is an extension for KVM_CAP_SPAPR_TCE which only supports 32bit | |
3696 | windows, described in 4.62 KVM_CREATE_SPAPR_TCE | |
3697 | ||
106ee47d | 3698 | This capability uses extended struct in ioctl interface:: |
58ded420 | 3699 | |
106ee47d MCC |
3700 | /* for KVM_CAP_SPAPR_TCE_64 */ |
3701 | struct kvm_create_spapr_tce_64 { | |
58ded420 AK |
3702 | __u64 liobn; |
3703 | __u32 page_shift; | |
3704 | __u32 flags; | |
3705 | __u64 offset; /* in pages */ | |
3706 | __u64 size; /* in pages */ | |
106ee47d | 3707 | }; |
58ded420 AK |
3708 | |
3709 | The aim of extension is to support an additional bigger DMA window with | |
3710 | a variable page size. | |
3711 | KVM_CREATE_SPAPR_TCE_64 receives a 64bit window size, an IOMMU page shift and | |
3712 | a bus offset of the corresponding DMA window, @size and @offset are numbers | |
3713 | of IOMMU pages. | |
3714 | ||
3715 | @flags are not used at the moment. | |
3716 | ||
3717 | The rest of functionality is identical to KVM_CREATE_SPAPR_TCE. | |
3718 | ||
ccc4df4e | 3719 | 4.99 KVM_REINJECT_CONTROL |
106ee47d | 3720 | ------------------------- |
107d44a2 | 3721 | |
106ee47d MCC |
3722 | :Capability: KVM_CAP_REINJECT_CONTROL |
3723 | :Architectures: x86 | |
3724 | :Type: vm ioctl | |
3725 | :Parameters: struct kvm_reinject_control (in) | |
3726 | :Returns: 0 on success, | |
107d44a2 RK |
3727 | -EFAULT if struct kvm_reinject_control cannot be read, |
3728 | -ENXIO if KVM_CREATE_PIT or KVM_CREATE_PIT2 didn't succeed earlier. | |
3729 | ||
3730 | i8254 (PIT) has two modes, reinject and !reinject. The default is reinject, | |
3731 | where KVM queues elapsed i8254 ticks and monitors completion of interrupt from | |
3732 | vector(s) that i8254 injects. Reinject mode dequeues a tick and injects its | |
3733 | interrupt whenever there isn't a pending interrupt from i8254. | |
3734 | !reinject mode injects an interrupt as soon as a tick arrives. | |
3735 | ||
106ee47d MCC |
3736 | :: |
3737 | ||
3738 | struct kvm_reinject_control { | |
107d44a2 RK |
3739 | __u8 pit_reinject; |
3740 | __u8 reserved[31]; | |
106ee47d | 3741 | }; |
107d44a2 RK |
3742 | |
3743 | pit_reinject = 0 (!reinject mode) is recommended, unless running an old | |
3744 | operating system that uses the PIT for timing (e.g. Linux 2.4.x). | |
3745 | ||
ccc4df4e | 3746 | 4.100 KVM_PPC_CONFIGURE_V3_MMU |
106ee47d | 3747 | ------------------------------ |
c9270132 | 3748 | |
106ee47d MCC |
3749 | :Capability: KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 |
3750 | :Architectures: ppc | |
3751 | :Type: vm ioctl | |
3752 | :Parameters: struct kvm_ppc_mmuv3_cfg (in) | |
3753 | :Returns: 0 on success, | |
c9270132 PM |
3754 | -EFAULT if struct kvm_ppc_mmuv3_cfg cannot be read, |
3755 | -EINVAL if the configuration is invalid | |
3756 | ||
3757 | This ioctl controls whether the guest will use radix or HPT (hashed | |
3758 | page table) translation, and sets the pointer to the process table for | |
3759 | the guest. | |
3760 | ||
106ee47d MCC |
3761 | :: |
3762 | ||
3763 | struct kvm_ppc_mmuv3_cfg { | |
c9270132 PM |
3764 | __u64 flags; |
3765 | __u64 process_table; | |
106ee47d | 3766 | }; |
c9270132 PM |
3767 | |
3768 | There are two bits that can be set in flags; KVM_PPC_MMUV3_RADIX and | |
3769 | KVM_PPC_MMUV3_GTSE. KVM_PPC_MMUV3_RADIX, if set, configures the guest | |
3770 | to use radix tree translation, and if clear, to use HPT translation. | |
3771 | KVM_PPC_MMUV3_GTSE, if set and if KVM permits it, configures the guest | |
3772 | to be able to use the global TLB and SLB invalidation instructions; | |
3773 | if clear, the guest may not use these instructions. | |
3774 | ||
3775 | The process_table field specifies the address and size of the guest | |
3776 | process table, which is in the guest's space. This field is formatted | |
3777 | as the second doubleword of the partition table entry, as defined in | |
3778 | the Power ISA V3.00, Book III section 5.7.6.1. | |
3779 | ||
ccc4df4e | 3780 | 4.101 KVM_PPC_GET_RMMU_INFO |
106ee47d | 3781 | --------------------------- |
c9270132 | 3782 | |
106ee47d MCC |
3783 | :Capability: KVM_CAP_PPC_RADIX_MMU |
3784 | :Architectures: ppc | |
3785 | :Type: vm ioctl | |
3786 | :Parameters: struct kvm_ppc_rmmu_info (out) | |
3787 | :Returns: 0 on success, | |
c9270132 PM |
3788 | -EFAULT if struct kvm_ppc_rmmu_info cannot be written, |
3789 | -EINVAL if no useful information can be returned | |
3790 | ||
3791 | This ioctl returns a structure containing two things: (a) a list | |
3792 | containing supported radix tree geometries, and (b) a list that maps | |
3793 | page sizes to put in the "AP" (actual page size) field for the tlbie | |
3794 | (TLB invalidate entry) instruction. | |
3795 | ||
106ee47d MCC |
3796 | :: |
3797 | ||
3798 | struct kvm_ppc_rmmu_info { | |
c9270132 PM |
3799 | struct kvm_ppc_radix_geom { |
3800 | __u8 page_shift; | |
3801 | __u8 level_bits[4]; | |
3802 | __u8 pad[3]; | |
3803 | } geometries[8]; | |
3804 | __u32 ap_encodings[8]; | |
106ee47d | 3805 | }; |
c9270132 PM |
3806 | |
3807 | The geometries[] field gives up to 8 supported geometries for the | |
3808 | radix page table, in terms of the log base 2 of the smallest page | |
3809 | size, and the number of bits indexed at each level of the tree, from | |
3810 | the PTE level up to the PGD level in that order. Any unused entries | |
3811 | will have 0 in the page_shift field. | |
3812 | ||
3813 | The ap_encodings gives the supported page sizes and their AP field | |
3814 | encodings, encoded with the AP value in the top 3 bits and the log | |
3815 | base 2 of the page size in the bottom 6 bits. | |
3816 | ||
ef1ead0c | 3817 | 4.102 KVM_PPC_RESIZE_HPT_PREPARE |
106ee47d | 3818 | -------------------------------- |
ef1ead0c | 3819 | |
106ee47d MCC |
3820 | :Capability: KVM_CAP_SPAPR_RESIZE_HPT |
3821 | :Architectures: powerpc | |
3822 | :Type: vm ioctl | |
3823 | :Parameters: struct kvm_ppc_resize_hpt (in) | |
3824 | :Returns: 0 on successful completion, | |
ef1ead0c | 3825 | >0 if a new HPT is being prepared, the value is an estimated |
106ee47d | 3826 | number of milliseconds until preparation is complete, |
ef1ead0c | 3827 | -EFAULT if struct kvm_reinject_control cannot be read, |
106ee47d MCC |
3828 | -EINVAL if the supplied shift or flags are invalid, |
3829 | -ENOMEM if unable to allocate the new HPT, | |
3830 | -ENOSPC if there was a hash collision | |
3831 | ||
3832 | :: | |
3833 | ||
3834 | struct kvm_ppc_rmmu_info { | |
3835 | struct kvm_ppc_radix_geom { | |
3836 | __u8 page_shift; | |
3837 | __u8 level_bits[4]; | |
3838 | __u8 pad[3]; | |
3839 | } geometries[8]; | |
3840 | __u32 ap_encodings[8]; | |
3841 | }; | |
3842 | ||
3843 | The geometries[] field gives up to 8 supported geometries for the | |
3844 | radix page table, in terms of the log base 2 of the smallest page | |
3845 | size, and the number of bits indexed at each level of the tree, from | |
3846 | the PTE level up to the PGD level in that order. Any unused entries | |
3847 | will have 0 in the page_shift field. | |
3848 | ||
3849 | The ap_encodings gives the supported page sizes and their AP field | |
3850 | encodings, encoded with the AP value in the top 3 bits and the log | |
3851 | base 2 of the page size in the bottom 6 bits. | |
3852 | ||
3853 | 4.102 KVM_PPC_RESIZE_HPT_PREPARE | |
3854 | -------------------------------- | |
3855 | ||
3856 | :Capability: KVM_CAP_SPAPR_RESIZE_HPT | |
3857 | :Architectures: powerpc | |
3858 | :Type: vm ioctl | |
3859 | :Parameters: struct kvm_ppc_resize_hpt (in) | |
3860 | :Returns: 0 on successful completion, | |
3861 | >0 if a new HPT is being prepared, the value is an estimated | |
3862 | number of milliseconds until preparation is complete, | |
3863 | -EFAULT if struct kvm_reinject_control cannot be read, | |
3864 | -EINVAL if the supplied shift or flags are invalid,when moving existing | |
3865 | HPT entries to the new HPT, | |
ef1ead0c DG |
3866 | -EIO on other error conditions |
3867 | ||
3868 | Used to implement the PAPR extension for runtime resizing of a guest's | |
3869 | Hashed Page Table (HPT). Specifically this starts, stops or monitors | |
3870 | the preparation of a new potential HPT for the guest, essentially | |
3871 | implementing the H_RESIZE_HPT_PREPARE hypercall. | |
3872 | ||
3873 | If called with shift > 0 when there is no pending HPT for the guest, | |
3874 | this begins preparation of a new pending HPT of size 2^(shift) bytes. | |
3875 | It then returns a positive integer with the estimated number of | |
3876 | milliseconds until preparation is complete. | |
3877 | ||
3878 | If called when there is a pending HPT whose size does not match that | |
3879 | requested in the parameters, discards the existing pending HPT and | |
3880 | creates a new one as above. | |
3881 | ||
3882 | If called when there is a pending HPT of the size requested, will: | |
106ee47d | 3883 | |
ef1ead0c DG |
3884 | * If preparation of the pending HPT is already complete, return 0 |
3885 | * If preparation of the pending HPT has failed, return an error | |
3886 | code, then discard the pending HPT. | |
3887 | * If preparation of the pending HPT is still in progress, return an | |
3888 | estimated number of milliseconds until preparation is complete. | |
3889 | ||
3890 | If called with shift == 0, discards any currently pending HPT and | |
3891 | returns 0 (i.e. cancels any in-progress preparation). | |
3892 | ||
3893 | flags is reserved for future expansion, currently setting any bits in | |
3894 | flags will result in an -EINVAL. | |
3895 | ||
3896 | Normally this will be called repeatedly with the same parameters until | |
3897 | it returns <= 0. The first call will initiate preparation, subsequent | |
3898 | ones will monitor preparation until it completes or fails. | |
3899 | ||
106ee47d MCC |
3900 | :: |
3901 | ||
3902 | struct kvm_ppc_resize_hpt { | |
ef1ead0c DG |
3903 | __u64 flags; |
3904 | __u32 shift; | |
3905 | __u32 pad; | |
106ee47d | 3906 | }; |
ef1ead0c DG |
3907 | |
3908 | 4.103 KVM_PPC_RESIZE_HPT_COMMIT | |
106ee47d | 3909 | ------------------------------- |
ef1ead0c | 3910 | |
106ee47d MCC |
3911 | :Capability: KVM_CAP_SPAPR_RESIZE_HPT |
3912 | :Architectures: powerpc | |
3913 | :Type: vm ioctl | |
3914 | :Parameters: struct kvm_ppc_resize_hpt (in) | |
3915 | :Returns: 0 on successful completion, | |
ef1ead0c | 3916 | -EFAULT if struct kvm_reinject_control cannot be read, |
106ee47d | 3917 | -EINVAL if the supplied shift or flags are invalid, |
ef1ead0c | 3918 | -ENXIO is there is no pending HPT, or the pending HPT doesn't |
106ee47d MCC |
3919 | have the requested size, |
3920 | -EBUSY if the pending HPT is not fully prepared, | |
ef1ead0c | 3921 | -ENOSPC if there was a hash collision when moving existing |
106ee47d | 3922 | HPT entries to the new HPT, |
ef1ead0c DG |
3923 | -EIO on other error conditions |
3924 | ||
3925 | Used to implement the PAPR extension for runtime resizing of a guest's | |
3926 | Hashed Page Table (HPT). Specifically this requests that the guest be | |
3927 | transferred to working with the new HPT, essentially implementing the | |
3928 | H_RESIZE_HPT_COMMIT hypercall. | |
3929 | ||
3930 | This should only be called after KVM_PPC_RESIZE_HPT_PREPARE has | |
3931 | returned 0 with the same parameters. In other cases | |
3932 | KVM_PPC_RESIZE_HPT_COMMIT will return an error (usually -ENXIO or | |
3933 | -EBUSY, though others may be possible if the preparation was started, | |
3934 | but failed). | |
3935 | ||
3936 | This will have undefined effects on the guest if it has not already | |
3937 | placed itself in a quiescent state where no vcpu will make MMU enabled | |
3938 | memory accesses. | |
3939 | ||
3940 | On succsful completion, the pending HPT will become the guest's active | |
3941 | HPT and the previous HPT will be discarded. | |
3942 | ||
3943 | On failure, the guest will still be operating on its previous HPT. | |
3944 | ||
106ee47d MCC |
3945 | :: |
3946 | ||
3947 | struct kvm_ppc_resize_hpt { | |
ef1ead0c DG |
3948 | __u64 flags; |
3949 | __u32 shift; | |
3950 | __u32 pad; | |
106ee47d | 3951 | }; |
ef1ead0c | 3952 | |
3aa53859 | 3953 | 4.104 KVM_X86_GET_MCE_CAP_SUPPORTED |
106ee47d | 3954 | ----------------------------------- |
3aa53859 | 3955 | |
106ee47d MCC |
3956 | :Capability: KVM_CAP_MCE |
3957 | :Architectures: x86 | |
3958 | :Type: system ioctl | |
3959 | :Parameters: u64 mce_cap (out) | |
3960 | :Returns: 0 on success, -1 on error | |
3aa53859 LC |
3961 | |
3962 | Returns supported MCE capabilities. The u64 mce_cap parameter | |
3963 | has the same format as the MSR_IA32_MCG_CAP register. Supported | |
3964 | capabilities will have the corresponding bits set. | |
3965 | ||
3966 | 4.105 KVM_X86_SETUP_MCE | |
106ee47d | 3967 | ----------------------- |
3aa53859 | 3968 | |
106ee47d MCC |
3969 | :Capability: KVM_CAP_MCE |
3970 | :Architectures: x86 | |
3971 | :Type: vcpu ioctl | |
3972 | :Parameters: u64 mcg_cap (in) | |
3973 | :Returns: 0 on success, | |
3aa53859 LC |
3974 | -EFAULT if u64 mcg_cap cannot be read, |
3975 | -EINVAL if the requested number of banks is invalid, | |
3976 | -EINVAL if requested MCE capability is not supported. | |
3977 | ||
3978 | Initializes MCE support for use. The u64 mcg_cap parameter | |
3979 | has the same format as the MSR_IA32_MCG_CAP register and | |
3980 | specifies which capabilities should be enabled. The maximum | |
3981 | supported number of error-reporting banks can be retrieved when | |
3982 | checking for KVM_CAP_MCE. The supported capabilities can be | |
3983 | retrieved with KVM_X86_GET_MCE_CAP_SUPPORTED. | |
3984 | ||
3985 | 4.106 KVM_X86_SET_MCE | |
106ee47d | 3986 | --------------------- |
3aa53859 | 3987 | |
106ee47d MCC |
3988 | :Capability: KVM_CAP_MCE |
3989 | :Architectures: x86 | |
3990 | :Type: vcpu ioctl | |
3991 | :Parameters: struct kvm_x86_mce (in) | |
3992 | :Returns: 0 on success, | |
3aa53859 LC |
3993 | -EFAULT if struct kvm_x86_mce cannot be read, |
3994 | -EINVAL if the bank number is invalid, | |
3995 | -EINVAL if VAL bit is not set in status field. | |
3996 | ||
3997 | Inject a machine check error (MCE) into the guest. The input | |
106ee47d | 3998 | parameter is:: |
3aa53859 | 3999 | |
106ee47d | 4000 | struct kvm_x86_mce { |
3aa53859 LC |
4001 | __u64 status; |
4002 | __u64 addr; | |
4003 | __u64 misc; | |
4004 | __u64 mcg_status; | |
4005 | __u8 bank; | |
4006 | __u8 pad1[7]; | |
4007 | __u64 pad2[3]; | |
106ee47d | 4008 | }; |
3aa53859 LC |
4009 | |
4010 | If the MCE being reported is an uncorrected error, KVM will | |
4011 | inject it as an MCE exception into the guest. If the guest | |
4012 | MCG_STATUS register reports that an MCE is in progress, KVM | |
4013 | causes an KVM_EXIT_SHUTDOWN vmexit. | |
4014 | ||
4015 | Otherwise, if the MCE is a corrected error, KVM will just | |
4016 | store it in the corresponding bank (provided this bank is | |
4017 | not holding a previously reported uncorrected error). | |
4018 | ||
4036e387 | 4019 | 4.107 KVM_S390_GET_CMMA_BITS |
106ee47d | 4020 | ---------------------------- |
4036e387 | 4021 | |
106ee47d MCC |
4022 | :Capability: KVM_CAP_S390_CMMA_MIGRATION |
4023 | :Architectures: s390 | |
4024 | :Type: vm ioctl | |
4025 | :Parameters: struct kvm_s390_cmma_log (in, out) | |
4026 | :Returns: 0 on success, a negative value on error | |
4036e387 CI |
4027 | |
4028 | This ioctl is used to get the values of the CMMA bits on the s390 | |
4029 | architecture. It is meant to be used in two scenarios: | |
106ee47d | 4030 | |
4036e387 CI |
4031 | - During live migration to save the CMMA values. Live migration needs |
4032 | to be enabled via the KVM_REQ_START_MIGRATION VM property. | |
4033 | - To non-destructively peek at the CMMA values, with the flag | |
4034 | KVM_S390_CMMA_PEEK set. | |
4035 | ||
4036 | The ioctl takes parameters via the kvm_s390_cmma_log struct. The desired | |
4037 | values are written to a buffer whose location is indicated via the "values" | |
4038 | member in the kvm_s390_cmma_log struct. The values in the input struct are | |
4039 | also updated as needed. | |
106ee47d | 4040 | |
4036e387 CI |
4041 | Each CMMA value takes up one byte. |
4042 | ||
106ee47d MCC |
4043 | :: |
4044 | ||
4045 | struct kvm_s390_cmma_log { | |
4036e387 CI |
4046 | __u64 start_gfn; |
4047 | __u32 count; | |
4048 | __u32 flags; | |
4049 | union { | |
4050 | __u64 remaining; | |
4051 | __u64 mask; | |
4052 | }; | |
4053 | __u64 values; | |
106ee47d | 4054 | }; |
4036e387 CI |
4055 | |
4056 | start_gfn is the number of the first guest frame whose CMMA values are | |
4057 | to be retrieved, | |
4058 | ||
4059 | count is the length of the buffer in bytes, | |
4060 | ||
4061 | values points to the buffer where the result will be written to. | |
4062 | ||
4063 | If count is greater than KVM_S390_SKEYS_MAX, then it is considered to be | |
4064 | KVM_S390_SKEYS_MAX. KVM_S390_SKEYS_MAX is re-used for consistency with | |
4065 | other ioctls. | |
4066 | ||
4067 | The result is written in the buffer pointed to by the field values, and | |
4068 | the values of the input parameter are updated as follows. | |
4069 | ||
4070 | Depending on the flags, different actions are performed. The only | |
4071 | supported flag so far is KVM_S390_CMMA_PEEK. | |
4072 | ||
4073 | The default behaviour if KVM_S390_CMMA_PEEK is not set is: | |
4074 | start_gfn will indicate the first page frame whose CMMA bits were dirty. | |
4075 | It is not necessarily the same as the one passed as input, as clean pages | |
4076 | are skipped. | |
4077 | ||
4078 | count will indicate the number of bytes actually written in the buffer. | |
4079 | It can (and very often will) be smaller than the input value, since the | |
4080 | buffer is only filled until 16 bytes of clean values are found (which | |
4081 | are then not copied in the buffer). Since a CMMA migration block needs | |
4082 | the base address and the length, for a total of 16 bytes, we will send | |
4083 | back some clean data if there is some dirty data afterwards, as long as | |
4084 | the size of the clean data does not exceed the size of the header. This | |
4085 | allows to minimize the amount of data to be saved or transferred over | |
4086 | the network at the expense of more roundtrips to userspace. The next | |
4087 | invocation of the ioctl will skip over all the clean values, saving | |
4088 | potentially more than just the 16 bytes we found. | |
4089 | ||
4090 | If KVM_S390_CMMA_PEEK is set: | |
4091 | the existing storage attributes are read even when not in migration | |
4092 | mode, and no other action is performed; | |
4093 | ||
4094 | the output start_gfn will be equal to the input start_gfn, | |
4095 | ||
4096 | the output count will be equal to the input count, except if the end of | |
4097 | memory has been reached. | |
4098 | ||
4099 | In both cases: | |
4100 | the field "remaining" will indicate the total number of dirty CMMA values | |
4101 | still remaining, or 0 if KVM_S390_CMMA_PEEK is set and migration mode is | |
4102 | not enabled. | |
4103 | ||
4104 | mask is unused. | |
4105 | ||
4106 | values points to the userspace buffer where the result will be stored. | |
4107 | ||
4108 | This ioctl can fail with -ENOMEM if not enough memory can be allocated to | |
4109 | complete the task, with -ENXIO if CMMA is not enabled, with -EINVAL if | |
4110 | KVM_S390_CMMA_PEEK is not set but migration mode was not enabled, with | |
4111 | -EFAULT if the userspace address is invalid or if no page table is | |
4112 | present for the addresses (e.g. when using hugepages). | |
4113 | ||
4114 | 4.108 KVM_S390_SET_CMMA_BITS | |
106ee47d | 4115 | ---------------------------- |
4036e387 | 4116 | |
106ee47d MCC |
4117 | :Capability: KVM_CAP_S390_CMMA_MIGRATION |
4118 | :Architectures: s390 | |
4119 | :Type: vm ioctl | |
4120 | :Parameters: struct kvm_s390_cmma_log (in) | |
4121 | :Returns: 0 on success, a negative value on error | |
4036e387 CI |
4122 | |
4123 | This ioctl is used to set the values of the CMMA bits on the s390 | |
4124 | architecture. It is meant to be used during live migration to restore | |
4125 | the CMMA values, but there are no restrictions on its use. | |
4126 | The ioctl takes parameters via the kvm_s390_cmma_values struct. | |
4127 | Each CMMA value takes up one byte. | |
4128 | ||
106ee47d MCC |
4129 | :: |
4130 | ||
4131 | struct kvm_s390_cmma_log { | |
4036e387 CI |
4132 | __u64 start_gfn; |
4133 | __u32 count; | |
4134 | __u32 flags; | |
4135 | union { | |
4136 | __u64 remaining; | |
4137 | __u64 mask; | |
106ee47d | 4138 | }; |
4036e387 | 4139 | __u64 values; |
106ee47d | 4140 | }; |
4036e387 CI |
4141 | |
4142 | start_gfn indicates the starting guest frame number, | |
4143 | ||
4144 | count indicates how many values are to be considered in the buffer, | |
4145 | ||
4146 | flags is not used and must be 0. | |
4147 | ||
4148 | mask indicates which PGSTE bits are to be considered. | |
4149 | ||
4150 | remaining is not used. | |
4151 | ||
4152 | values points to the buffer in userspace where to store the values. | |
4153 | ||
4154 | This ioctl can fail with -ENOMEM if not enough memory can be allocated to | |
4155 | complete the task, with -ENXIO if CMMA is not enabled, with -EINVAL if | |
4156 | the count field is too large (e.g. more than KVM_S390_CMMA_SIZE_MAX) or | |
4157 | if the flags field was not 0, with -EFAULT if the userspace address is | |
4158 | invalid, if invalid pages are written to (e.g. after the end of memory) | |
4159 | or if no page table is present for the addresses (e.g. when using | |
4160 | hugepages). | |
4161 | ||
7bf14c28 | 4162 | 4.109 KVM_PPC_GET_CPU_CHAR |
106ee47d | 4163 | -------------------------- |
3214d01f | 4164 | |
106ee47d MCC |
4165 | :Capability: KVM_CAP_PPC_GET_CPU_CHAR |
4166 | :Architectures: powerpc | |
4167 | :Type: vm ioctl | |
4168 | :Parameters: struct kvm_ppc_cpu_char (out) | |
4169 | :Returns: 0 on successful completion, | |
3214d01f PM |
4170 | -EFAULT if struct kvm_ppc_cpu_char cannot be written |
4171 | ||
4172 | This ioctl gives userspace information about certain characteristics | |
4173 | of the CPU relating to speculative execution of instructions and | |
4174 | possible information leakage resulting from speculative execution (see | |
4175 | CVE-2017-5715, CVE-2017-5753 and CVE-2017-5754). The information is | |
106ee47d | 4176 | returned in struct kvm_ppc_cpu_char, which looks like this:: |
3214d01f | 4177 | |
106ee47d | 4178 | struct kvm_ppc_cpu_char { |
3214d01f PM |
4179 | __u64 character; /* characteristics of the CPU */ |
4180 | __u64 behaviour; /* recommended software behaviour */ | |
4181 | __u64 character_mask; /* valid bits in character */ | |
4182 | __u64 behaviour_mask; /* valid bits in behaviour */ | |
106ee47d | 4183 | }; |
3214d01f PM |
4184 | |
4185 | For extensibility, the character_mask and behaviour_mask fields | |
4186 | indicate which bits of character and behaviour have been filled in by | |
4187 | the kernel. If the set of defined bits is extended in future then | |
4188 | userspace will be able to tell whether it is running on a kernel that | |
4189 | knows about the new bits. | |
4190 | ||
4191 | The character field describes attributes of the CPU which can help | |
4192 | with preventing inadvertent information disclosure - specifically, | |
4193 | whether there is an instruction to flash-invalidate the L1 data cache | |
4194 | (ori 30,30,0 or mtspr SPRN_TRIG2,rN), whether the L1 data cache is set | |
4195 | to a mode where entries can only be used by the thread that created | |
4196 | them, whether the bcctr[l] instruction prevents speculation, and | |
4197 | whether a speculation barrier instruction (ori 31,31,0) is provided. | |
4198 | ||
4199 | The behaviour field describes actions that software should take to | |
4200 | prevent inadvertent information disclosure, and thus describes which | |
4201 | vulnerabilities the hardware is subject to; specifically whether the | |
4202 | L1 data cache should be flushed when returning to user mode from the | |
4203 | kernel, and whether a speculation barrier should be placed between an | |
4204 | array bounds check and the array access. | |
4205 | ||
4206 | These fields use the same bit definitions as the new | |
4207 | H_GET_CPU_CHARACTERISTICS hypercall. | |
4208 | ||
7bf14c28 | 4209 | 4.110 KVM_MEMORY_ENCRYPT_OP |
106ee47d | 4210 | --------------------------- |
5acc5c06 | 4211 | |
106ee47d MCC |
4212 | :Capability: basic |
4213 | :Architectures: x86 | |
4214 | :Type: system | |
4215 | :Parameters: an opaque platform specific structure (in/out) | |
4216 | :Returns: 0 on success; -1 on error | |
5acc5c06 BS |
4217 | |
4218 | If the platform supports creating encrypted VMs then this ioctl can be used | |
4219 | for issuing platform-specific memory encryption commands to manage those | |
4220 | encrypted VMs. | |
4221 | ||
4222 | Currently, this ioctl is used for issuing Secure Encrypted Virtualization | |
4223 | (SEV) commands on AMD Processors. The SEV commands are defined in | |
2f5947df | 4224 | Documentation/virt/kvm/amd-memory-encryption.rst. |
5acc5c06 | 4225 | |
7bf14c28 | 4226 | 4.111 KVM_MEMORY_ENCRYPT_REG_REGION |
106ee47d | 4227 | ----------------------------------- |
69eaedee | 4228 | |
106ee47d MCC |
4229 | :Capability: basic |
4230 | :Architectures: x86 | |
4231 | :Type: system | |
4232 | :Parameters: struct kvm_enc_region (in) | |
4233 | :Returns: 0 on success; -1 on error | |
69eaedee BS |
4234 | |
4235 | This ioctl can be used to register a guest memory region which may | |
4236 | contain encrypted data (e.g. guest RAM, SMRAM etc). | |
4237 | ||
4238 | It is used in the SEV-enabled guest. When encryption is enabled, a guest | |
4239 | memory region may contain encrypted data. The SEV memory encryption | |
4240 | engine uses a tweak such that two identical plaintext pages, each at | |
4241 | different locations will have differing ciphertexts. So swapping or | |
4242 | moving ciphertext of those pages will not result in plaintext being | |
4243 | swapped. So relocating (or migrating) physical backing pages for the SEV | |
4244 | guest will require some additional steps. | |
4245 | ||
4246 | Note: The current SEV key management spec does not provide commands to | |
4247 | swap or migrate (move) ciphertext pages. Hence, for now we pin the guest | |
4248 | memory region registered with the ioctl. | |
4249 | ||
7bf14c28 | 4250 | 4.112 KVM_MEMORY_ENCRYPT_UNREG_REGION |
106ee47d | 4251 | ------------------------------------- |
69eaedee | 4252 | |
106ee47d MCC |
4253 | :Capability: basic |
4254 | :Architectures: x86 | |
4255 | :Type: system | |
4256 | :Parameters: struct kvm_enc_region (in) | |
4257 | :Returns: 0 on success; -1 on error | |
69eaedee BS |
4258 | |
4259 | This ioctl can be used to unregister the guest memory region registered | |
4260 | with KVM_MEMORY_ENCRYPT_REG_REGION ioctl above. | |
4261 | ||
faeb7833 | 4262 | 4.113 KVM_HYPERV_EVENTFD |
106ee47d | 4263 | ------------------------ |
faeb7833 | 4264 | |
106ee47d MCC |
4265 | :Capability: KVM_CAP_HYPERV_EVENTFD |
4266 | :Architectures: x86 | |
4267 | :Type: vm ioctl | |
4268 | :Parameters: struct kvm_hyperv_eventfd (in) | |
faeb7833 RK |
4269 | |
4270 | This ioctl (un)registers an eventfd to receive notifications from the guest on | |
4271 | the specified Hyper-V connection id through the SIGNAL_EVENT hypercall, without | |
4272 | causing a user exit. SIGNAL_EVENT hypercall with non-zero event flag number | |
4273 | (bits 24-31) still triggers a KVM_EXIT_HYPERV_HCALL user exit. | |
4274 | ||
106ee47d MCC |
4275 | :: |
4276 | ||
4277 | struct kvm_hyperv_eventfd { | |
faeb7833 RK |
4278 | __u32 conn_id; |
4279 | __s32 fd; | |
4280 | __u32 flags; | |
4281 | __u32 padding[3]; | |
106ee47d | 4282 | }; |
faeb7833 | 4283 | |
106ee47d | 4284 | The conn_id field should fit within 24 bits:: |
faeb7833 | 4285 | |
106ee47d | 4286 | #define KVM_HYPERV_CONN_ID_MASK 0x00ffffff |
faeb7833 | 4287 | |
106ee47d | 4288 | The acceptable values for the flags field are:: |
faeb7833 | 4289 | |
106ee47d | 4290 | #define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0) |
faeb7833 | 4291 | |
106ee47d MCC |
4292 | :Returns: 0 on success, |
4293 | -EINVAL if conn_id or flags is outside the allowed range, | |
4294 | -ENOENT on deassign if the conn_id isn't registered, | |
4295 | -EEXIST on assign if the conn_id is already registered | |
faeb7833 | 4296 | |
8fcc4b59 | 4297 | 4.114 KVM_GET_NESTED_STATE |
106ee47d MCC |
4298 | -------------------------- |
4299 | ||
4300 | :Capability: KVM_CAP_NESTED_STATE | |
4301 | :Architectures: x86 | |
4302 | :Type: vcpu ioctl | |
4303 | :Parameters: struct kvm_nested_state (in/out) | |
4304 | :Returns: 0 on success, -1 on error | |
8fcc4b59 | 4305 | |
8fcc4b59 | 4306 | Errors: |
106ee47d MCC |
4307 | |
4308 | ===== ============================================================= | |
4309 | E2BIG the total state size exceeds the value of 'size' specified by | |
8fcc4b59 | 4310 | the user; the size required will be written into size. |
106ee47d | 4311 | ===== ============================================================= |
8fcc4b59 | 4312 | |
106ee47d MCC |
4313 | :: |
4314 | ||
4315 | struct kvm_nested_state { | |
8fcc4b59 JM |
4316 | __u16 flags; |
4317 | __u16 format; | |
4318 | __u32 size; | |
6ca00dfa | 4319 | |
8fcc4b59 | 4320 | union { |
6ca00dfa LA |
4321 | struct kvm_vmx_nested_state_hdr vmx; |
4322 | struct kvm_svm_nested_state_hdr svm; | |
4323 | ||
4324 | /* Pad the header to 128 bytes. */ | |
8fcc4b59 | 4325 | __u8 pad[120]; |
6ca00dfa LA |
4326 | } hdr; |
4327 | ||
4328 | union { | |
4329 | struct kvm_vmx_nested_state_data vmx[0]; | |
4330 | struct kvm_svm_nested_state_data svm[0]; | |
4331 | } data; | |
106ee47d | 4332 | }; |
8fcc4b59 | 4333 | |
106ee47d MCC |
4334 | #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 |
4335 | #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 | |
4336 | #define KVM_STATE_NESTED_EVMCS 0x00000004 | |
8fcc4b59 | 4337 | |
106ee47d MCC |
4338 | #define KVM_STATE_NESTED_FORMAT_VMX 0 |
4339 | #define KVM_STATE_NESTED_FORMAT_SVM 1 | |
8fcc4b59 | 4340 | |
106ee47d | 4341 | #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 |
6ca00dfa | 4342 | |
106ee47d MCC |
4343 | #define KVM_STATE_NESTED_VMX_SMM_GUEST_MODE 0x00000001 |
4344 | #define KVM_STATE_NESTED_VMX_SMM_VMXON 0x00000002 | |
6ca00dfa | 4345 | |
850448f3 PS |
4346 | #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 |
4347 | ||
106ee47d | 4348 | struct kvm_vmx_nested_state_hdr { |
8fcc4b59 | 4349 | __u64 vmxon_pa; |
6ca00dfa | 4350 | __u64 vmcs12_pa; |
8fcc4b59 JM |
4351 | |
4352 | struct { | |
4353 | __u16 flags; | |
4354 | } smm; | |
83d31e52 PB |
4355 | |
4356 | __u32 flags; | |
4357 | __u64 preemption_timer_deadline; | |
106ee47d | 4358 | }; |
8fcc4b59 | 4359 | |
106ee47d | 4360 | struct kvm_vmx_nested_state_data { |
6ca00dfa LA |
4361 | __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; |
4362 | __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; | |
106ee47d | 4363 | }; |
6ca00dfa | 4364 | |
8fcc4b59 JM |
4365 | This ioctl copies the vcpu's nested virtualization state from the kernel to |
4366 | userspace. | |
4367 | ||
6ca00dfa LA |
4368 | The maximum size of the state can be retrieved by passing KVM_CAP_NESTED_STATE |
4369 | to the KVM_CHECK_EXTENSION ioctl(). | |
8fcc4b59 JM |
4370 | |
4371 | 4.115 KVM_SET_NESTED_STATE | |
106ee47d | 4372 | -------------------------- |
8fcc4b59 | 4373 | |
106ee47d MCC |
4374 | :Capability: KVM_CAP_NESTED_STATE |
4375 | :Architectures: x86 | |
4376 | :Type: vcpu ioctl | |
4377 | :Parameters: struct kvm_nested_state (in) | |
4378 | :Returns: 0 on success, -1 on error | |
8fcc4b59 | 4379 | |
6ca00dfa LA |
4380 | This copies the vcpu's kvm_nested_state struct from userspace to the kernel. |
4381 | For the definition of struct kvm_nested_state, see KVM_GET_NESTED_STATE. | |
7bf14c28 | 4382 | |
9943450b | 4383 | 4.116 KVM_(UN)REGISTER_COALESCED_MMIO |
106ee47d | 4384 | ------------------------------------- |
9943450b | 4385 | |
106ee47d MCC |
4386 | :Capability: KVM_CAP_COALESCED_MMIO (for coalesced mmio) |
4387 | KVM_CAP_COALESCED_PIO (for coalesced pio) | |
4388 | :Architectures: all | |
4389 | :Type: vm ioctl | |
4390 | :Parameters: struct kvm_coalesced_mmio_zone | |
4391 | :Returns: 0 on success, < 0 on error | |
9943450b | 4392 | |
0804c849 | 4393 | Coalesced I/O is a performance optimization that defers hardware |
9943450b PH |
4394 | register write emulation so that userspace exits are avoided. It is |
4395 | typically used to reduce the overhead of emulating frequently accessed | |
4396 | hardware registers. | |
4397 | ||
0804c849 | 4398 | When a hardware register is configured for coalesced I/O, write accesses |
9943450b PH |
4399 | do not exit to userspace and their value is recorded in a ring buffer |
4400 | that is shared between kernel and userspace. | |
4401 | ||
0804c849 | 4402 | Coalesced I/O is used if one or more write accesses to a hardware |
9943450b PH |
4403 | register can be deferred until a read or a write to another hardware |
4404 | register on the same device. This last access will cause a vmexit and | |
4405 | userspace will process accesses from the ring buffer before emulating | |
0804c849 PH |
4406 | it. That will avoid exiting to userspace on repeated writes. |
4407 | ||
4408 | Coalesced pio is based on coalesced mmio. There is little difference | |
4409 | between coalesced mmio and pio except that coalesced pio records accesses | |
4410 | to I/O ports. | |
9943450b | 4411 | |
2a31b9db | 4412 | 4.117 KVM_CLEAR_DIRTY_LOG (vm ioctl) |
106ee47d MCC |
4413 | ------------------------------------ |
4414 | ||
4415 | :Capability: KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 | |
4416 | :Architectures: x86, arm, arm64, mips | |
4417 | :Type: vm ioctl | |
4418 | :Parameters: struct kvm_dirty_log (in) | |
4419 | :Returns: 0 on success, -1 on error | |
2a31b9db | 4420 | |
106ee47d | 4421 | :: |
2a31b9db | 4422 | |
106ee47d MCC |
4423 | /* for KVM_CLEAR_DIRTY_LOG */ |
4424 | struct kvm_clear_dirty_log { | |
2a31b9db PB |
4425 | __u32 slot; |
4426 | __u32 num_pages; | |
4427 | __u64 first_page; | |
4428 | union { | |
4429 | void __user *dirty_bitmap; /* one bit per page */ | |
4430 | __u64 padding; | |
4431 | }; | |
106ee47d | 4432 | }; |
2a31b9db PB |
4433 | |
4434 | The ioctl clears the dirty status of pages in a memory slot, according to | |
4435 | the bitmap that is passed in struct kvm_clear_dirty_log's dirty_bitmap | |
4436 | field. Bit 0 of the bitmap corresponds to page "first_page" in the | |
4437 | memory slot, and num_pages is the size in bits of the input bitmap. | |
76d58e0f PB |
4438 | first_page must be a multiple of 64; num_pages must also be a multiple of |
4439 | 64 unless first_page + num_pages is the size of the memory slot. For each | |
4440 | bit that is set in the input bitmap, the corresponding page is marked "clean" | |
2a31b9db PB |
4441 | in KVM's dirty bitmap, and dirty tracking is re-enabled for that page |
4442 | (for example via write-protection, or by clearing the dirty bit in | |
4443 | a page table entry). | |
4444 | ||
4445 | If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 specifies | |
4446 | the address space for which you want to return the dirty bitmap. | |
4447 | They must be less than the value that KVM_CHECK_EXTENSION returns for | |
4448 | the KVM_CAP_MULTI_ADDRESS_SPACE capability. | |
4449 | ||
d7547c55 | 4450 | This ioctl is mostly useful when KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 |
2a31b9db PB |
4451 | is enabled; for more information, see the description of the capability. |
4452 | However, it can always be used as long as KVM_CHECK_EXTENSION confirms | |
d7547c55 | 4453 | that KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 is present. |
2a31b9db | 4454 | |
2bc39970 | 4455 | 4.118 KVM_GET_SUPPORTED_HV_CPUID |
106ee47d | 4456 | -------------------------------- |
2bc39970 | 4457 | |
106ee47d MCC |
4458 | :Capability: KVM_CAP_HYPERV_CPUID |
4459 | :Architectures: x86 | |
4460 | :Type: vcpu ioctl | |
4461 | :Parameters: struct kvm_cpuid2 (in/out) | |
4462 | :Returns: 0 on success, -1 on error | |
4463 | ||
4464 | :: | |
2bc39970 | 4465 | |
106ee47d | 4466 | struct kvm_cpuid2 { |
2bc39970 VK |
4467 | __u32 nent; |
4468 | __u32 padding; | |
4469 | struct kvm_cpuid_entry2 entries[0]; | |
106ee47d | 4470 | }; |
2bc39970 | 4471 | |
106ee47d | 4472 | struct kvm_cpuid_entry2 { |
2bc39970 VK |
4473 | __u32 function; |
4474 | __u32 index; | |
4475 | __u32 flags; | |
4476 | __u32 eax; | |
4477 | __u32 ebx; | |
4478 | __u32 ecx; | |
4479 | __u32 edx; | |
4480 | __u32 padding[3]; | |
106ee47d | 4481 | }; |
2bc39970 VK |
4482 | |
4483 | This ioctl returns x86 cpuid features leaves related to Hyper-V emulation in | |
4484 | KVM. Userspace can use the information returned by this ioctl to construct | |
4485 | cpuid information presented to guests consuming Hyper-V enlightenments (e.g. | |
4486 | Windows or Hyper-V guests). | |
4487 | ||
4488 | CPUID feature leaves returned by this ioctl are defined by Hyper-V Top Level | |
4489 | Functional Specification (TLFS). These leaves can't be obtained with | |
4490 | KVM_GET_SUPPORTED_CPUID ioctl because some of them intersect with KVM feature | |
4491 | leaves (0x40000000, 0x40000001). | |
4492 | ||
4493 | Currently, the following list of CPUID leaves are returned: | |
106ee47d MCC |
4494 | - HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS |
4495 | - HYPERV_CPUID_INTERFACE | |
4496 | - HYPERV_CPUID_VERSION | |
4497 | - HYPERV_CPUID_FEATURES | |
4498 | - HYPERV_CPUID_ENLIGHTMENT_INFO | |
4499 | - HYPERV_CPUID_IMPLEMENT_LIMITS | |
4500 | - HYPERV_CPUID_NESTED_FEATURES | |
b44f50d8 VK |
4501 | - HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS |
4502 | - HYPERV_CPUID_SYNDBG_INTERFACE | |
4503 | - HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES | |
2bc39970 VK |
4504 | |
4505 | HYPERV_CPUID_NESTED_FEATURES leaf is only exposed when Enlightened VMCS was | |
4506 | enabled on the corresponding vCPU (KVM_CAP_HYPERV_ENLIGHTENED_VMCS). | |
4507 | ||
b44f50d8 | 4508 | Userspace invokes KVM_GET_SUPPORTED_HV_CPUID by passing a kvm_cpuid2 structure |
2bc39970 VK |
4509 | with the 'nent' field indicating the number of entries in the variable-size |
4510 | array 'entries'. If the number of entries is too low to describe all Hyper-V | |
4511 | feature leaves, an error (E2BIG) is returned. If the number is more or equal | |
4512 | to the number of Hyper-V feature leaves, the 'nent' field is adjusted to the | |
4513 | number of valid entries in the 'entries' array, which is then filled. | |
4514 | ||
4515 | 'index' and 'flags' fields in 'struct kvm_cpuid_entry2' are currently reserved, | |
4516 | userspace should not expect to get any particular value there. | |
2a31b9db | 4517 | |
50036ad0 | 4518 | 4.119 KVM_ARM_VCPU_FINALIZE |
106ee47d MCC |
4519 | --------------------------- |
4520 | ||
4521 | :Architectures: arm, arm64 | |
4522 | :Type: vcpu ioctl | |
4523 | :Parameters: int feature (in) | |
4524 | :Returns: 0 on success, -1 on error | |
50036ad0 | 4525 | |
50036ad0 | 4526 | Errors: |
106ee47d MCC |
4527 | |
4528 | ====== ============================================================== | |
4529 | EPERM feature not enabled, needs configuration, or already finalized | |
4530 | EINVAL feature unknown or not present | |
4531 | ====== ============================================================== | |
50036ad0 DM |
4532 | |
4533 | Recognised values for feature: | |
106ee47d MCC |
4534 | |
4535 | ===== =========================================== | |
9df2d660 | 4536 | arm64 KVM_ARM_VCPU_SVE (requires KVM_CAP_ARM_SVE) |
106ee47d | 4537 | ===== =========================================== |
50036ad0 DM |
4538 | |
4539 | Finalizes the configuration of the specified vcpu feature. | |
4540 | ||
4541 | The vcpu must already have been initialised, enabling the affected feature, by | |
4542 | means of a successful KVM_ARM_VCPU_INIT call with the appropriate flag set in | |
4543 | features[]. | |
4544 | ||
4545 | For affected vcpu features, this is a mandatory step that must be performed | |
4546 | before the vcpu is fully usable. | |
4547 | ||
4548 | Between KVM_ARM_VCPU_INIT and KVM_ARM_VCPU_FINALIZE, the feature may be | |
4549 | configured by use of ioctls such as KVM_SET_ONE_REG. The exact configuration | |
4550 | that should be performaned and how to do it are feature-dependent. | |
4551 | ||
4552 | Other calls that depend on a particular feature being finalized, such as | |
4553 | KVM_RUN, KVM_GET_REG_LIST, KVM_GET_ONE_REG and KVM_SET_ONE_REG, will fail with | |
4554 | -EPERM unless the feature has already been finalized by means of a | |
4555 | KVM_ARM_VCPU_FINALIZE call. | |
4556 | ||
4557 | See KVM_ARM_VCPU_INIT for details of vcpu features that require finalization | |
4558 | using this ioctl. | |
4559 | ||
66bb8a06 | 4560 | 4.120 KVM_SET_PMU_EVENT_FILTER |
106ee47d | 4561 | ------------------------------ |
66bb8a06 | 4562 | |
106ee47d MCC |
4563 | :Capability: KVM_CAP_PMU_EVENT_FILTER |
4564 | :Architectures: x86 | |
4565 | :Type: vm ioctl | |
4566 | :Parameters: struct kvm_pmu_event_filter (in) | |
4567 | :Returns: 0 on success, -1 on error | |
66bb8a06 | 4568 | |
106ee47d MCC |
4569 | :: |
4570 | ||
4571 | struct kvm_pmu_event_filter { | |
30cd8604 EH |
4572 | __u32 action; |
4573 | __u32 nevents; | |
4574 | __u32 fixed_counter_bitmap; | |
4575 | __u32 flags; | |
4576 | __u32 pad[4]; | |
4577 | __u64 events[0]; | |
106ee47d | 4578 | }; |
66bb8a06 EH |
4579 | |
4580 | This ioctl restricts the set of PMU events that the guest can program. | |
4581 | The argument holds a list of events which will be allowed or denied. | |
4582 | The eventsel+umask of each event the guest attempts to program is compared | |
4583 | against the events field to determine whether the guest should have access. | |
30cd8604 EH |
4584 | The events field only controls general purpose counters; fixed purpose |
4585 | counters are controlled by the fixed_counter_bitmap. | |
4586 | ||
4587 | No flags are defined yet, the field must be zero. | |
66bb8a06 | 4588 | |
106ee47d MCC |
4589 | Valid values for 'action':: |
4590 | ||
4591 | #define KVM_PMU_EVENT_ALLOW 0 | |
4592 | #define KVM_PMU_EVENT_DENY 1 | |
66bb8a06 | 4593 | |
22945688 | 4594 | 4.121 KVM_PPC_SVM_OFF |
106ee47d MCC |
4595 | --------------------- |
4596 | ||
4597 | :Capability: basic | |
4598 | :Architectures: powerpc | |
4599 | :Type: vm ioctl | |
4600 | :Parameters: none | |
4601 | :Returns: 0 on successful completion, | |
22945688 | 4602 | |
22945688 | 4603 | Errors: |
106ee47d MCC |
4604 | |
4605 | ====== ================================================================ | |
4606 | EINVAL if ultravisor failed to terminate the secure guest | |
4607 | ENOMEM if hypervisor failed to allocate new radix page tables for guest | |
4608 | ====== ================================================================ | |
22945688 BR |
4609 | |
4610 | This ioctl is used to turn off the secure mode of the guest or transition | |
4611 | the guest from secure mode to normal mode. This is invoked when the guest | |
4612 | is reset. This has no effect if called for a normal guest. | |
4613 | ||
4614 | This ioctl issues an ultravisor call to terminate the secure guest, | |
4615 | unpins the VPA pages and releases all the device pages that are used to | |
4616 | track the secure pages by hypervisor. | |
66bb8a06 | 4617 | |
7de3f142 | 4618 | 4.122 KVM_S390_NORMAL_RESET |
a93236fc | 4619 | --------------------------- |
7de3f142 | 4620 | |
a93236fc CB |
4621 | :Capability: KVM_CAP_S390_VCPU_RESETS |
4622 | :Architectures: s390 | |
4623 | :Type: vcpu ioctl | |
4624 | :Parameters: none | |
4625 | :Returns: 0 | |
7de3f142 JF |
4626 | |
4627 | This ioctl resets VCPU registers and control structures according to | |
4628 | the cpu reset definition in the POP (Principles Of Operation). | |
4629 | ||
4630 | 4.123 KVM_S390_INITIAL_RESET | |
a93236fc | 4631 | ---------------------------- |
7de3f142 | 4632 | |
a93236fc CB |
4633 | :Capability: none |
4634 | :Architectures: s390 | |
4635 | :Type: vcpu ioctl | |
4636 | :Parameters: none | |
4637 | :Returns: 0 | |
7de3f142 JF |
4638 | |
4639 | This ioctl resets VCPU registers and control structures according to | |
4640 | the initial cpu reset definition in the POP. However, the cpu is not | |
4641 | put into ESA mode. This reset is a superset of the normal reset. | |
4642 | ||
4643 | 4.124 KVM_S390_CLEAR_RESET | |
a93236fc | 4644 | -------------------------- |
7de3f142 | 4645 | |
a93236fc CB |
4646 | :Capability: KVM_CAP_S390_VCPU_RESETS |
4647 | :Architectures: s390 | |
4648 | :Type: vcpu ioctl | |
4649 | :Parameters: none | |
4650 | :Returns: 0 | |
7de3f142 JF |
4651 | |
4652 | This ioctl resets VCPU registers and control structures according to | |
4653 | the clear cpu reset definition in the POP. However, the cpu is not put | |
4654 | into ESA mode. This reset is a superset of the initial reset. | |
4655 | ||
4656 | ||
04ed89dc JF |
4657 | 4.125 KVM_S390_PV_COMMAND |
4658 | ------------------------- | |
4659 | ||
4660 | :Capability: KVM_CAP_S390_PROTECTED | |
4661 | :Architectures: s390 | |
4662 | :Type: vm ioctl | |
4663 | :Parameters: struct kvm_pv_cmd | |
4664 | :Returns: 0 on success, < 0 on error | |
4665 | ||
4666 | :: | |
4667 | ||
4668 | struct kvm_pv_cmd { | |
4669 | __u32 cmd; /* Command to be executed */ | |
4670 | __u16 rc; /* Ultravisor return code */ | |
4671 | __u16 rrc; /* Ultravisor return reason code */ | |
4672 | __u64 data; /* Data or address */ | |
4673 | __u32 flags; /* flags for future extensions. Must be 0 for now */ | |
4674 | __u32 reserved[3]; | |
4675 | }; | |
4676 | ||
4677 | cmd values: | |
4678 | ||
4679 | KVM_PV_ENABLE | |
4680 | Allocate memory and register the VM with the Ultravisor, thereby | |
4681 | donating memory to the Ultravisor that will become inaccessible to | |
4682 | KVM. All existing CPUs are converted to protected ones. After this | |
4683 | command has succeeded, any CPU added via hotplug will become | |
4684 | protected during its creation as well. | |
4685 | ||
7a265361 CB |
4686 | Errors: |
4687 | ||
4688 | ===== ============================= | |
4689 | EINTR an unmasked signal is pending | |
4690 | ===== ============================= | |
4691 | ||
04ed89dc JF |
4692 | KVM_PV_DISABLE |
4693 | ||
4694 | Deregister the VM from the Ultravisor and reclaim the memory that | |
4695 | had been donated to the Ultravisor, making it usable by the kernel | |
4696 | again. All registered VCPUs are converted back to non-protected | |
4697 | ones. | |
4698 | ||
4699 | KVM_PV_VM_SET_SEC_PARMS | |
4700 | Pass the image header from VM memory to the Ultravisor in | |
4701 | preparation of image unpacking and verification. | |
4702 | ||
4703 | KVM_PV_VM_UNPACK | |
4704 | Unpack (protect and decrypt) a page of the encrypted boot image. | |
4705 | ||
4706 | KVM_PV_VM_VERIFY | |
4707 | Verify the integrity of the unpacked image. Only if this succeeds, | |
4708 | KVM is allowed to start protected VCPUs. | |
4709 | ||
1a155254 AG |
4710 | 4.126 KVM_X86_SET_MSR_FILTER |
4711 | ---------------------------- | |
4712 | ||
4713 | :Capability: KVM_X86_SET_MSR_FILTER | |
4714 | :Architectures: x86 | |
4715 | :Type: vm ioctl | |
4716 | :Parameters: struct kvm_msr_filter | |
4717 | :Returns: 0 on success, < 0 on error | |
4718 | ||
4719 | :: | |
4720 | ||
4721 | struct kvm_msr_filter_range { | |
4722 | #define KVM_MSR_FILTER_READ (1 << 0) | |
4723 | #define KVM_MSR_FILTER_WRITE (1 << 1) | |
4724 | __u32 flags; | |
4725 | __u32 nmsrs; /* number of msrs in bitmap */ | |
4726 | __u32 base; /* MSR index the bitmap starts at */ | |
4727 | __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */ | |
4728 | }; | |
4729 | ||
4730 | #define KVM_MSR_FILTER_MAX_RANGES 16 | |
4731 | struct kvm_msr_filter { | |
4732 | #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0) | |
4733 | #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0) | |
4734 | __u32 flags; | |
4735 | struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES]; | |
4736 | }; | |
4737 | ||
9389b9d5 | 4738 | flags values for ``struct kvm_msr_filter_range``: |
1a155254 | 4739 | |
9389b9d5 | 4740 | ``KVM_MSR_FILTER_READ`` |
1a155254 AG |
4741 | |
4742 | Filter read accesses to MSRs using the given bitmap. A 0 in the bitmap | |
4743 | indicates that a read should immediately fail, while a 1 indicates that | |
4744 | a read for a particular MSR should be handled regardless of the default | |
4745 | filter action. | |
4746 | ||
9389b9d5 | 4747 | ``KVM_MSR_FILTER_WRITE`` |
1a155254 AG |
4748 | |
4749 | Filter write accesses to MSRs using the given bitmap. A 0 in the bitmap | |
4750 | indicates that a write should immediately fail, while a 1 indicates that | |
4751 | a write for a particular MSR should be handled regardless of the default | |
4752 | filter action. | |
4753 | ||
9389b9d5 | 4754 | ``KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE`` |
1a155254 AG |
4755 | |
4756 | Filter both read and write accesses to MSRs using the given bitmap. A 0 | |
4757 | in the bitmap indicates that both reads and writes should immediately fail, | |
4758 | while a 1 indicates that reads and writes for a particular MSR are not | |
4759 | filtered by this range. | |
4760 | ||
9389b9d5 | 4761 | flags values for ``struct kvm_msr_filter``: |
1a155254 | 4762 | |
9389b9d5 | 4763 | ``KVM_MSR_FILTER_DEFAULT_ALLOW`` |
1a155254 AG |
4764 | |
4765 | If no filter range matches an MSR index that is getting accessed, KVM will | |
4766 | fall back to allowing access to the MSR. | |
4767 | ||
9389b9d5 | 4768 | ``KVM_MSR_FILTER_DEFAULT_DENY`` |
1a155254 AG |
4769 | |
4770 | If no filter range matches an MSR index that is getting accessed, KVM will | |
4771 | fall back to rejecting access to the MSR. In this mode, all MSRs that should | |
4772 | be processed by KVM need to explicitly be marked as allowed in the bitmaps. | |
4773 | ||
4774 | This ioctl allows user space to define up to 16 bitmaps of MSR ranges to | |
4775 | specify whether a certain MSR access should be explicitly filtered for or not. | |
4776 | ||
4777 | If this ioctl has never been invoked, MSR accesses are not guarded and the | |
9389b9d5 | 4778 | default KVM in-kernel emulation behavior is fully preserved. |
1a155254 | 4779 | |
043248b3 PB |
4780 | Calling this ioctl with an empty set of ranges (all nmsrs == 0) disables MSR |
4781 | filtering. In that mode, ``KVM_MSR_FILTER_DEFAULT_DENY`` is invalid and causes | |
4782 | an error. | |
4783 | ||
1a155254 | 4784 | As soon as the filtering is in place, every MSR access is processed through |
9389b9d5 SC |
4785 | the filtering except for accesses to the x2APIC MSRs (from 0x800 to 0x8ff); |
4786 | x2APIC MSRs are always allowed, independent of the ``default_allow`` setting, | |
4787 | and their behavior depends on the ``X2APIC_ENABLE`` bit of the APIC base | |
4788 | register. | |
4789 | ||
043248b3 PB |
4790 | If a bit is within one of the defined ranges, read and write accesses are |
4791 | guarded by the bitmap's value for the MSR index if the kind of access | |
4792 | is included in the ``struct kvm_msr_filter_range`` flags. If no range | |
4793 | cover this particular access, the behavior is determined by the flags | |
4794 | field in the kvm_msr_filter struct: ``KVM_MSR_FILTER_DEFAULT_ALLOW`` | |
4795 | and ``KVM_MSR_FILTER_DEFAULT_DENY``. | |
1a155254 AG |
4796 | |
4797 | Each bitmap range specifies a range of MSRs to potentially allow access on. | |
4798 | The range goes from MSR index [base .. base+nmsrs]. The flags field | |
4799 | indicates whether reads, writes or both reads and writes are filtered | |
4800 | by setting a 1 bit in the bitmap for the corresponding MSR index. | |
4801 | ||
4802 | If an MSR access is not permitted through the filtering, it generates a | |
4803 | #GP inside the guest. When combined with KVM_CAP_X86_USER_SPACE_MSR, that | |
4804 | allows user space to deflect and potentially handle various MSR accesses | |
4805 | into user space. | |
4806 | ||
4807 | If a vCPU is in running state while this ioctl is invoked, the vCPU may | |
4808 | experience inconsistent filtering behavior on MSR accesses. | |
4809 | ||
04ed89dc | 4810 | |
9c1b96e3 | 4811 | 5. The kvm_run structure |
106ee47d | 4812 | ======================== |
9c1b96e3 AK |
4813 | |
4814 | Application code obtains a pointer to the kvm_run structure by | |
4815 | mmap()ing a vcpu fd. From that point, application code can control | |
4816 | execution by changing fields in kvm_run prior to calling the KVM_RUN | |
4817 | ioctl, and obtain information about the reason KVM_RUN returned by | |
4818 | looking up structure members. | |
4819 | ||
106ee47d MCC |
4820 | :: |
4821 | ||
4822 | struct kvm_run { | |
9c1b96e3 AK |
4823 | /* in */ |
4824 | __u8 request_interrupt_window; | |
4825 | ||
4826 | Request that KVM_RUN return when it becomes possible to inject external | |
4827 | interrupts into the guest. Useful in conjunction with KVM_INTERRUPT. | |
4828 | ||
106ee47d MCC |
4829 | :: |
4830 | ||
460df4c1 PB |
4831 | __u8 immediate_exit; |
4832 | ||
4833 | This field is polled once when KVM_RUN starts; if non-zero, KVM_RUN | |
4834 | exits immediately, returning -EINTR. In the common scenario where a | |
4835 | signal is used to "kick" a VCPU out of KVM_RUN, this field can be used | |
4836 | to avoid usage of KVM_SET_SIGNAL_MASK, which has worse scalability. | |
4837 | Rather than blocking the signal outside KVM_RUN, userspace can set up | |
4838 | a signal handler that sets run->immediate_exit to a non-zero value. | |
4839 | ||
4840 | This field is ignored if KVM_CAP_IMMEDIATE_EXIT is not available. | |
4841 | ||
106ee47d MCC |
4842 | :: |
4843 | ||
460df4c1 | 4844 | __u8 padding1[6]; |
9c1b96e3 AK |
4845 | |
4846 | /* out */ | |
4847 | __u32 exit_reason; | |
4848 | ||
4849 | When KVM_RUN has returned successfully (return value 0), this informs | |
4850 | application code why KVM_RUN has returned. Allowable values for this | |
4851 | field are detailed below. | |
4852 | ||
106ee47d MCC |
4853 | :: |
4854 | ||
9c1b96e3 AK |
4855 | __u8 ready_for_interrupt_injection; |
4856 | ||
4857 | If request_interrupt_window has been specified, this field indicates | |
4858 | an interrupt can be injected now with KVM_INTERRUPT. | |
4859 | ||
106ee47d MCC |
4860 | :: |
4861 | ||
9c1b96e3 AK |
4862 | __u8 if_flag; |
4863 | ||
4864 | The value of the current interrupt flag. Only valid if in-kernel | |
4865 | local APIC is not used. | |
4866 | ||
106ee47d MCC |
4867 | :: |
4868 | ||
f077825a PB |
4869 | __u16 flags; |
4870 | ||
4871 | More architecture-specific flags detailing state of the VCPU that may | |
4872 | affect the device's behavior. The only currently defined flag is | |
4873 | KVM_RUN_X86_SMM, which is valid on x86 machines and is set if the | |
4874 | VCPU is in system management mode. | |
9c1b96e3 | 4875 | |
106ee47d MCC |
4876 | :: |
4877 | ||
9c1b96e3 AK |
4878 | /* in (pre_kvm_run), out (post_kvm_run) */ |
4879 | __u64 cr8; | |
4880 | ||
4881 | The value of the cr8 register. Only valid if in-kernel local APIC is | |
4882 | not used. Both input and output. | |
4883 | ||
106ee47d MCC |
4884 | :: |
4885 | ||
9c1b96e3 AK |
4886 | __u64 apic_base; |
4887 | ||
4888 | The value of the APIC BASE msr. Only valid if in-kernel local | |
4889 | APIC is not used. Both input and output. | |
4890 | ||
106ee47d MCC |
4891 | :: |
4892 | ||
9c1b96e3 AK |
4893 | union { |
4894 | /* KVM_EXIT_UNKNOWN */ | |
4895 | struct { | |
4896 | __u64 hardware_exit_reason; | |
4897 | } hw; | |
4898 | ||
4899 | If exit_reason is KVM_EXIT_UNKNOWN, the vcpu has exited due to unknown | |
4900 | reasons. Further architecture-specific information is available in | |
4901 | hardware_exit_reason. | |
4902 | ||
106ee47d MCC |
4903 | :: |
4904 | ||
9c1b96e3 AK |
4905 | /* KVM_EXIT_FAIL_ENTRY */ |
4906 | struct { | |
4907 | __u64 hardware_entry_failure_reason; | |
1aa561b1 | 4908 | __u32 cpu; /* if KVM_LAST_CPU */ |
9c1b96e3 AK |
4909 | } fail_entry; |
4910 | ||
4911 | If exit_reason is KVM_EXIT_FAIL_ENTRY, the vcpu could not be run due | |
4912 | to unknown reasons. Further architecture-specific information is | |
4913 | available in hardware_entry_failure_reason. | |
4914 | ||
106ee47d MCC |
4915 | :: |
4916 | ||
9c1b96e3 AK |
4917 | /* KVM_EXIT_EXCEPTION */ |
4918 | struct { | |
4919 | __u32 exception; | |
4920 | __u32 error_code; | |
4921 | } ex; | |
4922 | ||
4923 | Unused. | |
4924 | ||
106ee47d MCC |
4925 | :: |
4926 | ||
9c1b96e3 AK |
4927 | /* KVM_EXIT_IO */ |
4928 | struct { | |
106ee47d MCC |
4929 | #define KVM_EXIT_IO_IN 0 |
4930 | #define KVM_EXIT_IO_OUT 1 | |
9c1b96e3 AK |
4931 | __u8 direction; |
4932 | __u8 size; /* bytes */ | |
4933 | __u16 port; | |
4934 | __u32 count; | |
4935 | __u64 data_offset; /* relative to kvm_run start */ | |
4936 | } io; | |
4937 | ||
2044892d | 4938 | If exit_reason is KVM_EXIT_IO, then the vcpu has |
9c1b96e3 AK |
4939 | executed a port I/O instruction which could not be satisfied by kvm. |
4940 | data_offset describes where the data is located (KVM_EXIT_IO_OUT) or | |
4941 | where kvm expects application code to place the data for the next | |
2044892d | 4942 | KVM_RUN invocation (KVM_EXIT_IO_IN). Data format is a packed array. |
9c1b96e3 | 4943 | |
106ee47d MCC |
4944 | :: |
4945 | ||
8ab30c15 | 4946 | /* KVM_EXIT_DEBUG */ |
9c1b96e3 AK |
4947 | struct { |
4948 | struct kvm_debug_exit_arch arch; | |
4949 | } debug; | |
4950 | ||
8ab30c15 AB |
4951 | If the exit_reason is KVM_EXIT_DEBUG, then a vcpu is processing a debug event |
4952 | for which architecture specific information is returned. | |
9c1b96e3 | 4953 | |
106ee47d MCC |
4954 | :: |
4955 | ||
9c1b96e3 AK |
4956 | /* KVM_EXIT_MMIO */ |
4957 | struct { | |
4958 | __u64 phys_addr; | |
4959 | __u8 data[8]; | |
4960 | __u32 len; | |
4961 | __u8 is_write; | |
4962 | } mmio; | |
4963 | ||
2044892d | 4964 | If exit_reason is KVM_EXIT_MMIO, then the vcpu has |
9c1b96e3 AK |
4965 | executed a memory-mapped I/O instruction which could not be satisfied |
4966 | by kvm. The 'data' member contains the written data if 'is_write' is | |
4967 | true, and should be filled by application code otherwise. | |
4968 | ||
6acdb160 CD |
4969 | The 'data' member contains, in its first 'len' bytes, the value as it would |
4970 | appear if the VCPU performed a load or store of the appropriate width directly | |
4971 | to the byte array. | |
4972 | ||
106ee47d MCC |
4973 | .. note:: |
4974 | ||
1ae09954 AG |
4975 | For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, |
4976 | KVM_EXIT_EPR, KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR the corresponding | |
4977 | operations are complete (and guest state is consistent) only after userspace | |
4978 | has re-entered the kernel with KVM_RUN. The kernel side will first finish | |
4979 | incomplete operations and then check for pending signals. Userspace | |
4980 | can re-enter the guest with an unmasked signal pending to complete | |
4981 | pending operations. | |
67961344 | 4982 | |
106ee47d MCC |
4983 | :: |
4984 | ||
9c1b96e3 AK |
4985 | /* KVM_EXIT_HYPERCALL */ |
4986 | struct { | |
4987 | __u64 nr; | |
4988 | __u64 args[6]; | |
4989 | __u64 ret; | |
4990 | __u32 longmode; | |
4991 | __u32 pad; | |
4992 | } hypercall; | |
4993 | ||
647dc49e AK |
4994 | Unused. This was once used for 'hypercall to userspace'. To implement |
4995 | such functionality, use KVM_EXIT_IO (x86) or KVM_EXIT_MMIO (all except s390). | |
106ee47d MCC |
4996 | |
4997 | .. note:: KVM_EXIT_IO is significantly faster than KVM_EXIT_MMIO. | |
4998 | ||
4999 | :: | |
9c1b96e3 AK |
5000 | |
5001 | /* KVM_EXIT_TPR_ACCESS */ | |
5002 | struct { | |
5003 | __u64 rip; | |
5004 | __u32 is_write; | |
5005 | __u32 pad; | |
5006 | } tpr_access; | |
5007 | ||
5008 | To be documented (KVM_TPR_ACCESS_REPORTING). | |
5009 | ||
106ee47d MCC |
5010 | :: |
5011 | ||
9c1b96e3 AK |
5012 | /* KVM_EXIT_S390_SIEIC */ |
5013 | struct { | |
5014 | __u8 icptcode; | |
5015 | __u64 mask; /* psw upper half */ | |
5016 | __u64 addr; /* psw lower half */ | |
5017 | __u16 ipa; | |
5018 | __u32 ipb; | |
5019 | } s390_sieic; | |
5020 | ||
5021 | s390 specific. | |
5022 | ||
106ee47d MCC |
5023 | :: |
5024 | ||
9c1b96e3 | 5025 | /* KVM_EXIT_S390_RESET */ |
106ee47d MCC |
5026 | #define KVM_S390_RESET_POR 1 |
5027 | #define KVM_S390_RESET_CLEAR 2 | |
5028 | #define KVM_S390_RESET_SUBSYSTEM 4 | |
5029 | #define KVM_S390_RESET_CPU_INIT 8 | |
5030 | #define KVM_S390_RESET_IPL 16 | |
9c1b96e3 AK |
5031 | __u64 s390_reset_flags; |
5032 | ||
5033 | s390 specific. | |
5034 | ||
106ee47d MCC |
5035 | :: |
5036 | ||
e168bf8d CO |
5037 | /* KVM_EXIT_S390_UCONTROL */ |
5038 | struct { | |
5039 | __u64 trans_exc_code; | |
5040 | __u32 pgm_code; | |
5041 | } s390_ucontrol; | |
5042 | ||
5043 | s390 specific. A page fault has occurred for a user controlled virtual | |
5044 | machine (KVM_VM_S390_UNCONTROL) on it's host page table that cannot be | |
5045 | resolved by the kernel. | |
5046 | The program code and the translation exception code that were placed | |
5047 | in the cpu's lowcore are presented here as defined by the z Architecture | |
5048 | Principles of Operation Book in the Chapter for Dynamic Address Translation | |
5049 | (DAT) | |
5050 | ||
106ee47d MCC |
5051 | :: |
5052 | ||
9c1b96e3 AK |
5053 | /* KVM_EXIT_DCR */ |
5054 | struct { | |
5055 | __u32 dcrn; | |
5056 | __u32 data; | |
5057 | __u8 is_write; | |
5058 | } dcr; | |
5059 | ||
ce91ddc4 | 5060 | Deprecated - was used for 440 KVM. |
9c1b96e3 | 5061 | |
106ee47d MCC |
5062 | :: |
5063 | ||
ad0a048b AG |
5064 | /* KVM_EXIT_OSI */ |
5065 | struct { | |
5066 | __u64 gprs[32]; | |
5067 | } osi; | |
5068 | ||
5069 | MOL uses a special hypercall interface it calls 'OSI'. To enable it, we catch | |
5070 | hypercalls and exit with this exit struct that contains all the guest gprs. | |
5071 | ||
5072 | If exit_reason is KVM_EXIT_OSI, then the vcpu has triggered such a hypercall. | |
5073 | Userspace can now handle the hypercall and when it's done modify the gprs as | |
5074 | necessary. Upon guest entry all guest GPRs will then be replaced by the values | |
5075 | in this struct. | |
5076 | ||
106ee47d MCC |
5077 | :: |
5078 | ||
de56a948 PM |
5079 | /* KVM_EXIT_PAPR_HCALL */ |
5080 | struct { | |
5081 | __u64 nr; | |
5082 | __u64 ret; | |
5083 | __u64 args[9]; | |
5084 | } papr_hcall; | |
5085 | ||
5086 | This is used on 64-bit PowerPC when emulating a pSeries partition, | |
5087 | e.g. with the 'pseries' machine type in qemu. It occurs when the | |
5088 | guest does a hypercall using the 'sc 1' instruction. The 'nr' field | |
5089 | contains the hypercall number (from the guest R3), and 'args' contains | |
5090 | the arguments (from the guest R4 - R12). Userspace should put the | |
5091 | return code in 'ret' and any extra returned values in args[]. | |
5092 | The possible hypercalls are defined in the Power Architecture Platform | |
5093 | Requirements (PAPR) document available from www.power.org (free | |
5094 | developer registration required to access it). | |
5095 | ||
106ee47d MCC |
5096 | :: |
5097 | ||
fa6b7fe9 CH |
5098 | /* KVM_EXIT_S390_TSCH */ |
5099 | struct { | |
5100 | __u16 subchannel_id; | |
5101 | __u16 subchannel_nr; | |
5102 | __u32 io_int_parm; | |
5103 | __u32 io_int_word; | |
5104 | __u32 ipb; | |
5105 | __u8 dequeued; | |
5106 | } s390_tsch; | |
5107 | ||
5108 | s390 specific. This exit occurs when KVM_CAP_S390_CSS_SUPPORT has been enabled | |
5109 | and TEST SUBCHANNEL was intercepted. If dequeued is set, a pending I/O | |
5110 | interrupt for the target subchannel has been dequeued and subchannel_id, | |
5111 | subchannel_nr, io_int_parm and io_int_word contain the parameters for that | |
5112 | interrupt. ipb is needed for instruction parameter decoding. | |
5113 | ||
106ee47d MCC |
5114 | :: |
5115 | ||
1c810636 AG |
5116 | /* KVM_EXIT_EPR */ |
5117 | struct { | |
5118 | __u32 epr; | |
5119 | } epr; | |
5120 | ||
5121 | On FSL BookE PowerPC chips, the interrupt controller has a fast patch | |
5122 | interrupt acknowledge path to the core. When the core successfully | |
5123 | delivers an interrupt, it automatically populates the EPR register with | |
5124 | the interrupt vector number and acknowledges the interrupt inside | |
5125 | the interrupt controller. | |
5126 | ||
5127 | In case the interrupt controller lives in user space, we need to do | |
5128 | the interrupt acknowledge cycle through it to fetch the next to be | |
5129 | delivered interrupt vector using this exit. | |
5130 | ||
5131 | It gets triggered whenever both KVM_CAP_PPC_EPR are enabled and an | |
5132 | external interrupt has just been delivered into the guest. User space | |
5133 | should put the acknowledged interrupt vector into the 'epr' field. | |
5134 | ||
106ee47d MCC |
5135 | :: |
5136 | ||
8ad6b634 AP |
5137 | /* KVM_EXIT_SYSTEM_EVENT */ |
5138 | struct { | |
106ee47d MCC |
5139 | #define KVM_SYSTEM_EVENT_SHUTDOWN 1 |
5140 | #define KVM_SYSTEM_EVENT_RESET 2 | |
5141 | #define KVM_SYSTEM_EVENT_CRASH 3 | |
8ad6b634 AP |
5142 | __u32 type; |
5143 | __u64 flags; | |
5144 | } system_event; | |
5145 | ||
5146 | If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered | |
5147 | a system-level event using some architecture specific mechanism (hypercall | |
5148 | or some special instruction). In case of ARM/ARM64, this is triggered using | |
5149 | HVC instruction based PSCI call from the vcpu. The 'type' field describes | |
5150 | the system-level event type. The 'flags' field describes architecture | |
5151 | specific flags for the system-level event. | |
5152 | ||
cf5d3188 | 5153 | Valid values for 'type' are: |
106ee47d MCC |
5154 | |
5155 | - KVM_SYSTEM_EVENT_SHUTDOWN -- the guest has requested a shutdown of the | |
cf5d3188 CD |
5156 | VM. Userspace is not obliged to honour this, and if it does honour |
5157 | this does not need to destroy the VM synchronously (ie it may call | |
5158 | KVM_RUN again before shutdown finally occurs). | |
106ee47d | 5159 | - KVM_SYSTEM_EVENT_RESET -- the guest has requested a reset of the VM. |
cf5d3188 CD |
5160 | As with SHUTDOWN, userspace can choose to ignore the request, or |
5161 | to schedule the reset to occur in the future and may call KVM_RUN again. | |
106ee47d | 5162 | - KVM_SYSTEM_EVENT_CRASH -- the guest crash occurred and the guest |
2ce79189 AS |
5163 | has requested a crash condition maintenance. Userspace can choose |
5164 | to ignore the request, or to gather VM memory core dump and/or | |
5165 | reset/shutdown of the VM. | |
cf5d3188 | 5166 | |
106ee47d MCC |
5167 | :: |
5168 | ||
7543a635 SR |
5169 | /* KVM_EXIT_IOAPIC_EOI */ |
5170 | struct { | |
5171 | __u8 vector; | |
5172 | } eoi; | |
5173 | ||
5174 | Indicates that the VCPU's in-kernel local APIC received an EOI for a | |
5175 | level-triggered IOAPIC interrupt. This exit only triggers when the | |
5176 | IOAPIC is implemented in userspace (i.e. KVM_CAP_SPLIT_IRQCHIP is enabled); | |
5177 | the userspace IOAPIC should process the EOI and retrigger the interrupt if | |
5178 | it is still asserted. Vector is the LAPIC interrupt vector for which the | |
5179 | EOI was received. | |
5180 | ||
106ee47d MCC |
5181 | :: |
5182 | ||
db397571 | 5183 | struct kvm_hyperv_exit { |
106ee47d MCC |
5184 | #define KVM_EXIT_HYPERV_SYNIC 1 |
5185 | #define KVM_EXIT_HYPERV_HCALL 2 | |
f97f5a56 | 5186 | #define KVM_EXIT_HYPERV_SYNDBG 3 |
db397571 | 5187 | __u32 type; |
f7d31e65 | 5188 | __u32 pad1; |
db397571 AS |
5189 | union { |
5190 | struct { | |
5191 | __u32 msr; | |
f7d31e65 | 5192 | __u32 pad2; |
db397571 AS |
5193 | __u64 control; |
5194 | __u64 evt_page; | |
5195 | __u64 msg_page; | |
5196 | } synic; | |
83326e43 AS |
5197 | struct { |
5198 | __u64 input; | |
5199 | __u64 result; | |
5200 | __u64 params[2]; | |
5201 | } hcall; | |
f97f5a56 JD |
5202 | struct { |
5203 | __u32 msr; | |
5204 | __u32 pad2; | |
5205 | __u64 control; | |
5206 | __u64 status; | |
5207 | __u64 send_page; | |
5208 | __u64 recv_page; | |
5209 | __u64 pending_page; | |
5210 | } syndbg; | |
db397571 AS |
5211 | } u; |
5212 | }; | |
5213 | /* KVM_EXIT_HYPERV */ | |
5214 | struct kvm_hyperv_exit hyperv; | |
106ee47d | 5215 | |
db397571 AS |
5216 | Indicates that the VCPU exits into userspace to process some tasks |
5217 | related to Hyper-V emulation. | |
106ee47d | 5218 | |
db397571 | 5219 | Valid values for 'type' are: |
106ee47d MCC |
5220 | |
5221 | - KVM_EXIT_HYPERV_SYNIC -- synchronously notify user-space about | |
5222 | ||
db397571 AS |
5223 | Hyper-V SynIC state change. Notification is used to remap SynIC |
5224 | event/message pages and to enable/disable SynIC messages/events processing | |
5225 | in userspace. | |
5226 | ||
f97f5a56 JD |
5227 | - KVM_EXIT_HYPERV_SYNDBG -- synchronously notify user-space about |
5228 | ||
5229 | Hyper-V Synthetic debugger state change. Notification is used to either update | |
5230 | the pending_page location or to send a control command (send the buffer located | |
5231 | in send_page or recv a buffer to recv_page). | |
5232 | ||
106ee47d MCC |
5233 | :: |
5234 | ||
c726200d CD |
5235 | /* KVM_EXIT_ARM_NISV */ |
5236 | struct { | |
5237 | __u64 esr_iss; | |
5238 | __u64 fault_ipa; | |
5239 | } arm_nisv; | |
5240 | ||
5241 | Used on arm and arm64 systems. If a guest accesses memory not in a memslot, | |
5242 | KVM will typically return to userspace and ask it to do MMIO emulation on its | |
5243 | behalf. However, for certain classes of instructions, no instruction decode | |
5244 | (direction, length of memory access) is provided, and fetching and decoding | |
5245 | the instruction from the VM is overly complicated to live in the kernel. | |
5246 | ||
5247 | Historically, when this situation occurred, KVM would print a warning and kill | |
5248 | the VM. KVM assumed that if the guest accessed non-memslot memory, it was | |
5249 | trying to do I/O, which just couldn't be emulated, and the warning message was | |
5250 | phrased accordingly. However, what happened more often was that a guest bug | |
5251 | caused access outside the guest memory areas which should lead to a more | |
5252 | meaningful warning message and an external abort in the guest, if the access | |
5253 | did not fall within an I/O window. | |
5254 | ||
5255 | Userspace implementations can query for KVM_CAP_ARM_NISV_TO_USER, and enable | |
5256 | this capability at VM creation. Once this is done, these types of errors will | |
5257 | instead return to userspace with KVM_EXIT_ARM_NISV, with the valid bits from | |
5258 | the HSR (arm) and ESR_EL2 (arm64) in the esr_iss field, and the faulting IPA | |
5259 | in the fault_ipa field. Userspace can either fix up the access if it's | |
5260 | actually an I/O access by decoding the instruction from guest memory (if it's | |
5261 | very brave) and continue executing the guest, or it can decide to suspend, | |
5262 | dump, or restart the guest. | |
5263 | ||
5264 | Note that KVM does not skip the faulting instruction as it does for | |
5265 | KVM_EXIT_MMIO, but userspace has to emulate any change to the processing state | |
5266 | if it decides to decode and emulate the instruction. | |
5267 | ||
1ae09954 AG |
5268 | :: |
5269 | ||
5270 | /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ | |
5271 | struct { | |
5272 | __u8 error; /* user -> kernel */ | |
5273 | __u8 pad[7]; | |
5274 | __u32 reason; /* kernel -> user */ | |
5275 | __u32 index; /* kernel -> user */ | |
5276 | __u64 data; /* kernel <-> user */ | |
5277 | } msr; | |
5278 | ||
5279 | Used on x86 systems. When the VM capability KVM_CAP_X86_USER_SPACE_MSR is | |
5280 | enabled, MSR accesses to registers that would invoke a #GP by KVM kernel code | |
5281 | will instead trigger a KVM_EXIT_X86_RDMSR exit for reads and KVM_EXIT_X86_WRMSR | |
5282 | exit for writes. | |
5283 | ||
5284 | The "reason" field specifies why the MSR trap occurred. User space will only | |
5285 | receive MSR exit traps when a particular reason was requested during through | |
5286 | ENABLE_CAP. Currently valid exit reasons are: | |
5287 | ||
5288 | KVM_MSR_EXIT_REASON_UNKNOWN - access to MSR that is unknown to KVM | |
5289 | KVM_MSR_EXIT_REASON_INVAL - access to invalid MSRs or reserved bits | |
1a155254 | 5290 | KVM_MSR_EXIT_REASON_FILTER - access blocked by KVM_X86_SET_MSR_FILTER |
1ae09954 AG |
5291 | |
5292 | For KVM_EXIT_X86_RDMSR, the "index" field tells user space which MSR the guest | |
5293 | wants to read. To respond to this request with a successful read, user space | |
5294 | writes the respective data into the "data" field and must continue guest | |
5295 | execution to ensure the read data is transferred into guest register state. | |
5296 | ||
5297 | If the RDMSR request was unsuccessful, user space indicates that with a "1" in | |
5298 | the "error" field. This will inject a #GP into the guest when the VCPU is | |
5299 | executed again. | |
5300 | ||
5301 | For KVM_EXIT_X86_WRMSR, the "index" field tells user space which MSR the guest | |
5302 | wants to write. Once finished processing the event, user space must continue | |
5303 | vCPU execution. If the MSR write was unsuccessful, user space also sets the | |
5304 | "error" field to "1". | |
5305 | ||
106ee47d MCC |
5306 | :: |
5307 | ||
9c1b96e3 AK |
5308 | /* Fix the size of the union. */ |
5309 | char padding[256]; | |
5310 | }; | |
b9e5dc8d CB |
5311 | |
5312 | /* | |
5313 | * shared registers between kvm and userspace. | |
5314 | * kvm_valid_regs specifies the register classes set by the host | |
5315 | * kvm_dirty_regs specified the register classes dirtied by userspace | |
5316 | * struct kvm_sync_regs is architecture specific, as well as the | |
5317 | * bits for kvm_valid_regs and kvm_dirty_regs | |
5318 | */ | |
5319 | __u64 kvm_valid_regs; | |
5320 | __u64 kvm_dirty_regs; | |
5321 | union { | |
5322 | struct kvm_sync_regs regs; | |
7b7e3952 | 5323 | char padding[SYNC_REGS_SIZE_BYTES]; |
b9e5dc8d CB |
5324 | } s; |
5325 | ||
5326 | If KVM_CAP_SYNC_REGS is defined, these fields allow userspace to access | |
5327 | certain guest registers without having to call SET/GET_*REGS. Thus we can | |
5328 | avoid some system call overhead if userspace has to handle the exit. | |
5329 | Userspace can query the validity of the structure by checking | |
5330 | kvm_valid_regs for specific bits. These bits are architecture specific | |
5331 | and usually define the validity of a groups of registers. (e.g. one bit | |
106ee47d | 5332 | for general purpose registers) |
b9e5dc8d | 5333 | |
d8482c0d DH |
5334 | Please note that the kernel is allowed to use the kvm_run structure as the |
5335 | primary storage for certain register types. Therefore, the kernel may use the | |
5336 | values in kvm_run even if the corresponding bit in kvm_dirty_regs is not set. | |
5337 | ||
106ee47d MCC |
5338 | :: |
5339 | ||
5340 | }; | |
821246a5 | 5341 | |
414fa985 | 5342 | |
9c15bb1d | 5343 | |
699a0ea0 | 5344 | 6. Capabilities that can be enabled on vCPUs |
106ee47d | 5345 | ============================================ |
821246a5 | 5346 | |
0907c855 CH |
5347 | There are certain capabilities that change the behavior of the virtual CPU or |
5348 | the virtual machine when enabled. To enable them, please see section 4.37. | |
5349 | Below you can find a list of capabilities and what their effect on the vCPU or | |
5350 | the virtual machine is when enabling them. | |
821246a5 AG |
5351 | |
5352 | The following information is provided along with the description: | |
5353 | ||
106ee47d MCC |
5354 | Architectures: |
5355 | which instruction set architectures provide this ioctl. | |
821246a5 AG |
5356 | x86 includes both i386 and x86_64. |
5357 | ||
106ee47d MCC |
5358 | Target: |
5359 | whether this is a per-vcpu or per-vm capability. | |
0907c855 | 5360 | |
106ee47d MCC |
5361 | Parameters: |
5362 | what parameters are accepted by the capability. | |
821246a5 | 5363 | |
106ee47d MCC |
5364 | Returns: |
5365 | the return value. General error numbers (EBADF, ENOMEM, EINVAL) | |
821246a5 AG |
5366 | are not detailed, but errors with specific meanings are. |
5367 | ||
414fa985 | 5368 | |
821246a5 | 5369 | 6.1 KVM_CAP_PPC_OSI |
106ee47d | 5370 | ------------------- |
821246a5 | 5371 | |
106ee47d MCC |
5372 | :Architectures: ppc |
5373 | :Target: vcpu | |
5374 | :Parameters: none | |
5375 | :Returns: 0 on success; -1 on error | |
821246a5 AG |
5376 | |
5377 | This capability enables interception of OSI hypercalls that otherwise would | |
5378 | be treated as normal system calls to be injected into the guest. OSI hypercalls | |
5379 | were invented by Mac-on-Linux to have a standardized communication mechanism | |
5380 | between the guest and the host. | |
5381 | ||
5382 | When this capability is enabled, KVM_EXIT_OSI can occur. | |
5383 | ||
414fa985 | 5384 | |
821246a5 | 5385 | 6.2 KVM_CAP_PPC_PAPR |
106ee47d | 5386 | -------------------- |
821246a5 | 5387 | |
106ee47d MCC |
5388 | :Architectures: ppc |
5389 | :Target: vcpu | |
5390 | :Parameters: none | |
5391 | :Returns: 0 on success; -1 on error | |
821246a5 AG |
5392 | |
5393 | This capability enables interception of PAPR hypercalls. PAPR hypercalls are | |
5394 | done using the hypercall instruction "sc 1". | |
5395 | ||
5396 | It also sets the guest privilege level to "supervisor" mode. Usually the guest | |
5397 | runs in "hypervisor" privilege mode with a few missing features. | |
5398 | ||
5399 | In addition to the above, it changes the semantics of SDR1. In this mode, the | |
5400 | HTAB address part of SDR1 contains an HVA instead of a GPA, as PAPR keeps the | |
5401 | HTAB invisible to the guest. | |
5402 | ||
5403 | When this capability is enabled, KVM_EXIT_PAPR_HCALL can occur. | |
dc83b8bc | 5404 | |
414fa985 | 5405 | |
dc83b8bc | 5406 | 6.3 KVM_CAP_SW_TLB |
106ee47d MCC |
5407 | ------------------ |
5408 | ||
5409 | :Architectures: ppc | |
5410 | :Target: vcpu | |
5411 | :Parameters: args[0] is the address of a struct kvm_config_tlb | |
5412 | :Returns: 0 on success; -1 on error | |
dc83b8bc | 5413 | |
106ee47d | 5414 | :: |
dc83b8bc | 5415 | |
106ee47d | 5416 | struct kvm_config_tlb { |
dc83b8bc SW |
5417 | __u64 params; |
5418 | __u64 array; | |
5419 | __u32 mmu_type; | |
5420 | __u32 array_len; | |
106ee47d | 5421 | }; |
dc83b8bc SW |
5422 | |
5423 | Configures the virtual CPU's TLB array, establishing a shared memory area | |
5424 | between userspace and KVM. The "params" and "array" fields are userspace | |
5425 | addresses of mmu-type-specific data structures. The "array_len" field is an | |
5426 | safety mechanism, and should be set to the size in bytes of the memory that | |
5427 | userspace has reserved for the array. It must be at least the size dictated | |
5428 | by "mmu_type" and "params". | |
5429 | ||
5430 | While KVM_RUN is active, the shared region is under control of KVM. Its | |
5431 | contents are undefined, and any modification by userspace results in | |
5432 | boundedly undefined behavior. | |
5433 | ||
5434 | On return from KVM_RUN, the shared region will reflect the current state of | |
5435 | the guest's TLB. If userspace makes any changes, it must call KVM_DIRTY_TLB | |
5436 | to tell KVM which entries have been changed, prior to calling KVM_RUN again | |
5437 | on this vcpu. | |
5438 | ||
5439 | For mmu types KVM_MMU_FSL_BOOKE_NOHV and KVM_MMU_FSL_BOOKE_HV: | |
106ee47d | 5440 | |
dc83b8bc SW |
5441 | - The "params" field is of type "struct kvm_book3e_206_tlb_params". |
5442 | - The "array" field points to an array of type "struct | |
5443 | kvm_book3e_206_tlb_entry". | |
5444 | - The array consists of all entries in the first TLB, followed by all | |
5445 | entries in the second TLB. | |
5446 | - Within a TLB, entries are ordered first by increasing set number. Within a | |
5447 | set, entries are ordered by way (increasing ESEL). | |
5448 | - The hash for determining set number in TLB0 is: (MAS2 >> 12) & (num_sets - 1) | |
5449 | where "num_sets" is the tlb_sizes[] value divided by the tlb_ways[] value. | |
5450 | - The tsize field of mas1 shall be set to 4K on TLB0, even though the | |
5451 | hardware ignores this value for TLB0. | |
fa6b7fe9 CH |
5452 | |
5453 | 6.4 KVM_CAP_S390_CSS_SUPPORT | |
106ee47d | 5454 | ---------------------------- |
fa6b7fe9 | 5455 | |
106ee47d MCC |
5456 | :Architectures: s390 |
5457 | :Target: vcpu | |
5458 | :Parameters: none | |
5459 | :Returns: 0 on success; -1 on error | |
fa6b7fe9 CH |
5460 | |
5461 | This capability enables support for handling of channel I/O instructions. | |
5462 | ||
5463 | TEST PENDING INTERRUPTION and the interrupt portion of TEST SUBCHANNEL are | |
5464 | handled in-kernel, while the other I/O instructions are passed to userspace. | |
5465 | ||
5466 | When this capability is enabled, KVM_EXIT_S390_TSCH will occur on TEST | |
5467 | SUBCHANNEL intercepts. | |
1c810636 | 5468 | |
0907c855 CH |
5469 | Note that even though this capability is enabled per-vcpu, the complete |
5470 | virtual machine is affected. | |
5471 | ||
1c810636 | 5472 | 6.5 KVM_CAP_PPC_EPR |
106ee47d | 5473 | ------------------- |
1c810636 | 5474 | |
106ee47d MCC |
5475 | :Architectures: ppc |
5476 | :Target: vcpu | |
5477 | :Parameters: args[0] defines whether the proxy facility is active | |
5478 | :Returns: 0 on success; -1 on error | |
1c810636 AG |
5479 | |
5480 | This capability enables or disables the delivery of interrupts through the | |
5481 | external proxy facility. | |
5482 | ||
5483 | When enabled (args[0] != 0), every time the guest gets an external interrupt | |
5484 | delivered, it automatically exits into user space with a KVM_EXIT_EPR exit | |
5485 | to receive the topmost interrupt vector. | |
5486 | ||
5487 | When disabled (args[0] == 0), behavior is as if this facility is unsupported. | |
5488 | ||
5489 | When this capability is enabled, KVM_EXIT_EPR can occur. | |
eb1e4f43 SW |
5490 | |
5491 | 6.6 KVM_CAP_IRQ_MPIC | |
106ee47d | 5492 | -------------------- |
eb1e4f43 | 5493 | |
106ee47d MCC |
5494 | :Architectures: ppc |
5495 | :Parameters: args[0] is the MPIC device fd; | |
5496 | args[1] is the MPIC CPU number for this vcpu | |
eb1e4f43 SW |
5497 | |
5498 | This capability connects the vcpu to an in-kernel MPIC device. | |
5975a2e0 PM |
5499 | |
5500 | 6.7 KVM_CAP_IRQ_XICS | |
106ee47d | 5501 | -------------------- |
5975a2e0 | 5502 | |
106ee47d MCC |
5503 | :Architectures: ppc |
5504 | :Target: vcpu | |
5505 | :Parameters: args[0] is the XICS device fd; | |
5506 | args[1] is the XICS CPU number (server ID) for this vcpu | |
5975a2e0 PM |
5507 | |
5508 | This capability connects the vcpu to an in-kernel XICS device. | |
8a366a4b CH |
5509 | |
5510 | 6.8 KVM_CAP_S390_IRQCHIP | |
106ee47d | 5511 | ------------------------ |
8a366a4b | 5512 | |
106ee47d MCC |
5513 | :Architectures: s390 |
5514 | :Target: vm | |
5515 | :Parameters: none | |
8a366a4b CH |
5516 | |
5517 | This capability enables the in-kernel irqchip for s390. Please refer to | |
5518 | "4.24 KVM_CREATE_IRQCHIP" for details. | |
699a0ea0 | 5519 | |
5fafd874 | 5520 | 6.9 KVM_CAP_MIPS_FPU |
106ee47d | 5521 | -------------------- |
5fafd874 | 5522 | |
106ee47d MCC |
5523 | :Architectures: mips |
5524 | :Target: vcpu | |
5525 | :Parameters: args[0] is reserved for future use (should be 0). | |
5fafd874 JH |
5526 | |
5527 | This capability allows the use of the host Floating Point Unit by the guest. It | |
5528 | allows the Config1.FP bit to be set to enable the FPU in the guest. Once this is | |
106ee47d MCC |
5529 | done the ``KVM_REG_MIPS_FPR_*`` and ``KVM_REG_MIPS_FCR_*`` registers can be |
5530 | accessed (depending on the current guest FPU register mode), and the Status.FR, | |
5fafd874 JH |
5531 | Config5.FRE bits are accessible via the KVM API and also from the guest, |
5532 | depending on them being supported by the FPU. | |
5533 | ||
d952bd07 | 5534 | 6.10 KVM_CAP_MIPS_MSA |
106ee47d | 5535 | --------------------- |
d952bd07 | 5536 | |
106ee47d MCC |
5537 | :Architectures: mips |
5538 | :Target: vcpu | |
5539 | :Parameters: args[0] is reserved for future use (should be 0). | |
d952bd07 JH |
5540 | |
5541 | This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest. | |
5542 | It allows the Config3.MSAP bit to be set to enable the use of MSA by the guest. | |
106ee47d MCC |
5543 | Once this is done the ``KVM_REG_MIPS_VEC_*`` and ``KVM_REG_MIPS_MSA_*`` |
5544 | registers can be accessed, and the Config5.MSAEn bit is accessible via the | |
5545 | KVM API and also from the guest. | |
d952bd07 | 5546 | |
01643c51 | 5547 | 6.74 KVM_CAP_SYNC_REGS |
106ee47d MCC |
5548 | ---------------------- |
5549 | ||
5550 | :Architectures: s390, x86 | |
5551 | :Target: s390: always enabled, x86: vcpu | |
5552 | :Parameters: none | |
5553 | :Returns: x86: KVM_CHECK_EXTENSION returns a bit-array indicating which register | |
5554 | sets are supported | |
5555 | (bitfields defined in arch/x86/include/uapi/asm/kvm.h). | |
01643c51 KH |
5556 | |
5557 | As described above in the kvm_sync_regs struct info in section 5 (kvm_run): | |
5558 | KVM_CAP_SYNC_REGS "allow[s] userspace to access certain guest registers | |
5559 | without having to call SET/GET_*REGS". This reduces overhead by eliminating | |
5560 | repeated ioctl calls for setting and/or getting register values. This is | |
5561 | particularly important when userspace is making synchronous guest state | |
5562 | modifications, e.g. when emulating and/or intercepting instructions in | |
5563 | userspace. | |
5564 | ||
5565 | For s390 specifics, please refer to the source code. | |
5566 | ||
5567 | For x86: | |
106ee47d | 5568 | |
01643c51 KH |
5569 | - the register sets to be copied out to kvm_run are selectable |
5570 | by userspace (rather that all sets being copied out for every exit). | |
5571 | - vcpu_events are available in addition to regs and sregs. | |
5572 | ||
5573 | For x86, the 'kvm_valid_regs' field of struct kvm_run is overloaded to | |
5574 | function as an input bit-array field set by userspace to indicate the | |
5575 | specific register sets to be copied out on the next exit. | |
5576 | ||
5577 | To indicate when userspace has modified values that should be copied into | |
5578 | the vCPU, the all architecture bitarray field, 'kvm_dirty_regs' must be set. | |
5579 | This is done using the same bitflags as for the 'kvm_valid_regs' field. | |
5580 | If the dirty bit is not set, then the register set values will not be copied | |
5581 | into the vCPU even if they've been modified. | |
5582 | ||
5583 | Unused bitfields in the bitarrays must be set to zero. | |
5584 | ||
106ee47d MCC |
5585 | :: |
5586 | ||
5587 | struct kvm_sync_regs { | |
01643c51 KH |
5588 | struct kvm_regs regs; |
5589 | struct kvm_sregs sregs; | |
5590 | struct kvm_vcpu_events events; | |
106ee47d | 5591 | }; |
01643c51 | 5592 | |
eacc56bb | 5593 | 6.75 KVM_CAP_PPC_IRQ_XIVE |
106ee47d | 5594 | ------------------------- |
eacc56bb | 5595 | |
106ee47d MCC |
5596 | :Architectures: ppc |
5597 | :Target: vcpu | |
5598 | :Parameters: args[0] is the XIVE device fd; | |
5599 | args[1] is the XIVE CPU number (server ID) for this vcpu | |
eacc56bb CLG |
5600 | |
5601 | This capability connects the vcpu to an in-kernel XIVE device. | |
5602 | ||
699a0ea0 | 5603 | 7. Capabilities that can be enabled on VMs |
106ee47d | 5604 | ========================================== |
699a0ea0 PM |
5605 | |
5606 | There are certain capabilities that change the behavior of the virtual | |
5607 | machine when enabled. To enable them, please see section 4.37. Below | |
5608 | you can find a list of capabilities and what their effect on the VM | |
5609 | is when enabling them. | |
5610 | ||
5611 | The following information is provided along with the description: | |
5612 | ||
106ee47d MCC |
5613 | Architectures: |
5614 | which instruction set architectures provide this ioctl. | |
699a0ea0 PM |
5615 | x86 includes both i386 and x86_64. |
5616 | ||
106ee47d MCC |
5617 | Parameters: |
5618 | what parameters are accepted by the capability. | |
699a0ea0 | 5619 | |
106ee47d MCC |
5620 | Returns: |
5621 | the return value. General error numbers (EBADF, ENOMEM, EINVAL) | |
699a0ea0 PM |
5622 | are not detailed, but errors with specific meanings are. |
5623 | ||
5624 | ||
5625 | 7.1 KVM_CAP_PPC_ENABLE_HCALL | |
106ee47d | 5626 | ---------------------------- |
699a0ea0 | 5627 | |
106ee47d MCC |
5628 | :Architectures: ppc |
5629 | :Parameters: args[0] is the sPAPR hcall number; | |
5630 | args[1] is 0 to disable, 1 to enable in-kernel handling | |
699a0ea0 PM |
5631 | |
5632 | This capability controls whether individual sPAPR hypercalls (hcalls) | |
5633 | get handled by the kernel or not. Enabling or disabling in-kernel | |
5634 | handling of an hcall is effective across the VM. On creation, an | |
5635 | initial set of hcalls are enabled for in-kernel handling, which | |
5636 | consists of those hcalls for which in-kernel handlers were implemented | |
5637 | before this capability was implemented. If disabled, the kernel will | |
5638 | not to attempt to handle the hcall, but will always exit to userspace | |
5639 | to handle it. Note that it may not make sense to enable some and | |
5640 | disable others of a group of related hcalls, but KVM does not prevent | |
5641 | userspace from doing that. | |
ae2113a4 PM |
5642 | |
5643 | If the hcall number specified is not one that has an in-kernel | |
5644 | implementation, the KVM_ENABLE_CAP ioctl will fail with an EINVAL | |
5645 | error. | |
2444b352 DH |
5646 | |
5647 | 7.2 KVM_CAP_S390_USER_SIGP | |
106ee47d | 5648 | -------------------------- |
2444b352 | 5649 | |
106ee47d MCC |
5650 | :Architectures: s390 |
5651 | :Parameters: none | |
2444b352 DH |
5652 | |
5653 | This capability controls which SIGP orders will be handled completely in user | |
5654 | space. With this capability enabled, all fast orders will be handled completely | |
5655 | in the kernel: | |
106ee47d | 5656 | |
2444b352 DH |
5657 | - SENSE |
5658 | - SENSE RUNNING | |
5659 | - EXTERNAL CALL | |
5660 | - EMERGENCY SIGNAL | |
5661 | - CONDITIONAL EMERGENCY SIGNAL | |
5662 | ||
5663 | All other orders will be handled completely in user space. | |
5664 | ||
5665 | Only privileged operation exceptions will be checked for in the kernel (or even | |
5666 | in the hardware prior to interception). If this capability is not enabled, the | |
5667 | old way of handling SIGP orders is used (partially in kernel and user space). | |
68c55750 EF |
5668 | |
5669 | 7.3 KVM_CAP_S390_VECTOR_REGISTERS | |
106ee47d | 5670 | --------------------------------- |
68c55750 | 5671 | |
106ee47d MCC |
5672 | :Architectures: s390 |
5673 | :Parameters: none | |
5674 | :Returns: 0 on success, negative value on error | |
68c55750 EF |
5675 | |
5676 | Allows use of the vector registers introduced with z13 processor, and | |
5677 | provides for the synchronization between host and user space. Will | |
5678 | return -EINVAL if the machine does not support vectors. | |
e44fc8c9 ET |
5679 | |
5680 | 7.4 KVM_CAP_S390_USER_STSI | |
106ee47d | 5681 | -------------------------- |
e44fc8c9 | 5682 | |
106ee47d MCC |
5683 | :Architectures: s390 |
5684 | :Parameters: none | |
e44fc8c9 ET |
5685 | |
5686 | This capability allows post-handlers for the STSI instruction. After | |
5687 | initial handling in the kernel, KVM exits to user space with | |
5688 | KVM_EXIT_S390_STSI to allow user space to insert further data. | |
5689 | ||
5690 | Before exiting to userspace, kvm handlers should fill in s390_stsi field of | |
106ee47d MCC |
5691 | vcpu->run:: |
5692 | ||
5693 | struct { | |
e44fc8c9 ET |
5694 | __u64 addr; |
5695 | __u8 ar; | |
5696 | __u8 reserved; | |
5697 | __u8 fc; | |
5698 | __u8 sel1; | |
5699 | __u16 sel2; | |
106ee47d | 5700 | } s390_stsi; |
e44fc8c9 | 5701 | |
106ee47d MCC |
5702 | @addr - guest address of STSI SYSIB |
5703 | @fc - function code | |
5704 | @sel1 - selector 1 | |
5705 | @sel2 - selector 2 | |
5706 | @ar - access register number | |
e44fc8c9 ET |
5707 | |
5708 | KVM handlers should exit to userspace with rc = -EREMOTE. | |
e928e9cb | 5709 | |
49df6397 | 5710 | 7.5 KVM_CAP_SPLIT_IRQCHIP |
106ee47d | 5711 | ------------------------- |
49df6397 | 5712 | |
106ee47d MCC |
5713 | :Architectures: x86 |
5714 | :Parameters: args[0] - number of routes reserved for userspace IOAPICs | |
5715 | :Returns: 0 on success, -1 on error | |
49df6397 SR |
5716 | |
5717 | Create a local apic for each processor in the kernel. This can be used | |
5718 | instead of KVM_CREATE_IRQCHIP if the userspace VMM wishes to emulate the | |
5719 | IOAPIC and PIC (and also the PIT, even though this has to be enabled | |
5720 | separately). | |
5721 | ||
b053b2ae SR |
5722 | This capability also enables in kernel routing of interrupt requests; |
5723 | when KVM_CAP_SPLIT_IRQCHIP only routes of KVM_IRQ_ROUTING_MSI type are | |
5724 | used in the IRQ routing table. The first args[0] MSI routes are reserved | |
5725 | for the IOAPIC pins. Whenever the LAPIC receives an EOI for these routes, | |
5726 | a KVM_EXIT_IOAPIC_EOI vmexit will be reported to userspace. | |
49df6397 SR |
5727 | |
5728 | Fails if VCPU has already been created, or if the irqchip is already in the | |
5729 | kernel (i.e. KVM_CREATE_IRQCHIP has already been called). | |
5730 | ||
051c87f7 | 5731 | 7.6 KVM_CAP_S390_RI |
106ee47d | 5732 | ------------------- |
051c87f7 | 5733 | |
106ee47d MCC |
5734 | :Architectures: s390 |
5735 | :Parameters: none | |
051c87f7 DH |
5736 | |
5737 | Allows use of runtime-instrumentation introduced with zEC12 processor. | |
5738 | Will return -EINVAL if the machine does not support runtime-instrumentation. | |
5739 | Will return -EBUSY if a VCPU has already been created. | |
e928e9cb | 5740 | |
37131313 | 5741 | 7.7 KVM_CAP_X2APIC_API |
106ee47d | 5742 | ---------------------- |
37131313 | 5743 | |
106ee47d MCC |
5744 | :Architectures: x86 |
5745 | :Parameters: args[0] - features that should be enabled | |
5746 | :Returns: 0 on success, -EINVAL when args[0] contains invalid features | |
37131313 | 5747 | |
106ee47d | 5748 | Valid feature flags in args[0] are:: |
37131313 | 5749 | |
106ee47d MCC |
5750 | #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) |
5751 | #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) | |
37131313 RK |
5752 | |
5753 | Enabling KVM_X2APIC_API_USE_32BIT_IDS changes the behavior of | |
5754 | KVM_SET_GSI_ROUTING, KVM_SIGNAL_MSI, KVM_SET_LAPIC, and KVM_GET_LAPIC, | |
5755 | allowing the use of 32-bit APIC IDs. See KVM_CAP_X2APIC_API in their | |
5756 | respective sections. | |
5757 | ||
c519265f RK |
5758 | KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK must be enabled for x2APIC to work |
5759 | in logical mode or with more than 255 VCPUs. Otherwise, KVM treats 0xff | |
5760 | as a broadcast even in x2APIC mode in order to support physical x2APIC | |
5761 | without interrupt remapping. This is undesirable in logical mode, | |
5762 | where 0xff represents CPUs 0-7 in cluster 0. | |
37131313 | 5763 | |
6502a34c | 5764 | 7.8 KVM_CAP_S390_USER_INSTR0 |
106ee47d | 5765 | ---------------------------- |
6502a34c | 5766 | |
106ee47d MCC |
5767 | :Architectures: s390 |
5768 | :Parameters: none | |
6502a34c DH |
5769 | |
5770 | With this capability enabled, all illegal instructions 0x0000 (2 bytes) will | |
5771 | be intercepted and forwarded to user space. User space can use this | |
5772 | mechanism e.g. to realize 2-byte software breakpoints. The kernel will | |
5773 | not inject an operating exception for these instructions, user space has | |
5774 | to take care of that. | |
5775 | ||
5776 | This capability can be enabled dynamically even if VCPUs were already | |
5777 | created and are running. | |
37131313 | 5778 | |
4e0b1ab7 | 5779 | 7.9 KVM_CAP_S390_GS |
106ee47d | 5780 | ------------------- |
4e0b1ab7 | 5781 | |
106ee47d MCC |
5782 | :Architectures: s390 |
5783 | :Parameters: none | |
5784 | :Returns: 0 on success; -EINVAL if the machine does not support | |
5785 | guarded storage; -EBUSY if a VCPU has already been created. | |
4e0b1ab7 FZ |
5786 | |
5787 | Allows use of guarded storage for the KVM guest. | |
5788 | ||
47a4693e | 5789 | 7.10 KVM_CAP_S390_AIS |
106ee47d | 5790 | --------------------- |
47a4693e | 5791 | |
106ee47d MCC |
5792 | :Architectures: s390 |
5793 | :Parameters: none | |
47a4693e YMZ |
5794 | |
5795 | Allow use of adapter-interruption suppression. | |
106ee47d | 5796 | :Returns: 0 on success; -EBUSY if a VCPU has already been created. |
47a4693e | 5797 | |
3c313524 | 5798 | 7.11 KVM_CAP_PPC_SMT |
106ee47d | 5799 | -------------------- |
3c313524 | 5800 | |
106ee47d MCC |
5801 | :Architectures: ppc |
5802 | :Parameters: vsmt_mode, flags | |
3c313524 PM |
5803 | |
5804 | Enabling this capability on a VM provides userspace with a way to set | |
5805 | the desired virtual SMT mode (i.e. the number of virtual CPUs per | |
5806 | virtual core). The virtual SMT mode, vsmt_mode, must be a power of 2 | |
5807 | between 1 and 8. On POWER8, vsmt_mode must also be no greater than | |
5808 | the number of threads per subcore for the host. Currently flags must | |
5809 | be 0. A successful call to enable this capability will result in | |
5810 | vsmt_mode being returned when the KVM_CAP_PPC_SMT capability is | |
5811 | subsequently queried for the VM. This capability is only supported by | |
5812 | HV KVM, and can only be set before any VCPUs have been created. | |
2ed4f9dd PM |
5813 | The KVM_CAP_PPC_SMT_POSSIBLE capability indicates which virtual SMT |
5814 | modes are available. | |
3c313524 | 5815 | |
134764ed | 5816 | 7.12 KVM_CAP_PPC_FWNMI |
106ee47d | 5817 | ---------------------- |
134764ed | 5818 | |
106ee47d MCC |
5819 | :Architectures: ppc |
5820 | :Parameters: none | |
134764ed AP |
5821 | |
5822 | With this capability a machine check exception in the guest address | |
5823 | space will cause KVM to exit the guest with NMI exit reason. This | |
5824 | enables QEMU to build error log and branch to guest kernel registered | |
5825 | machine check handling routine. Without this capability KVM will | |
5826 | branch to guests' 0x200 interrupt vector. | |
5827 | ||
4d5422ce | 5828 | 7.13 KVM_CAP_X86_DISABLE_EXITS |
106ee47d | 5829 | ------------------------------ |
4d5422ce | 5830 | |
106ee47d MCC |
5831 | :Architectures: x86 |
5832 | :Parameters: args[0] defines which exits are disabled | |
5833 | :Returns: 0 on success, -EINVAL when args[0] contains invalid exits | |
4d5422ce | 5834 | |
106ee47d | 5835 | Valid bits in args[0] are:: |
4d5422ce | 5836 | |
106ee47d MCC |
5837 | #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) |
5838 | #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) | |
5839 | #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) | |
5840 | #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) | |
4d5422ce WL |
5841 | |
5842 | Enabling this capability on a VM provides userspace with a way to no | |
5843 | longer intercept some instructions for improved latency in some | |
5844 | workloads, and is suggested when vCPUs are associated to dedicated | |
5845 | physical CPUs. More bits can be added in the future; userspace can | |
5846 | just pass the KVM_CHECK_EXTENSION result to KVM_ENABLE_CAP to disable | |
5847 | all such vmexits. | |
5848 | ||
caa057a2 | 5849 | Do not enable KVM_FEATURE_PV_UNHALT if you disable HLT exits. |
4d5422ce | 5850 | |
a4499382 | 5851 | 7.14 KVM_CAP_S390_HPAGE_1M |
106ee47d | 5852 | -------------------------- |
a4499382 | 5853 | |
106ee47d MCC |
5854 | :Architectures: s390 |
5855 | :Parameters: none | |
5856 | :Returns: 0 on success, -EINVAL if hpage module parameter was not set | |
5857 | or cmma is enabled, or the VM has the KVM_VM_S390_UCONTROL | |
5858 | flag set | |
a4499382 JF |
5859 | |
5860 | With this capability the KVM support for memory backing with 1m pages | |
5861 | through hugetlbfs can be enabled for a VM. After the capability is | |
5862 | enabled, cmma can't be enabled anymore and pfmfi and the storage key | |
5863 | interpretation are disabled. If cmma has already been enabled or the | |
5864 | hpage module parameter is not set to 1, -EINVAL is returned. | |
5865 | ||
5866 | While it is generally possible to create a huge page backed VM without | |
5867 | this capability, the VM will not be able to run. | |
5868 | ||
c4f55198 | 5869 | 7.15 KVM_CAP_MSR_PLATFORM_INFO |
106ee47d | 5870 | ------------------------------ |
6fbbde9a | 5871 | |
106ee47d MCC |
5872 | :Architectures: x86 |
5873 | :Parameters: args[0] whether feature should be enabled or not | |
6fbbde9a DS |
5874 | |
5875 | With this capability, a guest may read the MSR_PLATFORM_INFO MSR. Otherwise, | |
5876 | a #GP would be raised when the guest tries to access. Currently, this | |
5877 | capability does not enable write permissions of this MSR for the guest. | |
5878 | ||
aa069a99 | 5879 | 7.16 KVM_CAP_PPC_NESTED_HV |
106ee47d | 5880 | -------------------------- |
aa069a99 | 5881 | |
106ee47d MCC |
5882 | :Architectures: ppc |
5883 | :Parameters: none | |
5884 | :Returns: 0 on success, -EINVAL when the implementation doesn't support | |
5885 | nested-HV virtualization. | |
aa069a99 PM |
5886 | |
5887 | HV-KVM on POWER9 and later systems allows for "nested-HV" | |
5888 | virtualization, which provides a way for a guest VM to run guests that | |
5889 | can run using the CPU's supervisor mode (privileged non-hypervisor | |
5890 | state). Enabling this capability on a VM depends on the CPU having | |
5891 | the necessary functionality and on the facility being enabled with a | |
5892 | kvm-hv module parameter. | |
5893 | ||
c4f55198 | 5894 | 7.17 KVM_CAP_EXCEPTION_PAYLOAD |
106ee47d | 5895 | ------------------------------ |
c4f55198 | 5896 | |
106ee47d MCC |
5897 | :Architectures: x86 |
5898 | :Parameters: args[0] whether feature should be enabled or not | |
c4f55198 JM |
5899 | |
5900 | With this capability enabled, CR2 will not be modified prior to the | |
5901 | emulated VM-exit when L1 intercepts a #PF exception that occurs in | |
5902 | L2. Similarly, for kvm-intel only, DR6 will not be modified prior to | |
5903 | the emulated VM-exit when L1 intercepts a #DB exception that occurs in | |
5904 | L2. As a result, when KVM_GET_VCPU_EVENTS reports a pending #PF (or | |
5905 | #DB) exception for L2, exception.has_payload will be set and the | |
5906 | faulting address (or the new DR6 bits*) will be reported in the | |
5907 | exception_payload field. Similarly, when userspace injects a #PF (or | |
5908 | #DB) into L2 using KVM_SET_VCPU_EVENTS, it is expected to set | |
106ee47d MCC |
5909 | exception.has_payload and to put the faulting address - or the new DR6 |
5910 | bits\ [#]_ - in the exception_payload field. | |
c4f55198 JM |
5911 | |
5912 | This capability also enables exception.pending in struct | |
5913 | kvm_vcpu_events, which allows userspace to distinguish between pending | |
5914 | and injected exceptions. | |
5915 | ||
5916 | ||
106ee47d MCC |
5917 | .. [#] For the new DR6 bits, note that bit 16 is set iff the #DB exception |
5918 | will clear DR6.RTM. | |
c4f55198 | 5919 | |
d7547c55 | 5920 | 7.18 KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 |
2a31b9db | 5921 | |
106ee47d MCC |
5922 | :Architectures: x86, arm, arm64, mips |
5923 | :Parameters: args[0] whether feature should be enabled or not | |
2a31b9db | 5924 | |
3c9bd400 JZ |
5925 | Valid flags are:: |
5926 | ||
5927 | #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) | |
5928 | #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) | |
5929 | ||
5930 | With KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE is set, KVM_GET_DIRTY_LOG will not | |
5931 | automatically clear and write-protect all pages that are returned as dirty. | |
2a31b9db PB |
5932 | Rather, userspace will have to do this operation separately using |
5933 | KVM_CLEAR_DIRTY_LOG. | |
5934 | ||
5935 | At the cost of a slightly more complicated operation, this provides better | |
5936 | scalability and responsiveness for two reasons. First, | |
5937 | KVM_CLEAR_DIRTY_LOG ioctl can operate on a 64-page granularity rather | |
5938 | than requiring to sync a full memslot; this ensures that KVM does not | |
5939 | take spinlocks for an extended period of time. Second, in some cases a | |
5940 | large amount of time can pass between a call to KVM_GET_DIRTY_LOG and | |
5941 | userspace actually using the data in the page. Pages can be modified | |
3c9bd400 | 5942 | during this time, which is inefficient for both the guest and userspace: |
2a31b9db PB |
5943 | the guest will incur a higher penalty due to write protection faults, |
5944 | while userspace can see false reports of dirty pages. Manual reprotection | |
5945 | helps reducing this time, improving guest performance and reducing the | |
5946 | number of dirty log false positives. | |
5947 | ||
3c9bd400 JZ |
5948 | With KVM_DIRTY_LOG_INITIALLY_SET set, all the bits of the dirty bitmap |
5949 | will be initialized to 1 when created. This also improves performance because | |
5950 | dirty logging can be enabled gradually in small chunks on the first call | |
5951 | to KVM_CLEAR_DIRTY_LOG. KVM_DIRTY_LOG_INITIALLY_SET depends on | |
5952 | KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (it is also only available on | |
c862626e | 5953 | x86 and arm64 for now). |
3c9bd400 | 5954 | |
d7547c55 PX |
5955 | KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 was previously available under the name |
5956 | KVM_CAP_MANUAL_DIRTY_LOG_PROTECT, but the implementation had bugs that make | |
5957 | it hard or impossible to use it correctly. The availability of | |
5958 | KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 signals that those bugs are fixed. | |
5959 | Userspace should not try to use KVM_CAP_MANUAL_DIRTY_LOG_PROTECT. | |
2a31b9db | 5960 | |
9a5788c6 PM |
5961 | 7.19 KVM_CAP_PPC_SECURE_GUEST |
5962 | ------------------------------ | |
5963 | ||
5964 | :Architectures: ppc | |
5965 | ||
5966 | This capability indicates that KVM is running on a host that has | |
5967 | ultravisor firmware and thus can support a secure guest. On such a | |
5968 | system, a guest can ask the ultravisor to make it a secure guest, | |
5969 | one whose memory is inaccessible to the host except for pages which | |
5970 | are explicitly requested to be shared with the host. The ultravisor | |
5971 | notifies KVM when a guest requests to become a secure guest, and KVM | |
5972 | has the opportunity to veto the transition. | |
5973 | ||
5974 | If present, this capability can be enabled for a VM, meaning that KVM | |
5975 | will allow the transition to secure guest mode. Otherwise KVM will | |
5976 | veto the transition. | |
5977 | ||
acd05785 DM |
5978 | 7.20 KVM_CAP_HALT_POLL |
5979 | ---------------------- | |
5980 | ||
5981 | :Architectures: all | |
5982 | :Target: VM | |
5983 | :Parameters: args[0] is the maximum poll time in nanoseconds | |
5984 | :Returns: 0 on success; -1 on error | |
5985 | ||
5986 | This capability overrides the kvm module parameter halt_poll_ns for the | |
5987 | target VM. | |
5988 | ||
5989 | VCPU polling allows a VCPU to poll for wakeup events instead of immediately | |
5990 | scheduling during guest halts. The maximum time a VCPU can spend polling is | |
5991 | controlled by the kvm module parameter halt_poll_ns. This capability allows | |
5992 | the maximum halt time to specified on a per-VM basis, effectively overriding | |
5993 | the module parameter for the target VM. | |
5994 | ||
1ae09954 AG |
5995 | 7.21 KVM_CAP_X86_USER_SPACE_MSR |
5996 | ------------------------------- | |
5997 | ||
5998 | :Architectures: x86 | |
5999 | :Target: VM | |
6000 | :Parameters: args[0] contains the mask of KVM_MSR_EXIT_REASON_* events to report | |
6001 | :Returns: 0 on success; -1 on error | |
6002 | ||
6003 | This capability enables trapping of #GP invoking RDMSR and WRMSR instructions | |
6004 | into user space. | |
6005 | ||
6006 | When a guest requests to read or write an MSR, KVM may not implement all MSRs | |
6007 | that are relevant to a respective system. It also does not differentiate by | |
6008 | CPU type. | |
6009 | ||
6010 | To allow more fine grained control over MSR handling, user space may enable | |
6011 | this capability. With it enabled, MSR accesses that match the mask specified in | |
6012 | args[0] and trigger a #GP event inside the guest by KVM will instead trigger | |
6013 | KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR exit notifications which user space | |
6014 | can then handle to implement model specific MSR handling and/or user notifications | |
6015 | to inform a user that an MSR was not handled. | |
6016 | ||
e928e9cb | 6017 | 8. Other capabilities. |
106ee47d | 6018 | ====================== |
e928e9cb ME |
6019 | |
6020 | This section lists capabilities that give information about other | |
6021 | features of the KVM implementation. | |
6022 | ||
6023 | 8.1 KVM_CAP_PPC_HWRNG | |
106ee47d | 6024 | --------------------- |
e928e9cb | 6025 | |
106ee47d | 6026 | :Architectures: ppc |
e928e9cb ME |
6027 | |
6028 | This capability, if KVM_CHECK_EXTENSION indicates that it is | |
3747c5d3 | 6029 | available, means that the kernel has an implementation of the |
e928e9cb ME |
6030 | H_RANDOM hypercall backed by a hardware random-number generator. |
6031 | If present, the kernel H_RANDOM handler can be enabled for guest use | |
6032 | with the KVM_CAP_PPC_ENABLE_HCALL capability. | |
5c919412 AS |
6033 | |
6034 | 8.2 KVM_CAP_HYPERV_SYNIC | |
106ee47d MCC |
6035 | ------------------------ |
6036 | ||
6037 | :Architectures: x86 | |
5c919412 | 6038 | |
5c919412 | 6039 | This capability, if KVM_CHECK_EXTENSION indicates that it is |
3747c5d3 | 6040 | available, means that the kernel has an implementation of the |
5c919412 AS |
6041 | Hyper-V Synthetic interrupt controller(SynIC). Hyper-V SynIC is |
6042 | used to support Windows Hyper-V based guest paravirt drivers(VMBus). | |
6043 | ||
6044 | In order to use SynIC, it has to be activated by setting this | |
6045 | capability via KVM_ENABLE_CAP ioctl on the vcpu fd. Note that this | |
6046 | will disable the use of APIC hardware virtualization even if supported | |
6047 | by the CPU, as it's incompatible with SynIC auto-EOI behavior. | |
c9270132 PM |
6048 | |
6049 | 8.3 KVM_CAP_PPC_RADIX_MMU | |
106ee47d | 6050 | ------------------------- |
c9270132 | 6051 | |
106ee47d | 6052 | :Architectures: ppc |
c9270132 PM |
6053 | |
6054 | This capability, if KVM_CHECK_EXTENSION indicates that it is | |
3747c5d3 | 6055 | available, means that the kernel can support guests using the |
c9270132 PM |
6056 | radix MMU defined in Power ISA V3.00 (as implemented in the POWER9 |
6057 | processor). | |
6058 | ||
6059 | 8.4 KVM_CAP_PPC_HASH_MMU_V3 | |
106ee47d | 6060 | --------------------------- |
c9270132 | 6061 | |
106ee47d | 6062 | :Architectures: ppc |
c9270132 PM |
6063 | |
6064 | This capability, if KVM_CHECK_EXTENSION indicates that it is | |
3747c5d3 | 6065 | available, means that the kernel can support guests using the |
c9270132 PM |
6066 | hashed page table MMU defined in Power ISA V3.00 (as implemented in |
6067 | the POWER9 processor), including in-memory segment tables. | |
a8a3c426 JH |
6068 | |
6069 | 8.5 KVM_CAP_MIPS_VZ | |
106ee47d | 6070 | ------------------- |
a8a3c426 | 6071 | |
106ee47d | 6072 | :Architectures: mips |
a8a3c426 JH |
6073 | |
6074 | This capability, if KVM_CHECK_EXTENSION on the main kvm handle indicates that | |
6075 | it is available, means that full hardware assisted virtualization capabilities | |
6076 | of the hardware are available for use through KVM. An appropriate | |
6077 | KVM_VM_MIPS_* type must be passed to KVM_CREATE_VM to create a VM which | |
6078 | utilises it. | |
6079 | ||
6080 | If KVM_CHECK_EXTENSION on a kvm VM handle indicates that this capability is | |
6081 | available, it means that the VM is using full hardware assisted virtualization | |
6082 | capabilities of the hardware. This is useful to check after creating a VM with | |
6083 | KVM_VM_MIPS_DEFAULT. | |
6084 | ||
6085 | The value returned by KVM_CHECK_EXTENSION should be compared against known | |
6086 | values (see below). All other values are reserved. This is to allow for the | |
6087 | possibility of other hardware assisted virtualization implementations which | |
6088 | may be incompatible with the MIPS VZ ASE. | |
6089 | ||
106ee47d MCC |
6090 | == ========================================================================== |
6091 | 0 The trap & emulate implementation is in use to run guest code in user | |
a8a3c426 JH |
6092 | mode. Guest virtual memory segments are rearranged to fit the guest in the |
6093 | user mode address space. | |
6094 | ||
106ee47d | 6095 | 1 The MIPS VZ ASE is in use, providing full hardware assisted |
a8a3c426 | 6096 | virtualization, including standard guest virtual memory segments. |
106ee47d | 6097 | == ========================================================================== |
a8a3c426 JH |
6098 | |
6099 | 8.6 KVM_CAP_MIPS_TE | |
106ee47d | 6100 | ------------------- |
a8a3c426 | 6101 | |
106ee47d | 6102 | :Architectures: mips |
a8a3c426 JH |
6103 | |
6104 | This capability, if KVM_CHECK_EXTENSION on the main kvm handle indicates that | |
6105 | it is available, means that the trap & emulate implementation is available to | |
6106 | run guest code in user mode, even if KVM_CAP_MIPS_VZ indicates that hardware | |
6107 | assisted virtualisation is also available. KVM_VM_MIPS_TE (0) must be passed | |
6108 | to KVM_CREATE_VM to create a VM which utilises it. | |
6109 | ||
6110 | If KVM_CHECK_EXTENSION on a kvm VM handle indicates that this capability is | |
6111 | available, it means that the VM is using trap & emulate. | |
578fd61d JH |
6112 | |
6113 | 8.7 KVM_CAP_MIPS_64BIT | |
106ee47d | 6114 | ---------------------- |
578fd61d | 6115 | |
106ee47d | 6116 | :Architectures: mips |
578fd61d JH |
6117 | |
6118 | This capability indicates the supported architecture type of the guest, i.e. the | |
6119 | supported register and address width. | |
6120 | ||
6121 | The values returned when this capability is checked by KVM_CHECK_EXTENSION on a | |
6122 | kvm VM handle correspond roughly to the CP0_Config.AT register field, and should | |
6123 | be checked specifically against known values (see below). All other values are | |
6124 | reserved. | |
6125 | ||
106ee47d MCC |
6126 | == ======================================================================== |
6127 | 0 MIPS32 or microMIPS32. | |
578fd61d JH |
6128 | Both registers and addresses are 32-bits wide. |
6129 | It will only be possible to run 32-bit guest code. | |
6130 | ||
106ee47d | 6131 | 1 MIPS64 or microMIPS64 with access only to 32-bit compatibility segments. |
578fd61d JH |
6132 | Registers are 64-bits wide, but addresses are 32-bits wide. |
6133 | 64-bit guest code may run but cannot access MIPS64 memory segments. | |
6134 | It will also be possible to run 32-bit guest code. | |
6135 | ||
106ee47d | 6136 | 2 MIPS64 or microMIPS64 with access to all address segments. |
578fd61d JH |
6137 | Both registers and addresses are 64-bits wide. |
6138 | It will be possible to run 64-bit or 32-bit guest code. | |
106ee47d | 6139 | == ======================================================================== |
668fffa3 | 6140 | |
c24a7be2 | 6141 | 8.9 KVM_CAP_ARM_USER_IRQ |
106ee47d MCC |
6142 | ------------------------ |
6143 | ||
6144 | :Architectures: arm, arm64 | |
3fe17e68 | 6145 | |
3fe17e68 AG |
6146 | This capability, if KVM_CHECK_EXTENSION indicates that it is available, means |
6147 | that if userspace creates a VM without an in-kernel interrupt controller, it | |
6148 | will be notified of changes to the output level of in-kernel emulated devices, | |
6149 | which can generate virtual interrupts, presented to the VM. | |
6150 | For such VMs, on every return to userspace, the kernel | |
6151 | updates the vcpu's run->s.regs.device_irq_level field to represent the actual | |
6152 | output level of the device. | |
6153 | ||
6154 | Whenever kvm detects a change in the device output level, kvm guarantees at | |
6155 | least one return to userspace before running the VM. This exit could either | |
6156 | be a KVM_EXIT_INTR or any other exit event, like KVM_EXIT_MMIO. This way, | |
6157 | userspace can always sample the device output level and re-compute the state of | |
6158 | the userspace interrupt controller. Userspace should always check the state | |
6159 | of run->s.regs.device_irq_level on every kvm exit. | |
6160 | The value in run->s.regs.device_irq_level can represent both level and edge | |
6161 | triggered interrupt signals, depending on the device. Edge triggered interrupt | |
6162 | signals will exit to userspace with the bit in run->s.regs.device_irq_level | |
6163 | set exactly once per edge signal. | |
6164 | ||
6165 | The field run->s.regs.device_irq_level is available independent of | |
6166 | run->kvm_valid_regs or run->kvm_dirty_regs bits. | |
6167 | ||
6168 | If KVM_CAP_ARM_USER_IRQ is supported, the KVM_CHECK_EXTENSION ioctl returns a | |
6169 | number larger than 0 indicating the version of this capability is implemented | |
3747c5d3 | 6170 | and thereby which bits in run->s.regs.device_irq_level can signal values. |
3fe17e68 | 6171 | |
106ee47d | 6172 | Currently the following bits are defined for the device_irq_level bitmap:: |
3fe17e68 AG |
6173 | |
6174 | KVM_CAP_ARM_USER_IRQ >= 1: | |
6175 | ||
6176 | KVM_ARM_DEV_EL1_VTIMER - EL1 virtual timer | |
6177 | KVM_ARM_DEV_EL1_PTIMER - EL1 physical timer | |
6178 | KVM_ARM_DEV_PMU - ARM PMU overflow interrupt signal | |
6179 | ||
6180 | Future versions of kvm may implement additional events. These will get | |
6181 | indicated by returning a higher number from KVM_CHECK_EXTENSION and will be | |
6182 | listed above. | |
2ed4f9dd PM |
6183 | |
6184 | 8.10 KVM_CAP_PPC_SMT_POSSIBLE | |
106ee47d | 6185 | ----------------------------- |
2ed4f9dd | 6186 | |
106ee47d | 6187 | :Architectures: ppc |
2ed4f9dd PM |
6188 | |
6189 | Querying this capability returns a bitmap indicating the possible | |
6190 | virtual SMT modes that can be set using KVM_CAP_PPC_SMT. If bit N | |
6191 | (counting from the right) is set, then a virtual SMT mode of 2^N is | |
6192 | available. | |
efc479e6 RK |
6193 | |
6194 | 8.11 KVM_CAP_HYPERV_SYNIC2 | |
106ee47d | 6195 | -------------------------- |
efc479e6 | 6196 | |
106ee47d | 6197 | :Architectures: x86 |
efc479e6 RK |
6198 | |
6199 | This capability enables a newer version of Hyper-V Synthetic interrupt | |
6200 | controller (SynIC). The only difference with KVM_CAP_HYPERV_SYNIC is that KVM | |
6201 | doesn't clear SynIC message and event flags pages when they are enabled by | |
6202 | writing to the respective MSRs. | |
d3457c87 RK |
6203 | |
6204 | 8.12 KVM_CAP_HYPERV_VP_INDEX | |
106ee47d | 6205 | ---------------------------- |
d3457c87 | 6206 | |
106ee47d | 6207 | :Architectures: x86 |
d3457c87 RK |
6208 | |
6209 | This capability indicates that userspace can load HV_X64_MSR_VP_INDEX msr. Its | |
6210 | value is used to denote the target vcpu for a SynIC interrupt. For | |
6211 | compatibilty, KVM initializes this msr to KVM's internal vcpu index. When this | |
6212 | capability is absent, userspace can still query this msr's value. | |
da9a1446 CB |
6213 | |
6214 | 8.13 KVM_CAP_S390_AIS_MIGRATION | |
106ee47d | 6215 | ------------------------------- |
da9a1446 | 6216 | |
106ee47d MCC |
6217 | :Architectures: s390 |
6218 | :Parameters: none | |
da9a1446 CB |
6219 | |
6220 | This capability indicates if the flic device will be able to get/set the | |
6221 | AIS states for migration via the KVM_DEV_FLIC_AISM_ALL attribute and allows | |
6222 | to discover this without having to create a flic device. | |
5c2b4d5b CB |
6223 | |
6224 | 8.14 KVM_CAP_S390_PSW | |
106ee47d | 6225 | --------------------- |
5c2b4d5b | 6226 | |
106ee47d | 6227 | :Architectures: s390 |
5c2b4d5b CB |
6228 | |
6229 | This capability indicates that the PSW is exposed via the kvm_run structure. | |
6230 | ||
6231 | 8.15 KVM_CAP_S390_GMAP | |
106ee47d | 6232 | ---------------------- |
5c2b4d5b | 6233 | |
106ee47d | 6234 | :Architectures: s390 |
5c2b4d5b CB |
6235 | |
6236 | This capability indicates that the user space memory used as guest mapping can | |
6237 | be anywhere in the user memory address space, as long as the memory slots are | |
6238 | aligned and sized to a segment (1MB) boundary. | |
6239 | ||
6240 | 8.16 KVM_CAP_S390_COW | |
106ee47d | 6241 | --------------------- |
5c2b4d5b | 6242 | |
106ee47d | 6243 | :Architectures: s390 |
5c2b4d5b CB |
6244 | |
6245 | This capability indicates that the user space memory used as guest mapping can | |
6246 | use copy-on-write semantics as well as dirty pages tracking via read-only page | |
6247 | tables. | |
6248 | ||
6249 | 8.17 KVM_CAP_S390_BPB | |
106ee47d | 6250 | --------------------- |
5c2b4d5b | 6251 | |
106ee47d | 6252 | :Architectures: s390 |
5c2b4d5b CB |
6253 | |
6254 | This capability indicates that kvm will implement the interfaces to handle | |
6255 | reset, migration and nested KVM for branch prediction blocking. The stfle | |
6256 | facility 82 should not be provided to the guest without this capability. | |
c1aea919 | 6257 | |
2ddc6498 | 6258 | 8.18 KVM_CAP_HYPERV_TLBFLUSH |
106ee47d | 6259 | ---------------------------- |
c1aea919 | 6260 | |
106ee47d | 6261 | :Architectures: x86 |
c1aea919 VK |
6262 | |
6263 | This capability indicates that KVM supports paravirtualized Hyper-V TLB Flush | |
6264 | hypercalls: | |
6265 | HvFlushVirtualAddressSpace, HvFlushVirtualAddressSpaceEx, | |
6266 | HvFlushVirtualAddressList, HvFlushVirtualAddressListEx. | |
be26b3a7 | 6267 | |
688e0581 | 6268 | 8.19 KVM_CAP_ARM_INJECT_SERROR_ESR |
106ee47d | 6269 | ---------------------------------- |
be26b3a7 | 6270 | |
106ee47d | 6271 | :Architectures: arm, arm64 |
be26b3a7 DG |
6272 | |
6273 | This capability indicates that userspace can specify (via the | |
6274 | KVM_SET_VCPU_EVENTS ioctl) the syndrome value reported to the guest when it | |
6275 | takes a virtual SError interrupt exception. | |
6276 | If KVM advertises this capability, userspace can only specify the ISS field for | |
6277 | the ESR syndrome. Other parts of the ESR, such as the EC are generated by the | |
6278 | CPU when the exception is taken. If this virtual SError is taken to EL1 using | |
6279 | AArch64, this value will be reported in the ISS field of ESR_ELx. | |
6280 | ||
6281 | See KVM_CAP_VCPU_EVENTS for more details. | |
106ee47d | 6282 | |
214ff83d | 6283 | 8.20 KVM_CAP_HYPERV_SEND_IPI |
106ee47d | 6284 | ---------------------------- |
214ff83d | 6285 | |
106ee47d | 6286 | :Architectures: x86 |
214ff83d VK |
6287 | |
6288 | This capability indicates that KVM supports paravirtualized Hyper-V IPI send | |
6289 | hypercalls: | |
6290 | HvCallSendSyntheticClusterIpi, HvCallSendSyntheticClusterIpiEx. | |
106ee47d | 6291 | |
344c6c80 | 6292 | 8.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH |
106ee47d | 6293 | ----------------------------------- |
344c6c80 | 6294 | |
739c7af7 | 6295 | :Architectures: x86 |
344c6c80 TL |
6296 | |
6297 | This capability indicates that KVM running on top of Hyper-V hypervisor | |
6298 | enables Direct TLB flush for its guests meaning that TLB flush | |
6299 | hypercalls are handled by Level 0 hypervisor (Hyper-V) bypassing KVM. | |
6300 | Due to the different ABI for hypercall parameters between Hyper-V and | |
6301 | KVM, enabling this capability effectively disables all hypercall | |
6302 | handling by KVM (as some KVM hypercall may be mistakenly treated as TLB | |
6303 | flush hypercalls by Hyper-V) so userspace should disable KVM identification | |
6304 | in CPUID and only exposes Hyper-V identification. In this case, guest | |
6305 | thinks it's running on Hyper-V and only use Hyper-V hypercalls. | |
7de3f142 JF |
6306 | |
6307 | 8.22 KVM_CAP_S390_VCPU_RESETS | |
739c7af7 | 6308 | ----------------------------- |
7de3f142 | 6309 | |
739c7af7 | 6310 | :Architectures: s390 |
7de3f142 JF |
6311 | |
6312 | This capability indicates that the KVM_S390_NORMAL_RESET and | |
6313 | KVM_S390_CLEAR_RESET ioctls are available. | |
04ed89dc JF |
6314 | |
6315 | 8.23 KVM_CAP_S390_PROTECTED | |
739c7af7 | 6316 | --------------------------- |
04ed89dc | 6317 | |
739c7af7 | 6318 | :Architectures: s390 |
04ed89dc JF |
6319 | |
6320 | This capability indicates that the Ultravisor has been initialized and | |
6321 | KVM can therefore start protected VMs. | |
6322 | This capability governs the KVM_S390_PV_COMMAND ioctl and the | |
6323 | KVM_MP_STATE_LOAD MP_STATE. KVM_SET_MP_STATE can fail for protected | |
6324 | guests when the state change is invalid. | |
004a0124 AJ |
6325 | |
6326 | 8.24 KVM_CAP_STEAL_TIME | |
6327 | ----------------------- | |
6328 | ||
6329 | :Architectures: arm64, x86 | |
6330 | ||
6331 | This capability indicates that KVM supports steal time accounting. | |
6332 | When steal time accounting is supported it may be enabled with | |
6333 | architecture-specific interfaces. This capability and the architecture- | |
6334 | specific interfaces must be consistent, i.e. if one says the feature | |
6335 | is supported, than the other should as well and vice versa. For arm64 | |
6336 | see Documentation/virt/kvm/devices/vcpu.rst "KVM_ARM_VCPU_PVTIME_CTRL". | |
6337 | For x86 see Documentation/virt/kvm/msr.rst "MSR_KVM_STEAL_TIME". | |
f20d4e92 CW |
6338 | |
6339 | 8.25 KVM_CAP_S390_DIAG318 | |
6340 | ------------------------- | |
6341 | ||
6342 | :Architectures: s390 | |
6343 | ||
6344 | This capability enables a guest to set information about its control program | |
6345 | (i.e. guest kernel type and version). The information is helpful during | |
6346 | system/firmware service events, providing additional data about the guest | |
6347 | environments running on the machine. | |
6348 | ||
6349 | The information is associated with the DIAGNOSE 0x318 instruction, which sets | |
6350 | an 8-byte value consisting of a one-byte Control Program Name Code (CPNC) and | |
6351 | a 7-byte Control Program Version Code (CPVC). The CPNC determines what | |
6352 | environment the control program is running in (e.g. Linux, z/VM...), and the | |
6353 | CPVC is used for information specific to OS (e.g. Linux version, Linux | |
6354 | distribution...) | |
6355 | ||
6356 | If this capability is available, then the CPNC and CPVC can be synchronized | |
6357 | between KVM and userspace via the sync regs mechanism (KVM_SYNC_DIAG318). | |
1ae09954 AG |
6358 | |
6359 | 8.26 KVM_CAP_X86_USER_SPACE_MSR | |
6360 | ------------------------------- | |
6361 | ||
6362 | :Architectures: x86 | |
6363 | ||
6364 | This capability indicates that KVM supports deflection of MSR reads and | |
6365 | writes to user space. It can be enabled on a VM level. If enabled, MSR | |
6366 | accesses that would usually trigger a #GP by KVM into the guest will | |
6367 | instead get bounced to user space through the KVM_EXIT_X86_RDMSR and | |
6368 | KVM_EXIT_X86_WRMSR exit notifications. | |
1a155254 AG |
6369 | |
6370 | 8.25 KVM_X86_SET_MSR_FILTER | |
6371 | --------------------------- | |
6372 | ||
6373 | :Architectures: x86 | |
6374 | ||
6375 | This capability indicates that KVM supports that accesses to user defined MSRs | |
6376 | may be rejected. With this capability exposed, KVM exports new VM ioctl | |
6377 | KVM_X86_SET_MSR_FILTER which user space can call to specify bitmaps of MSR | |
6378 | ranges that KVM should reject access to. | |
6379 | ||
6380 | In combination with KVM_CAP_X86_USER_SPACE_MSR, this allows user space to | |
6381 | trap and emulate MSRs that are outside of the scope of KVM as well as | |
6382 | limit the attack surface on KVM's MSR emulation code. | |
66570e96 OU |
6383 | |
6384 | ||
6385 | 8.26 KVM_CAP_ENFORCE_PV_CPUID | |
6386 | ----------------------------- | |
6387 | ||
6388 | Architectures: x86 | |
6389 | ||
6390 | When enabled, KVM will disable paravirtual features provided to the | |
6391 | guest according to the bits in the KVM_CPUID_FEATURES CPUID leaf | |
6392 | (0x40000001). Otherwise, a guest may use the paravirtual features | |
6393 | regardless of what has actually been exposed through the CPUID leaf. |