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Commit | Line | Data |
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a1a9cb0c | 1 | /* |
940e43aa | 2 | * QEMU accel class, system emulation components |
a1a9cb0c EH |
3 | * |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * Copyright (c) 2014 Red Hat Inc. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
d38ea87a | 26 | #include "qemu/osdep.h" |
940e43aa | 27 | #include "qemu/accel.h" |
f6a1ef64 | 28 | #include "hw/boards.h" |
b86f59c7 CF |
29 | #include "sysemu/cpus.h" |
30 | ||
31 | #include "accel-softmmu.h" | |
a1a9cb0c | 32 | |
fc5cf826 | 33 | int accel_init_machine(AccelState *accel, MachineState *ms) |
d95c8527 | 34 | { |
fc5cf826 | 35 | AccelClass *acc = ACCEL_GET_CLASS(accel); |
d95c8527 | 36 | int ret; |
ac2da55e | 37 | ms->accelerator = accel; |
d95c8527 | 38 | *(acc->allowed) = true; |
f6a1ef64 | 39 | ret = acc->init_machine(ms); |
d95c8527 | 40 | if (ret < 0) { |
ac2da55e | 41 | ms->accelerator = NULL; |
d95c8527 | 42 | *(acc->allowed) = false; |
ac2da55e | 43 | object_unref(OBJECT(accel)); |
79b9d4bd MA |
44 | } else { |
45 | object_set_accelerator_compat_props(acc->compat_props); | |
d95c8527 EH |
46 | } |
47 | return ret; | |
48 | } | |
49 | ||
ce7cdebd PMD |
50 | AccelState *current_accel(void) |
51 | { | |
52 | return current_machine->accelerator; | |
53 | } | |
54 | ||
7a64c17f IJ |
55 | void accel_setup_post(MachineState *ms) |
56 | { | |
57 | AccelState *accel = ms->accelerator; | |
58 | AccelClass *acc = ACCEL_GET_CLASS(accel); | |
59 | if (acc->setup_post) { | |
60 | acc->setup_post(ms, accel); | |
61 | } | |
62 | } | |
b86f59c7 CF |
63 | |
64 | /* initialize the arch-independent accel operation interfaces */ | |
65 | void accel_init_ops_interfaces(AccelClass *ac) | |
66 | { | |
67 | const char *ac_name; | |
68 | char *ops_name; | |
69 | AccelOpsClass *ops; | |
70 | ||
71 | ac_name = object_class_get_name(OBJECT_CLASS(ac)); | |
72 | g_assert(ac_name != NULL); | |
73 | ||
74 | ops_name = g_strdup_printf("%s" ACCEL_OPS_SUFFIX, ac_name); | |
f934907a | 75 | ops = ACCEL_OPS_CLASS(module_object_class_by_name(ops_name)); |
b86f59c7 CF |
76 | g_free(ops_name); |
77 | ||
78 | /* | |
79 | * all accelerators need to define ops, providing at least a mandatory | |
80 | * non-NULL create_vcpu_thread operation. | |
81 | */ | |
82 | g_assert(ops != NULL); | |
83 | if (ops->ops_init) { | |
84 | ops->ops_init(ops); | |
85 | } | |
86 | cpus_register_accel(ops); | |
87 | } | |
88 | ||
89 | static const TypeInfo accel_ops_type_info = { | |
90 | .name = TYPE_ACCEL_OPS, | |
91 | .parent = TYPE_OBJECT, | |
92 | .abstract = true, | |
93 | .class_size = sizeof(AccelOpsClass), | |
94 | }; | |
95 | ||
96 | static void accel_softmmu_register_types(void) | |
97 | { | |
98 | type_register_static(&accel_ops_type_info); | |
99 | } | |
100 | type_init(accel_softmmu_register_types); |