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CommitLineData
7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
fb0343d5 9 * version 2.1 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
a8d25326 19
7b31bbc2 20#include "qemu/osdep.h"
a8d25326 21#include "qemu-common.h"
740b1759 22#include "qemu/qemu-print.h"
78271684 23#include "hw/core/tcg-cpu-ops.h"
d9bb58e5 24#include "trace.h"
76cad711 25#include "disas/disas.h"
63c91552 26#include "exec/exec-all.h"
dcb32f1d 27#include "tcg/tcg.h"
1de7afc9 28#include "qemu/atomic.h"
c905a368 29#include "qemu/compiler.h"
c2aa5f81 30#include "qemu/timer.h"
79e2b9ae 31#include "qemu/rcu.h"
508127e2 32#include "exec/log.h"
8d04fb55 33#include "qemu/main-loop.h"
6220e900
PD
34#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
35#include "hw/i386/apic.h"
36#endif
d2528bdc 37#include "sysemu/cpus.h"
740b1759
CF
38#include "exec/cpu-all.h"
39#include "sysemu/cpu-timers.h"
6f060969 40#include "sysemu/replay.h"
4288eb26 41#include "exec/helper-proto.h"
e5ceadff 42#include "tb-hash.h"
e5ceadff 43#include "tb-context.h"
c03f041f 44#include "internal.h"
c2aa5f81
ST
45
46/* -icount align implementation. */
47
48typedef struct SyncClocks {
49 int64_t diff_clk;
50 int64_t last_cpu_icount;
7f7bc144 51 int64_t realtime_clock;
c2aa5f81
ST
52} SyncClocks;
53
54#if !defined(CONFIG_USER_ONLY)
55/* Allow the guest to have a max 3ms advance.
56 * The difference between the 2 clocks could therefore
57 * oscillate around 0.
58 */
59#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
60#define THRESHOLD_REDUCE 1.5
61#define MAX_DELAY_PRINT_RATE 2000000000LL
62#define MAX_NB_PRINTS 100
c2aa5f81 63
740b1759
CF
64static int64_t max_delay;
65static int64_t max_advance;
66
5e140196 67static void align_clocks(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
68{
69 int64_t cpu_icount;
70
71 if (!icount_align_option) {
72 return;
73 }
74
5e140196 75 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
8191d368 76 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount);
c2aa5f81
ST
77 sc->last_cpu_icount = cpu_icount;
78
79 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
80#ifndef _WIN32
81 struct timespec sleep_delay, rem_delay;
82 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
83 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
84 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 85 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
86 } else {
87 sc->diff_clk = 0;
88 }
89#else
90 Sleep(sc->diff_clk / SCALE_MS);
91 sc->diff_clk = 0;
92#endif
93 }
94}
95
7f7bc144
ST
96static void print_delay(const SyncClocks *sc)
97{
98 static float threshold_delay;
99 static int64_t last_realtime_clock;
100 static int nb_prints;
101
102 if (icount_align_option &&
103 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
104 nb_prints < MAX_NB_PRINTS) {
105 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
106 (-sc->diff_clk / (float)1000000000LL <
107 (threshold_delay - THRESHOLD_REDUCE))) {
108 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
740b1759
CF
109 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
110 threshold_delay - 1,
111 threshold_delay);
7f7bc144
ST
112 nb_prints++;
113 last_realtime_clock = sc->realtime_clock;
114 }
115 }
116}
117
5e140196 118static void init_delay_params(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
119{
120 if (!icount_align_option) {
121 return;
122 }
2e91cc62
PB
123 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
124 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
5e140196
RH
125 sc->last_cpu_icount
126 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
27498bef
ST
127 if (sc->diff_clk < max_delay) {
128 max_delay = sc->diff_clk;
129 }
130 if (sc->diff_clk > max_advance) {
131 max_advance = sc->diff_clk;
132 }
7f7bc144
ST
133
134 /* Print every 2s max if the guest is late. We limit the number
135 of printed messages to NB_PRINT_MAX(currently 100) */
136 print_delay(sc);
c2aa5f81
ST
137}
138#else
139static void align_clocks(SyncClocks *sc, const CPUState *cpu)
140{
141}
142
143static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
144{
145}
146#endif /* CONFIG USER ONLY */
7d13299d 147
043e35d9
RH
148uint32_t curr_cflags(CPUState *cpu)
149{
84f15616
RH
150 uint32_t cflags = cpu->tcg_cflags;
151
04f5b647 152 /*
c2ffd754
RH
153 * Record gdb single-step. We should be exiting the TB by raising
154 * EXCP_DEBUG, but to simplify other tests, disable chaining too.
155 *
04f5b647
RH
156 * For singlestep and -d nochain, suppress goto_tb so that
157 * we can log -d cpu,exec after every TB.
158 */
c2ffd754
RH
159 if (unlikely(cpu->singlestep_enabled)) {
160 cflags |= CF_NO_GOTO_TB | CF_NO_GOTO_PTR | CF_SINGLE_STEP | 1;
161 } else if (singlestep) {
04f5b647
RH
162 cflags |= CF_NO_GOTO_TB | 1;
163 } else if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
fb957011 164 cflags |= CF_NO_GOTO_TB;
84f15616
RH
165 }
166
167 return cflags;
043e35d9
RH
168}
169
632cb63d
RH
170/* Might cause an exception, so have a longjmp destination ready */
171static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
172 target_ulong cs_base,
173 uint32_t flags, uint32_t cflags)
174{
175 TranslationBlock *tb;
176 uint32_t hash;
177
178 /* we should never be trying to look up an INVALID tb */
179 tcg_debug_assert(!(cflags & CF_INVALID));
180
181 hash = tb_jmp_cache_hash_func(pc);
182 tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
183
184 if (likely(tb &&
185 tb->pc == pc &&
186 tb->cs_base == cs_base &&
187 tb->flags == flags &&
188 tb->trace_vcpu_dstate == *cpu->trace_dstate &&
189 tb_cflags(tb) == cflags)) {
190 return tb;
191 }
192 tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags);
193 if (tb == NULL) {
194 return NULL;
195 }
196 qatomic_set(&cpu->tb_jmp_cache[hash], tb);
197 return tb;
198}
199
abb0cd93
RH
200static inline void log_cpu_exec(target_ulong pc, CPUState *cpu,
201 const TranslationBlock *tb)
202{
203 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_CPU | CPU_LOG_EXEC))
204 && qemu_log_in_addr_range(pc)) {
205
206 qemu_log_mask(CPU_LOG_EXEC,
207 "Trace %d: %p [" TARGET_FMT_lx
7eabad36
RH
208 "/" TARGET_FMT_lx "/%08x/%08x] %s\n",
209 cpu->cpu_index, tb->tc.ptr, tb->cs_base, pc,
210 tb->flags, tb->cflags, lookup_symbol(pc));
abb0cd93
RH
211
212#if defined(DEBUG_DISAS)
213 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
214 FILE *logfile = qemu_log_lock();
215 int flags = 0;
216
217 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
218 flags |= CPU_DUMP_FPU;
219 }
220#if defined(TARGET_I386)
221 flags |= CPU_DUMP_CCOP;
222#endif
223 log_cpu_state(cpu, flags);
224 qemu_log_unlock(logfile);
225 }
226#endif /* DEBUG_DISAS */
227 }
228}
229
10c37828
RH
230static bool check_for_breakpoints(CPUState *cpu, target_ulong pc,
231 uint32_t *cflags)
232{
233 CPUBreakpoint *bp;
234 bool match_page = false;
235
236 if (likely(QTAILQ_EMPTY(&cpu->breakpoints))) {
237 return false;
238 }
239
240 /*
241 * Singlestep overrides breakpoints.
242 * This requirement is visible in the record-replay tests, where
243 * we would fail to make forward progress in reverse-continue.
244 *
245 * TODO: gdb singlestep should only override gdb breakpoints,
246 * so that one could (gdb) singlestep into the guest kernel's
247 * architectural breakpoint handler.
248 */
249 if (cpu->singlestep_enabled) {
250 return false;
251 }
252
253 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
254 /*
255 * If we have an exact pc match, trigger the breakpoint.
256 * Otherwise, note matches within the page.
257 */
258 if (pc == bp->pc) {
259 bool match_bp = false;
260
261 if (bp->flags & BP_GDB) {
262 match_bp = true;
263 } else if (bp->flags & BP_CPU) {
264#ifdef CONFIG_USER_ONLY
265 g_assert_not_reached();
266#else
267 CPUClass *cc = CPU_GET_CLASS(cpu);
268 assert(cc->tcg_ops->debug_check_breakpoint);
269 match_bp = cc->tcg_ops->debug_check_breakpoint(cpu);
270#endif
271 }
272
273 if (match_bp) {
274 cpu->exception_index = EXCP_DEBUG;
275 return true;
276 }
277 } else if (((pc ^ bp->pc) & TARGET_PAGE_MASK) == 0) {
278 match_page = true;
279 }
280 }
281
282 /*
283 * Within the same page as a breakpoint, single-step,
284 * returning to helper_lookup_tb_ptr after each insn looking
285 * for the actual breakpoint.
286 *
287 * TODO: Perhaps better to record all of the TBs associated
288 * with a given virtual page that contains a breakpoint, and
289 * then invalidate them when a new overlapping breakpoint is
290 * set on the page. Non-overlapping TBs would not be
291 * invalidated, nor would any TB need to be invalidated as
292 * breakpoints are removed.
293 */
294 if (match_page) {
295 *cflags = (*cflags & ~CF_COUNT_MASK) | CF_NO_GOTO_TB | 1;
296 }
297 return false;
298}
299
4288eb26
RH
300/**
301 * helper_lookup_tb_ptr: quick check for next tb
302 * @env: current cpu state
303 *
304 * Look for an existing TB matching the current cpu state.
305 * If found, return the code pointer. If not found, return
306 * the tcg epilogue so that we return into cpu_tb_exec.
307 */
308const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
309{
310 CPUState *cpu = env_cpu(env);
311 TranslationBlock *tb;
312 target_ulong cs_base, pc;
10c37828 313 uint32_t flags, cflags;
4288eb26
RH
314
315 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
316
10c37828
RH
317 cflags = curr_cflags(cpu);
318 if (check_for_breakpoints(cpu, pc, &cflags)) {
319 cpu_loop_exit(cpu);
320 }
321
322 tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
4288eb26
RH
323 if (tb == NULL) {
324 return tcg_code_gen_epilogue;
325 }
abb0cd93
RH
326
327 log_cpu_exec(pc, cpu, tb);
328
4288eb26
RH
329 return tb->tc.ptr;
330}
331
77211379 332/* Execute a TB, and fix up the CPU state afterwards if necessary */
c905a368
DB
333/*
334 * Disable CFI checks.
335 * TCG creates binary blobs at runtime, with the transformed code.
336 * A TB is a blob of binary code, created at runtime and called with an
337 * indirect function call. Since such function did not exist at compile time,
338 * the CFI runtime has no way to verify its signature and would fail.
339 * TCG is not considered a security-sensitive part of QEMU so this does not
340 * affect the impact of CFI in environment with high security requirements
341 */
eba40358
RH
342static inline TranslationBlock * QEMU_DISABLE_CFI
343cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
77211379
PM
344{
345 CPUArchState *env = cpu->env_ptr;
819af24b
SF
346 uintptr_t ret;
347 TranslationBlock *last_tb;
db0c51a3 348 const void *tb_ptr = itb->tc.ptr;
1a830635 349
abb0cd93 350 log_cpu_exec(itb->pc, cpu, itb);
03afa5f8 351
653b87eb 352 qemu_thread_jit_execute();
819af24b 353 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 354 cpu->can_do_io = 1;
eba40358
RH
355 /*
356 * TODO: Delay swapping back to the read-write region of the TB
357 * until we actually need to modify the TB. The read-only copy,
358 * coming from the rx region, shares the same host TLB entry as
359 * the code that executed the exit_tb opcode that arrived here.
360 * If we insist on touching both the RX and the RW pages, we
361 * double the host TLB pressure.
362 */
363 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK));
364 *tb_exit = ret & TB_EXIT_MASK;
365
366 trace_exec_tb_exit(last_tb, *tb_exit);
6db8b538 367
eba40358 368 if (*tb_exit > TB_EXIT_IDX1) {
77211379
PM
369 /* We didn't start executing this TB (eg because the instruction
370 * counter hit zero); we must restore the guest PC to the address
371 * of the start of the TB.
372 */
bdf7ae5b 373 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 374 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
375 "Stopped execution of TB chain before %p ["
376 TARGET_FMT_lx "] %s\n",
e7e168f4 377 last_tb->tc.ptr, last_tb->pc,
819af24b 378 lookup_symbol(last_tb->pc));
78271684
CF
379 if (cc->tcg_ops->synchronize_from_tb) {
380 cc->tcg_ops->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
381 } else {
382 assert(cc->set_pc);
819af24b 383 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 384 }
77211379 385 }
eba40358 386 return last_tb;
77211379
PM
387}
388
2e70f6ef 389
035ba06c
EH
390static void cpu_exec_enter(CPUState *cpu)
391{
392 CPUClass *cc = CPU_GET_CLASS(cpu);
393
78271684
CF
394 if (cc->tcg_ops->cpu_exec_enter) {
395 cc->tcg_ops->cpu_exec_enter(cpu);
80c4750b 396 }
035ba06c
EH
397}
398
399static void cpu_exec_exit(CPUState *cpu)
fdbc2b57 400{
08e73c48 401 CPUClass *cc = CPU_GET_CLASS(cpu);
035ba06c 402
78271684
CF
403 if (cc->tcg_ops->cpu_exec_exit) {
404 cc->tcg_ops->cpu_exec_exit(cpu);
80c4750b 405 }
035ba06c
EH
406}
407
408void cpu_exec_step_atomic(CPUState *cpu)
409{
6f04cb1c 410 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
fdbc2b57
RH
411 TranslationBlock *tb;
412 target_ulong cs_base, pc;
258afb48 413 uint32_t flags, cflags;
eba40358 414 int tb_exit;
fdbc2b57 415
08e73c48 416 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
886cc689 417 start_exclusive();
bfff072c
DC
418 g_assert(cpu == current_cpu);
419 g_assert(!cpu->running);
420 cpu->running = true;
886cc689 421
6f04cb1c 422 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
6f04cb1c 423
258afb48
RH
424 cflags = curr_cflags(cpu);
425 /* Execute in a serial context. */
426 cflags &= ~CF_PARALLEL;
427 /* After 1 insn, return and release the exclusive lock. */
428 cflags |= CF_NO_GOTO_TB | CF_NO_GOTO_PTR | 1;
10c37828
RH
429 /*
430 * No need to check_for_breakpoints here.
431 * We only arrive in cpu_exec_step_atomic after beginning execution
432 * of an insn that includes an atomic operation we can't handle.
433 * Any breakpoint for this insn will have been recognized earlier.
434 */
258afb48
RH
435
436 tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
4e2ca83e
EC
437 if (tb == NULL) {
438 mmap_lock();
95590e24 439 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
4e2ca83e
EC
440 mmap_unlock();
441 }
08e73c48 442
035ba06c 443 cpu_exec_enter(cpu);
08e73c48 444 /* execute the generated code */
4e2ca83e 445 trace_exec_tb(tb, pc);
eba40358 446 cpu_tb_exec(cpu, tb, &tb_exit);
035ba06c 447 cpu_exec_exit(cpu);
08e73c48 448 } else {
0ac20318 449 /*
08e73c48
PK
450 * The mmap_lock is dropped by tb_gen_code if it runs out of
451 * memory.
452 */
453#ifndef CONFIG_SOFTMMU
454 tcg_debug_assert(!have_mmap_lock());
455#endif
6aaa24f9
EC
456 if (qemu_mutex_iothread_locked()) {
457 qemu_mutex_unlock_iothread();
458 }
faa9372c 459 assert_no_pages_locked();
e6d86bed 460 qemu_plugin_disable_mem_helpers(cpu);
08e73c48 461 }
426eeecd 462
886cc689
AB
463
464 /*
465 * As we start the exclusive region before codegen we must still
466 * be in the region if we longjump out of either the codegen or
467 * the execution.
468 */
469 g_assert(cpu_in_exclusive_context(cpu));
bfff072c 470 cpu->running = false;
886cc689 471 end_exclusive();
fdbc2b57
RH
472}
473
909eaac9
EC
474struct tb_desc {
475 target_ulong pc;
476 target_ulong cs_base;
477 CPUArchState *env;
478 tb_page_addr_t phys_page1;
479 uint32_t flags;
bf253ac6 480 uint32_t cflags;
61a67f71 481 uint32_t trace_vcpu_dstate;
909eaac9
EC
482};
483
61b8cef1 484static bool tb_lookup_cmp(const void *p, const void *d)
909eaac9
EC
485{
486 const TranslationBlock *tb = p;
487 const struct tb_desc *desc = d;
488
489 if (tb->pc == desc->pc &&
490 tb->page_addr[0] == desc->phys_page1 &&
491 tb->cs_base == desc->cs_base &&
6d21e420 492 tb->flags == desc->flags &&
61a67f71 493 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
bf253ac6 494 tb_cflags(tb) == desc->cflags) {
909eaac9
EC
495 /* check next page if needed */
496 if (tb->page_addr[1] == -1) {
497 return true;
498 } else {
499 tb_page_addr_t phys_page2;
500 target_ulong virt_page2;
501
502 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
503 phys_page2 = get_page_addr_code(desc->env, virt_page2);
504 if (tb->page_addr[1] == phys_page2) {
505 return true;
506 }
507 }
508 }
509 return false;
510}
511
cedbcb01 512TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
4e2ca83e 513 target_ulong cs_base, uint32_t flags,
bf253ac6 514 uint32_t cflags)
8a40a180 515{
909eaac9
EC
516 tb_page_addr_t phys_pc;
517 struct tb_desc desc;
42bd3228 518 uint32_t h;
3b46e624 519
909eaac9
EC
520 desc.env = (CPUArchState *)cpu->env_ptr;
521 desc.cs_base = cs_base;
522 desc.flags = flags;
bf253ac6 523 desc.cflags = cflags;
61a67f71 524 desc.trace_vcpu_dstate = *cpu->trace_dstate;
909eaac9
EC
525 desc.pc = pc;
526 phys_pc = get_page_addr_code(desc.env, pc);
7252f2de
PM
527 if (phys_pc == -1) {
528 return NULL;
529 }
909eaac9 530 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
bf253ac6 531 h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
61b8cef1 532 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
9fd1a948
PB
533}
534
a8583393
RH
535void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
536{
537 if (TCG_TARGET_HAS_direct_jump) {
538 uintptr_t offset = tb->jmp_target_arg[n];
e7e168f4 539 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
1acbad0f
RH
540 uintptr_t jmp_rx = tc_ptr + offset;
541 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
542 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr);
a8583393
RH
543 } else {
544 tb->jmp_target_arg[n] = addr;
545 }
546}
547
a8583393
RH
548static inline void tb_add_jump(TranslationBlock *tb, int n,
549 TranslationBlock *tb_next)
550{
194125e3
EC
551 uintptr_t old;
552
653b87eb 553 qemu_thread_jit_write();
a8583393 554 assert(n < ARRAY_SIZE(tb->jmp_list_next));
194125e3
EC
555 qemu_spin_lock(&tb_next->jmp_lock);
556
557 /* make sure the destination TB is valid */
558 if (tb_next->cflags & CF_INVALID) {
559 goto out_unlock_next;
560 }
561 /* Atomically claim the jump destination slot only if it was NULL */
d73415a3
SH
562 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL,
563 (uintptr_t)tb_next);
194125e3
EC
564 if (old) {
565 goto out_unlock_next;
a8583393 566 }
194125e3
EC
567
568 /* patch the native jump address */
569 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
570
571 /* add in TB jmp list */
572 tb->jmp_list_next[n] = tb_next->jmp_list_head;
573 tb_next->jmp_list_head = (uintptr_t)tb | n;
574
575 qemu_spin_unlock(&tb_next->jmp_lock);
576
a8583393
RH
577 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
578 "Linking TBs %p [" TARGET_FMT_lx
579 "] index %d -> %p [" TARGET_FMT_lx "]\n",
e7e168f4
EC
580 tb->tc.ptr, tb->pc, n,
581 tb_next->tc.ptr, tb_next->pc);
194125e3 582 return;
a8583393 583
194125e3
EC
584 out_unlock_next:
585 qemu_spin_unlock(&tb_next->jmp_lock);
586 return;
a8583393
RH
587}
588
8b2d34e9
SF
589static inline bool cpu_handle_halt(CPUState *cpu)
590{
591 if (cpu->halted) {
592#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
4084893d 593 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
8b2d34e9 594 X86CPU *x86_cpu = X86_CPU(cpu);
8d04fb55 595 qemu_mutex_lock_iothread();
8b2d34e9
SF
596 apic_poll_irq(x86_cpu->apic_state);
597 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
8d04fb55 598 qemu_mutex_unlock_iothread();
8b2d34e9
SF
599 }
600#endif
601 if (!cpu_has_work(cpu)) {
8b2d34e9
SF
602 return true;
603 }
604
605 cpu->halted = 0;
606 }
607
608 return false;
609}
610
ea284766 611static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 612{
86025ee4 613 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
614 CPUWatchpoint *wp;
615
ff4700b0
AF
616 if (!cpu->watchpoint_hit) {
617 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
618 wp->flags &= ~BP_WATCHPOINT_HIT;
619 }
620 }
86025ee4 621
78271684
CF
622 if (cc->tcg_ops->debug_excp_handler) {
623 cc->tcg_ops->debug_excp_handler(cpu);
710384d0 624 }
1009d2ed
JK
625}
626
ea284766
SF
627static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
628{
17b50b0c
PD
629 if (cpu->exception_index < 0) {
630#ifndef CONFIG_USER_ONLY
631 if (replay_has_exception()
5e140196 632 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
a11bbb6a 633 /* Execute just one insn to trigger exception pending in the log */
c0ae396a 634 cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1;
17b50b0c
PD
635 }
636#endif
a11bbb6a 637 return false;
17b50b0c 638 }
17b50b0c
PD
639 if (cpu->exception_index >= EXCP_INTERRUPT) {
640 /* exit request from the cpu execution loop */
641 *ret = cpu->exception_index;
642 if (*ret == EXCP_DEBUG) {
643 cpu_handle_debug_exception(cpu);
644 }
645 cpu->exception_index = -1;
646 return true;
647 } else {
ea284766 648#if defined(CONFIG_USER_ONLY)
17b50b0c
PD
649 /* if user mode only, we simulate a fake exception
650 which will be handled outside the cpu execution
651 loop */
ea284766 652#if defined(TARGET_I386)
17b50b0c 653 CPUClass *cc = CPU_GET_CLASS(cpu);
12096421
PMD
654 cc->tcg_ops->fake_user_interrupt(cpu);
655#endif /* TARGET_I386 */
17b50b0c
PD
656 *ret = cpu->exception_index;
657 cpu->exception_index = -1;
658 return true;
659#else
660 if (replay_exception()) {
ea284766 661 CPUClass *cc = CPU_GET_CLASS(cpu);
17b50b0c 662 qemu_mutex_lock_iothread();
78271684 663 cc->tcg_ops->do_interrupt(cpu);
17b50b0c 664 qemu_mutex_unlock_iothread();
ea284766 665 cpu->exception_index = -1;
a7ba744f
LM
666
667 if (unlikely(cpu->singlestep_enabled)) {
668 /*
669 * After processing the exception, ensure an EXCP_DEBUG is
670 * raised when single-stepping so that GDB doesn't miss the
671 * next instruction.
672 */
673 *ret = EXCP_DEBUG;
674 cpu_handle_debug_exception(cpu);
675 return true;
676 }
17b50b0c
PD
677 } else if (!replay_has_interrupt()) {
678 /* give a chance to iothread in replay mode */
679 *ret = EXCP_INTERRUPT;
ea284766 680 return true;
ea284766 681 }
ea284766
SF
682#endif
683 }
684
685 return false;
686}
687
77c0fc4e 688#ifndef CONFIG_USER_ONLY
4084893d
PD
689/*
690 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
691 * "real" interrupt event later. It does not need to be recorded for
692 * replay purposes.
693 */
694static inline bool need_replay_interrupt(int interrupt_request)
695{
696#if defined(TARGET_I386)
697 return !(interrupt_request & CPU_INTERRUPT_POLL);
698#else
699 return true;
700#endif
701}
77c0fc4e 702#endif /* !CONFIG_USER_ONLY */
4084893d 703
209b71b6 704static inline bool cpu_handle_interrupt(CPUState *cpu,
c385e6e4
SF
705 TranslationBlock **last_tb)
706{
17b50b0c
PD
707 /* Clear the interrupt flag now since we're processing
708 * cpu->interrupt_request and cpu->exit_request.
d84be02d
DH
709 * Ensure zeroing happens before reading cpu->exit_request or
710 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
17b50b0c 711 */
d73415a3 712 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
c385e6e4 713
d73415a3 714 if (unlikely(qatomic_read(&cpu->interrupt_request))) {
8d04fb55
JK
715 int interrupt_request;
716 qemu_mutex_lock_iothread();
717 interrupt_request = cpu->interrupt_request;
c385e6e4
SF
718 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
719 /* Mask out external interrupts for this step. */
720 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
721 }
722 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
723 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
724 cpu->exception_index = EXCP_DEBUG;
8d04fb55 725 qemu_mutex_unlock_iothread();
209b71b6 726 return true;
c385e6e4 727 }
77c0fc4e 728#if !defined(CONFIG_USER_ONLY)
c385e6e4
SF
729 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
730 /* Do nothing */
731 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
732 replay_interrupt();
733 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
734 cpu->halted = 1;
735 cpu->exception_index = EXCP_HLT;
8d04fb55 736 qemu_mutex_unlock_iothread();
209b71b6 737 return true;
c385e6e4
SF
738 }
739#if defined(TARGET_I386)
740 else if (interrupt_request & CPU_INTERRUPT_INIT) {
741 X86CPU *x86_cpu = X86_CPU(cpu);
742 CPUArchState *env = &x86_cpu->env;
743 replay_interrupt();
65c9d60a 744 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
c385e6e4
SF
745 do_cpu_init(x86_cpu);
746 cpu->exception_index = EXCP_HALTED;
8d04fb55 747 qemu_mutex_unlock_iothread();
209b71b6 748 return true;
c385e6e4
SF
749 }
750#else
751 else if (interrupt_request & CPU_INTERRUPT_RESET) {
752 replay_interrupt();
753 cpu_reset(cpu);
8d04fb55 754 qemu_mutex_unlock_iothread();
209b71b6 755 return true;
c385e6e4 756 }
77c0fc4e 757#endif /* !TARGET_I386 */
c385e6e4
SF
758 /* The target hook has 3 exit conditions:
759 False when the interrupt isn't processed,
760 True when it is, and we should restart on a new TB,
761 and via longjmp via cpu_loop_exit. */
762 else {
77c0fc4e
PMD
763 CPUClass *cc = CPU_GET_CLASS(cpu);
764
78271684
CF
765 if (cc->tcg_ops->cpu_exec_interrupt &&
766 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
4084893d
PD
767 if (need_replay_interrupt(interrupt_request)) {
768 replay_interrupt();
769 }
ba3c35d9
RH
770 /*
771 * After processing the interrupt, ensure an EXCP_DEBUG is
772 * raised when single-stepping so that GDB doesn't miss the
773 * next instruction.
774 */
775 cpu->exception_index =
776 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
c385e6e4
SF
777 *last_tb = NULL;
778 }
8b1fe3f4
SF
779 /* The target hook may have updated the 'cpu->interrupt_request';
780 * reload the 'interrupt_request' value */
781 interrupt_request = cpu->interrupt_request;
c385e6e4 782 }
77c0fc4e 783#endif /* !CONFIG_USER_ONLY */
8b1fe3f4 784 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
785 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
786 /* ensure that no TB jump will be modified as
787 the program flow was changed */
788 *last_tb = NULL;
789 }
8d04fb55
JK
790
791 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
792 qemu_mutex_unlock_iothread();
c385e6e4 793 }
8d04fb55 794
cfb2d02b 795 /* Finally, check if we need to exit to the main loop. */
d73415a3 796 if (unlikely(qatomic_read(&cpu->exit_request))
740b1759 797 || (icount_enabled()
a11bbb6a 798 && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT)
5e140196 799 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
d73415a3 800 qatomic_set(&cpu->exit_request, 0);
5f3bdfd4
PD
801 if (cpu->exception_index == -1) {
802 cpu->exception_index = EXCP_INTERRUPT;
803 }
209b71b6 804 return true;
c385e6e4 805 }
209b71b6
PB
806
807 return false;
c385e6e4
SF
808}
809
928de9ee 810static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
cfb2d02b 811 TranslationBlock **last_tb, int *tb_exit)
928de9ee 812{
1aab16c2 813 int32_t insns_left;
928de9ee
SF
814
815 trace_exec_tb(tb, tb->pc);
eba40358 816 tb = cpu_tb_exec(cpu, tb, tb_exit);
1aab16c2
PB
817 if (*tb_exit != TB_EXIT_REQUESTED) {
818 *last_tb = tb;
819 return;
820 }
821
822 *last_tb = NULL;
d73415a3 823 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32);
1aab16c2 824 if (insns_left < 0) {
e5143e30
AB
825 /* Something asked us to stop executing chained TBs; just
826 * continue round the main loop. Whatever requested the exit
30f3dda2 827 * will also have set something else (eg exit_request or
17b50b0c
PD
828 * interrupt_request) which will be handled by
829 * cpu_handle_interrupt. cpu_handle_interrupt will also
830 * clear cpu->icount_decr.u16.high.
928de9ee 831 */
1aab16c2 832 return;
928de9ee 833 }
1aab16c2
PB
834
835 /* Instruction counter expired. */
740b1759 836 assert(icount_enabled());
1aab16c2 837#ifndef CONFIG_USER_ONLY
eda5f7c6 838 /* Ensure global icount has gone forward */
8191d368 839 icount_update(cpu);
eda5f7c6 840 /* Refill decrementer and continue execution. */
df3a2de5 841 insns_left = MIN(0xffff, cpu->icount_budget);
5e140196 842 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
eda5f7c6 843 cpu->icount_extra = cpu->icount_budget - insns_left;
bc662a33
AB
844
845 /*
846 * If the next tb has more instructions than we have left to
847 * execute we need to ensure we find/generate a TB with exactly
848 * insns_left instructions in it.
849 */
c8cf47a9
PM
850 if (insns_left > 0 && insns_left < tb->icount) {
851 assert(insns_left <= CF_COUNT_MASK);
852 assert(cpu->icount_extra == 0);
bc662a33 853 cpu->cflags_next_tb = (tb->cflags & ~CF_COUNT_MASK) | insns_left;
928de9ee 854 }
1aab16c2 855#endif
928de9ee
SF
856}
857
7d13299d
FB
858/* main execution loop */
859
ea3e9847 860int cpu_exec(CPUState *cpu)
7d13299d 861{
c385e6e4 862 int ret;
cfb2d02b 863 SyncClocks sc = { 0 };
c2aa5f81 864
6f060969
PD
865 /* replay_interrupt may need current_cpu */
866 current_cpu = cpu;
867
8b2d34e9
SF
868 if (cpu_handle_halt(cpu)) {
869 return EXCP_HALTED;
eda48c34 870 }
5a1e3cfc 871
79e2b9ae
PB
872 rcu_read_lock();
873
035ba06c 874 cpu_exec_enter(cpu);
9d27abd9 875
c2aa5f81
ST
876 /* Calculate difference between guest clock and host clock.
877 * This delay includes the delay of the last cycle, so
878 * what we have to do is sleep until it is 0. As for the
879 * advance/delay we gain here, we try to fix it next time.
880 */
881 init_delay_params(&sc, cpu);
882
4515e58d
PB
883 /* prepare setjmp context for exception handling */
884 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
19a84318 885#if defined(__clang__)
e6a41a04
PM
886 /*
887 * Some compilers wrongly smash all local variables after
888 * siglongjmp (the spec requires that only non-volatile locals
889 * which are changed between the sigsetjmp and siglongjmp are
890 * permitted to be trashed). There were bug reports for gcc
891 * 4.5.0 and clang. The bug is fixed in all versions of gcc
892 * that we support, but is still unfixed in clang:
893 * https://bugs.llvm.org/show_bug.cgi?id=21183
894 *
2521c775 895 * Reload an essential local variable here for those compilers.
e6a41a04
PM
896 * Newer versions of gcc would complain about this code (-Wclobbered),
897 * so we only perform the workaround for clang.
898 */
4515e58d 899 cpu = current_cpu;
e6a41a04 900#else
2521c775 901 /* Non-buggy compilers preserve this; assert the correct value. */
4515e58d 902 g_assert(cpu == current_cpu);
e6a41a04
PM
903#endif
904
0ac20318
EC
905#ifndef CONFIG_SOFTMMU
906 tcg_debug_assert(!have_mmap_lock());
907#endif
8d04fb55
JK
908 if (qemu_mutex_iothread_locked()) {
909 qemu_mutex_unlock_iothread();
910 }
e6d86bed
EC
911 qemu_plugin_disable_mem_helpers(cpu);
912
8fd3a9b8 913 assert_no_pages_locked();
4515e58d
PB
914 }
915
916 /* if an exception is pending, we execute it here */
917 while (!cpu_handle_exception(cpu, &ret)) {
918 TranslationBlock *last_tb = NULL;
919 int tb_exit = 0;
920
921 while (!cpu_handle_interrupt(cpu, &last_tb)) {
9b990ee5 922 TranslationBlock *tb;
11c1d5f8
RH
923 target_ulong cs_base, pc;
924 uint32_t flags, cflags;
925
10c37828
RH
926 cpu_get_tb_cpu_state(cpu->env_ptr, &pc, &cs_base, &flags);
927
11c1d5f8
RH
928 /*
929 * When requested, use an exact setting for cflags for the next
930 * execution. This is used for icount, precise smc, and stop-
931 * after-access watchpoints. Since this request should never
932 * have CF_INVALID set, -1 is a convenient invalid value that
933 * does not require tcg headers for cpu_common_reset.
934 */
935 cflags = cpu->cflags_next_tb;
9b990ee5 936 if (cflags == -1) {
c0ae396a 937 cflags = curr_cflags(cpu);
9b990ee5
RH
938 } else {
939 cpu->cflags_next_tb = -1;
940 }
941
10c37828
RH
942 if (check_for_breakpoints(cpu, pc, &cflags)) {
943 break;
944 }
11c1d5f8
RH
945
946 tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
947 if (tb == NULL) {
948 mmap_lock();
949 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
950 mmap_unlock();
951 /*
952 * We add the TB in the virtual pc hash table
953 * for the fast lookup
954 */
955 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
956 }
957
958#ifndef CONFIG_USER_ONLY
959 /*
960 * We don't take care of direct jumps when address mapping
961 * changes in system emulation. So it's not safe to make a
962 * direct jump to a TB spanning two pages because the mapping
963 * for the second page can change.
964 */
965 if (tb->page_addr[1] != -1) {
966 last_tb = NULL;
967 }
968#endif
969 /* See if we can patch the calling TB. */
970 if (last_tb) {
971 tb_add_jump(last_tb, tb_exit, tb);
972 }
973
cfb2d02b 974 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
11c1d5f8 975
4515e58d
PB
976 /* Try to align the host and virtual clocks
977 if the guest is in advance */
978 align_clocks(&sc, cpu);
7d13299d 979 }
4515e58d 980 }
3fb2ded1 981
035ba06c 982 cpu_exec_exit(cpu);
79e2b9ae 983 rcu_read_unlock();
1057eaa7 984
7d13299d
FB
985 return ret;
986}
740b1759 987
7df5e3d6
CF
988void tcg_exec_realizefn(CPUState *cpu, Error **errp)
989{
990 static bool tcg_target_initialized;
991 CPUClass *cc = CPU_GET_CLASS(cpu);
992
993 if (!tcg_target_initialized) {
78271684 994 cc->tcg_ops->initialize();
7df5e3d6
CF
995 tcg_target_initialized = true;
996 }
997 tlb_init(cpu);
998 qemu_plugin_vcpu_init_hook(cpu);
999
1000#ifndef CONFIG_USER_ONLY
1001 tcg_iommu_init_notifier_list(cpu);
1002#endif /* !CONFIG_USER_ONLY */
1003}
1004
1005/* undo the initializations in reverse order */
1006void tcg_exec_unrealizefn(CPUState *cpu)
1007{
1008#ifndef CONFIG_USER_ONLY
1009 tcg_iommu_free_notifier_list(cpu);
1010#endif /* !CONFIG_USER_ONLY */
1011
1012 qemu_plugin_vcpu_exit_hook(cpu);
1013 tlb_destroy(cpu);
1014}
1015
740b1759
CF
1016#ifndef CONFIG_USER_ONLY
1017
1018void dump_drift_info(void)
1019{
1020 if (!icount_enabled()) {
1021 return;
1022 }
1023
1024 qemu_printf("Host - Guest clock %"PRIi64" ms\n",
8191d368 1025 (cpu_get_clock() - icount_get()) / SCALE_MS);
740b1759
CF
1026 if (icount_align_option) {
1027 qemu_printf("Max guest delay %"PRIi64" ms\n",
1028 -max_delay / SCALE_MS);
1029 qemu_printf("Max guest advance %"PRIi64" ms\n",
1030 max_advance / SCALE_MS);
1031 } else {
1032 qemu_printf("Max guest delay NA\n");
1033 qemu_printf("Max guest advance NA\n");
1034 }
1035}
1036
1037#endif /* !CONFIG_USER_ONLY */