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1da177e4 LT |
1 | #ifndef __ALPHA_PCI_H |
2 | #define __ALPHA_PCI_H | |
3 | ||
4 | #ifdef __KERNEL__ | |
5 | ||
6 | #include <linux/spinlock.h> | |
7c53664d | 7 | #include <linux/dma-mapping.h> |
84be456f | 8 | #include <linux/scatterlist.h> |
1da177e4 LT |
9 | #include <asm/machvec.h> |
10 | ||
11 | /* | |
12 | * The following structure is used to manage multiple PCI busses. | |
13 | */ | |
14 | ||
15 | struct pci_dev; | |
16 | struct pci_bus; | |
17 | struct resource; | |
18 | struct pci_iommu_arena; | |
19 | struct page; | |
20 | ||
21 | /* A controller. Used to manage multiple PCI busses. */ | |
22 | ||
23 | struct pci_controller { | |
24 | struct pci_controller *next; | |
25 | struct pci_bus *bus; | |
26 | struct resource *io_space; | |
27 | struct resource *mem_space; | |
28 | ||
29 | /* The following are for reporting to userland. The invariant is | |
30 | that if we report a BWX-capable dense memory, we do not report | |
31 | a sparse memory at all, even if it exists. */ | |
32 | unsigned long sparse_mem_base; | |
33 | unsigned long dense_mem_base; | |
34 | unsigned long sparse_io_base; | |
35 | unsigned long dense_io_base; | |
36 | ||
37 | /* This one's for the kernel only. It's in KSEG somewhere. */ | |
38 | unsigned long config_space_base; | |
39 | ||
40 | unsigned int index; | |
41 | /* For compatibility with current (as of July 2003) pciutils | |
42 | and XFree86. Eventually will be removed. */ | |
43 | unsigned int need_domain_info; | |
44 | ||
45 | struct pci_iommu_arena *sg_pci; | |
46 | struct pci_iommu_arena *sg_isa; | |
47 | ||
48 | void *sysdata; | |
49 | }; | |
50 | ||
51 | /* Override the logic in pci_scan_bus for skipping already-configured | |
52 | bus numbers. */ | |
53 | ||
54 | #define pcibios_assign_all_busses() 1 | |
1da177e4 LT |
55 | |
56 | #define PCIBIOS_MIN_IO alpha_mv.min_io_address | |
57 | #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address | |
58 | ||
59 | extern void pcibios_set_master(struct pci_dev *dev); | |
60 | ||
1da177e4 LT |
61 | /* IOMMU controls. */ |
62 | ||
63 | /* The PCI address space does not equal the physical memory address space. | |
64 | The networking and block device layers use this boolean for bounce buffer | |
65 | decisions. */ | |
66 | #define PCI_DMA_BUS_IS_PHYS 0 | |
67 | ||
1da177e4 LT |
68 | /* TODO: integrate with include/asm-generic/pci.h ? */ |
69 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | |
70 | { | |
71 | return channel ? 15 : 14; | |
72 | } | |
73 | ||
1da177e4 LT |
74 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index |
75 | ||
76 | static inline int pci_proc_domain(struct pci_bus *bus) | |
77 | { | |
78 | struct pci_controller *hose = bus->sysdata; | |
79 | return hose->need_domain_info; | |
80 | } | |
81 | ||
1da177e4 LT |
82 | #endif /* __KERNEL__ */ |
83 | ||
84 | /* Values for the `which' argument to sys_pciconfig_iobase. */ | |
85 | #define IOBASE_HOSE 0 | |
86 | #define IOBASE_SPARSE_MEM 1 | |
87 | #define IOBASE_DENSE_MEM 2 | |
88 | #define IOBASE_SPARSE_IO 3 | |
89 | #define IOBASE_DENSE_IO 4 | |
90 | #define IOBASE_ROOT_BUS 5 | |
91 | #define IOBASE_FROM_HOSE 0x10000 | |
92 | ||
8255cf35 AB |
93 | extern struct pci_dev *isa_bridge; |
94 | ||
10a0ef39 IK |
95 | extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, |
96 | size_t count); | |
97 | extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, | |
98 | size_t count); | |
99 | extern int pci_mmap_legacy_page_range(struct pci_bus *bus, | |
100 | struct vm_area_struct *vma, | |
101 | enum pci_mmap_state mmap_state); | |
102 | extern void pci_adjust_legacy_attr(struct pci_bus *bus, | |
103 | enum pci_mmap_state mmap_type); | |
104 | #define HAVE_PCI_LEGACY 1 | |
105 | ||
106 | extern int pci_create_resource_files(struct pci_dev *dev); | |
107 | extern void pci_remove_resource_files(struct pci_dev *dev); | |
108 | ||
1da177e4 | 109 | #endif /* __ALPHA_PCI_H */ |