]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/alpha/include/asm/uaccess.h
Merge remote-tracking branches 'asoc/topic/sgtl5000', 'asoc/topic/simple', 'asoc...
[mirror_ubuntu-bionic-kernel.git] / arch / alpha / include / asm / uaccess.h
CommitLineData
1da177e4
LT
1#ifndef __ALPHA_UACCESS_H
2#define __ALPHA_UACCESS_H
3
4#include <linux/errno.h>
5#include <linux/sched.h>
6
7
8/*
9 * The fs value determines whether argument validity checking should be
10 * performed or not. If get_fs() == USER_DS, checking is performed, with
11 * get_fs() == KERNEL_DS, checking is bypassed.
12 *
13 * Or at least it did once upon a time. Nowadays it is a mask that
14 * defines which bits of the address space are off limits. This is a
15 * wee bit faster than the above.
16 *
17 * For historical reasons, these macros are grossly misnamed.
18 */
19
20#define KERNEL_DS ((mm_segment_t) { 0UL })
21#define USER_DS ((mm_segment_t) { -0x40000000000UL })
22
23#define VERIFY_READ 0
24#define VERIFY_WRITE 1
25
26#define get_fs() (current_thread_info()->addr_limit)
27#define get_ds() (KERNEL_DS)
28#define set_fs(x) (current_thread_info()->addr_limit = (x))
29
4fb9bccb 30#define segment_eq(a, b) ((a).seg == (b).seg)
1da177e4
LT
31
32/*
33 * Is a address valid? This does a straightforward calculation rather
34 * than tests.
35 *
36 * Address valid if:
37 * - "addr" doesn't have any high-bits set
38 * - AND "size" doesn't have any high-bits set
39 * - AND "addr+size" doesn't have any high-bits set
40 * - OR we are in kernel mode.
41 */
4fb9bccb 42#define __access_ok(addr, size, segment) \
1da177e4
LT
43 (((segment).seg & (addr | size | (addr+size))) == 0)
44
4fb9bccb 45#define access_ok(type, addr, size) \
1da177e4
LT
46({ \
47 __chk_user_ptr(addr); \
4fb9bccb 48 __access_ok(((unsigned long)(addr)), (size), get_fs()); \
1da177e4
LT
49})
50
1da177e4
LT
51/*
52 * These are the main single-value transfer routines. They automatically
53 * use the right size if we just have the right pointer type.
54 *
55 * As the alpha uses the same address space for kernel and user
56 * data, we can just do these as direct assignments. (Of course, the
57 * exception handling means that it's no longer "just"...)
58 *
59 * Careful to not
60 * (a) re-use the arguments for side effects (sizeof/typeof is ok)
61 * (b) require any knowledge of processes at this stage
62 */
4fb9bccb
MT
63#define put_user(x, ptr) \
64 __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)), get_fs())
65#define get_user(x, ptr) \
66 __get_user_check((x), (ptr), sizeof(*(ptr)), get_fs())
1da177e4
LT
67
68/*
69 * The "__xxx" versions do not do address space checking, useful when
70 * doing multiple accesses to the same area (the programmer has to do the
71 * checks by hand with "access_ok()")
72 */
4fb9bccb
MT
73#define __put_user(x, ptr) \
74 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
75#define __get_user(x, ptr) \
76 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
1da177e4
LT
77
78/*
79 * The "lda %1, 2b-1b(%0)" bits are magic to get the assembler to
80 * encode the bits we need for resolving the exception. See the
81 * more extensive comments with fixup_inline_exception below for
82 * more information.
83 */
84
85extern void __get_user_unknown(void);
86
4fb9bccb 87#define __get_user_nocheck(x, ptr, size) \
1da177e4
LT
88({ \
89 long __gu_err = 0; \
90 unsigned long __gu_val; \
91 __chk_user_ptr(ptr); \
92 switch (size) { \
93 case 1: __get_user_8(ptr); break; \
94 case 2: __get_user_16(ptr); break; \
95 case 4: __get_user_32(ptr); break; \
96 case 8: __get_user_64(ptr); break; \
97 default: __get_user_unknown(); break; \
98 } \
1ab5786a 99 (x) = (__force __typeof__(*(ptr))) __gu_val; \
1da177e4
LT
100 __gu_err; \
101})
102
4fb9bccb 103#define __get_user_check(x, ptr, size, segment) \
1da177e4
LT
104({ \
105 long __gu_err = -EFAULT; \
106 unsigned long __gu_val = 0; \
107 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
4fb9bccb 108 if (__access_ok((unsigned long)__gu_addr, size, segment)) { \
1da177e4
LT
109 __gu_err = 0; \
110 switch (size) { \
111 case 1: __get_user_8(__gu_addr); break; \
112 case 2: __get_user_16(__gu_addr); break; \
113 case 4: __get_user_32(__gu_addr); break; \
114 case 8: __get_user_64(__gu_addr); break; \
115 default: __get_user_unknown(); break; \
116 } \
117 } \
1ab5786a 118 (x) = (__force __typeof__(*(ptr))) __gu_val; \
1da177e4
LT
119 __gu_err; \
120})
121
122struct __large_struct { unsigned long buf[100]; };
123#define __m(x) (*(struct __large_struct __user *)(x))
124
125#define __get_user_64(addr) \
126 __asm__("1: ldq %0,%2\n" \
127 "2:\n" \
128 ".section __ex_table,\"a\"\n" \
129 " .long 1b - .\n" \
130 " lda %0, 2b-1b(%1)\n" \
131 ".previous" \
132 : "=r"(__gu_val), "=r"(__gu_err) \
133 : "m"(__m(addr)), "1"(__gu_err))
134
135#define __get_user_32(addr) \
136 __asm__("1: ldl %0,%2\n" \
137 "2:\n" \
138 ".section __ex_table,\"a\"\n" \
139 " .long 1b - .\n" \
140 " lda %0, 2b-1b(%1)\n" \
141 ".previous" \
142 : "=r"(__gu_val), "=r"(__gu_err) \
143 : "m"(__m(addr)), "1"(__gu_err))
144
145#ifdef __alpha_bwx__
146/* Those lucky bastards with ev56 and later CPUs can do byte/word moves. */
147
148#define __get_user_16(addr) \
149 __asm__("1: ldwu %0,%2\n" \
150 "2:\n" \
151 ".section __ex_table,\"a\"\n" \
152 " .long 1b - .\n" \
153 " lda %0, 2b-1b(%1)\n" \
154 ".previous" \
155 : "=r"(__gu_val), "=r"(__gu_err) \
156 : "m"(__m(addr)), "1"(__gu_err))
157
158#define __get_user_8(addr) \
159 __asm__("1: ldbu %0,%2\n" \
160 "2:\n" \
161 ".section __ex_table,\"a\"\n" \
162 " .long 1b - .\n" \
163 " lda %0, 2b-1b(%1)\n" \
164 ".previous" \
165 : "=r"(__gu_val), "=r"(__gu_err) \
166 : "m"(__m(addr)), "1"(__gu_err))
167#else
168/* Unfortunately, we can't get an unaligned access trap for the sub-word
169 load, so we have to do a general unaligned operation. */
170
171#define __get_user_16(addr) \
172{ \
173 long __gu_tmp; \
174 __asm__("1: ldq_u %0,0(%3)\n" \
175 "2: ldq_u %1,1(%3)\n" \
176 " extwl %0,%3,%0\n" \
177 " extwh %1,%3,%1\n" \
178 " or %0,%1,%0\n" \
179 "3:\n" \
180 ".section __ex_table,\"a\"\n" \
181 " .long 1b - .\n" \
182 " lda %0, 3b-1b(%2)\n" \
183 " .long 2b - .\n" \
184 " lda %0, 3b-2b(%2)\n" \
185 ".previous" \
186 : "=&r"(__gu_val), "=&r"(__gu_tmp), "=r"(__gu_err) \
187 : "r"(addr), "2"(__gu_err)); \
188}
189
190#define __get_user_8(addr) \
191 __asm__("1: ldq_u %0,0(%2)\n" \
192 " extbl %0,%2,%0\n" \
193 "2:\n" \
194 ".section __ex_table,\"a\"\n" \
195 " .long 1b - .\n" \
196 " lda %0, 2b-1b(%1)\n" \
197 ".previous" \
198 : "=&r"(__gu_val), "=r"(__gu_err) \
199 : "r"(addr), "1"(__gu_err))
200#endif
201
202extern void __put_user_unknown(void);
203
4fb9bccb 204#define __put_user_nocheck(x, ptr, size) \
1da177e4
LT
205({ \
206 long __pu_err = 0; \
207 __chk_user_ptr(ptr); \
208 switch (size) { \
4fb9bccb
MT
209 case 1: __put_user_8(x, ptr); break; \
210 case 2: __put_user_16(x, ptr); break; \
211 case 4: __put_user_32(x, ptr); break; \
212 case 8: __put_user_64(x, ptr); break; \
1da177e4
LT
213 default: __put_user_unknown(); break; \
214 } \
215 __pu_err; \
216})
217
4fb9bccb 218#define __put_user_check(x, ptr, size, segment) \
1da177e4
LT
219({ \
220 long __pu_err = -EFAULT; \
221 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
4fb9bccb 222 if (__access_ok((unsigned long)__pu_addr, size, segment)) { \
1da177e4
LT
223 __pu_err = 0; \
224 switch (size) { \
4fb9bccb
MT
225 case 1: __put_user_8(x, __pu_addr); break; \
226 case 2: __put_user_16(x, __pu_addr); break; \
227 case 4: __put_user_32(x, __pu_addr); break; \
228 case 8: __put_user_64(x, __pu_addr); break; \
1da177e4
LT
229 default: __put_user_unknown(); break; \
230 } \
231 } \
232 __pu_err; \
233})
234
235/*
236 * The "__put_user_xx()" macros tell gcc they read from memory
237 * instead of writing: this is because they do not write to
238 * any memory gcc knows about, so there are no aliasing issues
239 */
4fb9bccb 240#define __put_user_64(x, addr) \
1da177e4
LT
241__asm__ __volatile__("1: stq %r2,%1\n" \
242 "2:\n" \
243 ".section __ex_table,\"a\"\n" \
244 " .long 1b - .\n" \
245 " lda $31,2b-1b(%0)\n" \
246 ".previous" \
247 : "=r"(__pu_err) \
248 : "m" (__m(addr)), "rJ" (x), "0"(__pu_err))
249
4fb9bccb 250#define __put_user_32(x, addr) \
1da177e4
LT
251__asm__ __volatile__("1: stl %r2,%1\n" \
252 "2:\n" \
253 ".section __ex_table,\"a\"\n" \
254 " .long 1b - .\n" \
255 " lda $31,2b-1b(%0)\n" \
256 ".previous" \
257 : "=r"(__pu_err) \
258 : "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
259
260#ifdef __alpha_bwx__
261/* Those lucky bastards with ev56 and later CPUs can do byte/word moves. */
262
4fb9bccb 263#define __put_user_16(x, addr) \
1da177e4
LT
264__asm__ __volatile__("1: stw %r2,%1\n" \
265 "2:\n" \
266 ".section __ex_table,\"a\"\n" \
267 " .long 1b - .\n" \
268 " lda $31,2b-1b(%0)\n" \
269 ".previous" \
270 : "=r"(__pu_err) \
271 : "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
272
4fb9bccb 273#define __put_user_8(x, addr) \
1da177e4
LT
274__asm__ __volatile__("1: stb %r2,%1\n" \
275 "2:\n" \
276 ".section __ex_table,\"a\"\n" \
277 " .long 1b - .\n" \
278 " lda $31,2b-1b(%0)\n" \
279 ".previous" \
280 : "=r"(__pu_err) \
281 : "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
282#else
283/* Unfortunately, we can't get an unaligned access trap for the sub-word
284 write, so we have to do a general unaligned operation. */
285
4fb9bccb 286#define __put_user_16(x, addr) \
1da177e4
LT
287{ \
288 long __pu_tmp1, __pu_tmp2, __pu_tmp3, __pu_tmp4; \
289 __asm__ __volatile__( \
290 "1: ldq_u %2,1(%5)\n" \
291 "2: ldq_u %1,0(%5)\n" \
292 " inswh %6,%5,%4\n" \
293 " inswl %6,%5,%3\n" \
294 " mskwh %2,%5,%2\n" \
295 " mskwl %1,%5,%1\n" \
296 " or %2,%4,%2\n" \
297 " or %1,%3,%1\n" \
298 "3: stq_u %2,1(%5)\n" \
299 "4: stq_u %1,0(%5)\n" \
300 "5:\n" \
301 ".section __ex_table,\"a\"\n" \
302 " .long 1b - .\n" \
303 " lda $31, 5b-1b(%0)\n" \
304 " .long 2b - .\n" \
305 " lda $31, 5b-2b(%0)\n" \
306 " .long 3b - .\n" \
307 " lda $31, 5b-3b(%0)\n" \
308 " .long 4b - .\n" \
309 " lda $31, 5b-4b(%0)\n" \
310 ".previous" \
4fb9bccb
MT
311 : "=r"(__pu_err), "=&r"(__pu_tmp1), \
312 "=&r"(__pu_tmp2), "=&r"(__pu_tmp3), \
1da177e4
LT
313 "=&r"(__pu_tmp4) \
314 : "r"(addr), "r"((unsigned long)(x)), "0"(__pu_err)); \
315}
316
4fb9bccb 317#define __put_user_8(x, addr) \
1da177e4
LT
318{ \
319 long __pu_tmp1, __pu_tmp2; \
320 __asm__ __volatile__( \
321 "1: ldq_u %1,0(%4)\n" \
322 " insbl %3,%4,%2\n" \
323 " mskbl %1,%4,%1\n" \
324 " or %1,%2,%1\n" \
325 "2: stq_u %1,0(%4)\n" \
326 "3:\n" \
327 ".section __ex_table,\"a\"\n" \
328 " .long 1b - .\n" \
329 " lda $31, 3b-1b(%0)\n" \
330 " .long 2b - .\n" \
331 " lda $31, 3b-2b(%0)\n" \
332 ".previous" \
4fb9bccb 333 : "=r"(__pu_err), \
1da177e4
LT
334 "=&r"(__pu_tmp1), "=&r"(__pu_tmp2) \
335 : "r"((unsigned long)(x)), "r"(addr), "0"(__pu_err)); \
336}
337#endif
338
339
340/*
341 * Complex access routines
342 */
343
344/* This little bit of silliness is to get the GP loaded for a function
345 that ordinarily wouldn't. Otherwise we could have it done by the macro
346 directly, which can be optimized the linker. */
347#ifdef MODULE
348#define __module_address(sym) "r"(sym),
349#define __module_call(ra, arg, sym) "jsr $" #ra ",(%" #arg ")," #sym
350#else
351#define __module_address(sym)
352#define __module_call(ra, arg, sym) "bsr $" #ra "," #sym " !samegp"
353#endif
354
355extern void __copy_user(void);
356
357extern inline long
358__copy_tofrom_user_nocheck(void *to, const void *from, long len)
359{
360 register void * __cu_to __asm__("$6") = to;
361 register const void * __cu_from __asm__("$7") = from;
362 register long __cu_len __asm__("$0") = len;
363
364 __asm__ __volatile__(
365 __module_call(28, 3, __copy_user)
366 : "=r" (__cu_len), "=r" (__cu_from), "=r" (__cu_to)
367 : __module_address(__copy_user)
368 "0" (__cu_len), "1" (__cu_from), "2" (__cu_to)
4fb9bccb 369 : "$1", "$2", "$3", "$4", "$5", "$28", "memory");
1da177e4
LT
370
371 return __cu_len;
372}
373
4fb9bccb 374#define __copy_to_user(to, from, n) \
1da177e4
LT
375({ \
376 __chk_user_ptr(to); \
4fb9bccb 377 __copy_tofrom_user_nocheck((__force void *)(to), (from), (n)); \
1da177e4 378})
4fb9bccb 379#define __copy_from_user(to, from, n) \
1da177e4
LT
380({ \
381 __chk_user_ptr(from); \
4fb9bccb 382 __copy_tofrom_user_nocheck((to), (__force void *)(from), (n)); \
1da177e4
LT
383})
384
385#define __copy_to_user_inatomic __copy_to_user
386#define __copy_from_user_inatomic __copy_from_user
387
1da177e4
LT
388extern inline long
389copy_to_user(void __user *to, const void *from, long n)
390{
2561d309
AV
391 if (likely(__access_ok((unsigned long)to, n, get_fs())))
392 n = __copy_tofrom_user_nocheck((__force void *)to, from, n);
393 return n;
1da177e4
LT
394}
395
396extern inline long
397copy_from_user(void *to, const void __user *from, long n)
398{
2561d309
AV
399 if (likely(__access_ok((unsigned long)from, n, get_fs())))
400 n = __copy_tofrom_user_nocheck(to, (__force void *)from, n);
401 else
402 memset(to, 0, n);
403 return n;
1da177e4
LT
404}
405
406extern void __do_clear_user(void);
407
408extern inline long
409__clear_user(void __user *to, long len)
410{
411 register void __user * __cl_to __asm__("$6") = to;
412 register long __cl_len __asm__("$0") = len;
413 __asm__ __volatile__(
414 __module_call(28, 2, __do_clear_user)
415 : "=r"(__cl_len), "=r"(__cl_to)
416 : __module_address(__do_clear_user)
417 "0"(__cl_len), "1"(__cl_to)
4fb9bccb 418 : "$1", "$2", "$3", "$4", "$5", "$28", "memory");
1da177e4
LT
419 return __cl_len;
420}
421
422extern inline long
423clear_user(void __user *to, long len)
424{
425 if (__access_ok((unsigned long)to, len, get_fs()))
426 len = __clear_user(to, len);
427 return len;
428}
429
430#undef __module_address
431#undef __module_call
432
f2db633d
MC
433#define user_addr_max() \
434 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
1da177e4 435
f2db633d
MC
436extern long strncpy_from_user(char *dest, const char __user *src, long count);
437extern __must_check long strlen_user(const char __user *str);
438extern __must_check long strnlen_user(const char __user *str, long n);
1da177e4
LT
439
440/*
441 * About the exception table:
442 *
443 * - insn is a 32-bit pc-relative offset from the faulting insn.
444 * - nextinsn is a 16-bit offset off of the faulting instruction
445 * (not off of the *next* instruction as branches are).
446 * - errreg is the register in which to place -EFAULT.
447 * - valreg is the final target register for the load sequence
448 * and will be zeroed.
449 *
450 * Either errreg or valreg may be $31, in which case nothing happens.
451 *
452 * The exception fixup information "just so happens" to be arranged
453 * as in a MEM format instruction. This lets us emit our three
454 * values like so:
455 *
456 * lda valreg, nextinsn(errreg)
457 *
458 */
459
460struct exception_table_entry
461{
462 signed int insn;
463 union exception_fixup {
464 unsigned unit;
465 struct {
466 signed int nextinsn : 16;
467 unsigned int errreg : 5;
468 unsigned int valreg : 5;
469 } bits;
470 } fixup;
471};
472
473/* Returns the new pc */
0b42afd0 474#define fixup_exception(map_reg, _fixup, pc) \
1da177e4 475({ \
0b42afd0
RK
476 if ((_fixup)->fixup.bits.valreg != 31) \
477 map_reg((_fixup)->fixup.bits.valreg) = 0; \
478 if ((_fixup)->fixup.bits.errreg != 31) \
479 map_reg((_fixup)->fixup.bits.errreg) = -EFAULT; \
480 (pc) + (_fixup)->fixup.bits.nextinsn; \
1da177e4
LT
481})
482
e77986b5
AB
483#define ARCH_HAS_RELATIVE_EXTABLE
484
485#define swap_ex_entry_fixup(a, b, tmp, delta) \
486 do { \
487 (a)->fixup.unit = (b)->fixup.unit; \
488 (b)->fixup.unit = (tmp).fixup.unit; \
489 } while (0)
490
1da177e4
LT
491
492#endif /* __ALPHA_UACCESS_H */