]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/alpha/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the code used by various IRQ handling routines: | |
7 | * asking for different IRQ's should be done through these routines | |
8 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
9 | * shouldn't result in any weird surprises, and installing new handlers | |
10 | * should be easier. | |
11 | */ | |
12 | ||
1da177e4 LT |
13 | #include <linux/kernel.h> |
14 | #include <linux/module.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/kernel_stat.h> | |
17 | #include <linux/signal.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/ptrace.h> | |
20 | #include <linux/interrupt.h> | |
1da177e4 LT |
21 | #include <linux/random.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/proc_fs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/profile.h> | |
27 | #include <linux/bitops.h> | |
28 | ||
29 | #include <asm/system.h> | |
30 | #include <asm/io.h> | |
31 | #include <asm/uaccess.h> | |
32 | ||
1da177e4 | 33 | volatile unsigned long irq_err_count; |
65d92064 | 34 | DEFINE_PER_CPU(unsigned long, irq_pmi_count); |
1da177e4 | 35 | |
0595bf3b | 36 | void ack_bad_irq(unsigned int irq) |
1da177e4 LT |
37 | { |
38 | irq_err_count++; | |
39 | printk(KERN_CRIT "Unexpected IRQ trap at vector %u\n", irq); | |
40 | } | |
41 | ||
1da177e4 | 42 | #ifdef CONFIG_SMP |
1da177e4 | 43 | static char irq_user_affinity[NR_IRQS]; |
1da177e4 | 44 | |
18404756 | 45 | int irq_select_affinity(unsigned int irq) |
1da177e4 | 46 | { |
0b534cf3 TG |
47 | struct irq_data *data = irq_get_irq_data(irq); |
48 | struct irq_chip *chip; | |
1da177e4 LT |
49 | static int last_cpu; |
50 | int cpu = last_cpu + 1; | |
51 | ||
0b534cf3 TG |
52 | if (!data) |
53 | return 1; | |
54 | chip = irq_data_get_irq_chip(data); | |
55 | ||
56 | if (!chip->irq_set_affinity || irq_user_affinity[irq]) | |
0595bf3b | 57 | return 1; |
1da177e4 | 58 | |
d036e67b RR |
59 | while (!cpu_possible(cpu) || |
60 | !cpumask_test_cpu(cpu, irq_default_affinity)) | |
1da177e4 LT |
61 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); |
62 | last_cpu = cpu; | |
63 | ||
0b534cf3 TG |
64 | cpumask_copy(data->affinity, cpumask_of(cpu)); |
65 | chip->irq_set_affinity(data, cpumask_of(cpu), false); | |
0595bf3b | 66 | return 0; |
1da177e4 | 67 | } |
1da177e4 LT |
68 | #endif /* CONFIG_SMP */ |
69 | ||
1da177e4 LT |
70 | int |
71 | show_interrupts(struct seq_file *p, void *v) | |
72 | { | |
1da177e4 | 73 | int j; |
c5e3d98c | 74 | int irq = *(loff_t *) v; |
1da177e4 | 75 | struct irqaction * action; |
a891b393 | 76 | struct irq_desc *desc; |
1da177e4 LT |
77 | unsigned long flags; |
78 | ||
79 | #ifdef CONFIG_SMP | |
c5e3d98c | 80 | if (irq == 0) { |
1da177e4 | 81 | seq_puts(p, " "); |
c5e3d98c ES |
82 | for_each_online_cpu(j) |
83 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
84 | seq_putc(p, '\n'); |
85 | } | |
86 | #endif | |
87 | ||
c5e3d98c | 88 | if (irq < ACTUAL_NR_IRQS) { |
a891b393 KM |
89 | desc = irq_to_desc(irq); |
90 | ||
91 | if (!desc) | |
92 | return 0; | |
93 | ||
94 | raw_spin_lock_irqsave(&desc->lock, flags); | |
95 | action = desc->action; | |
1da177e4 LT |
96 | if (!action) |
97 | goto unlock; | |
c5e3d98c | 98 | seq_printf(p, "%3d: ", irq); |
1da177e4 | 99 | #ifndef CONFIG_SMP |
c5e3d98c | 100 | seq_printf(p, "%10u ", kstat_irqs(irq)); |
1da177e4 | 101 | #else |
c5e3d98c | 102 | for_each_online_cpu(j) |
4d87c5be | 103 | seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); |
1da177e4 | 104 | #endif |
a891b393 | 105 | seq_printf(p, " %14s", get_irq_desc_chip(desc)->name); |
1da177e4 | 106 | seq_printf(p, " %c%s", |
d18ecedc | 107 | (action->flags & IRQF_DISABLED)?'+':' ', |
1da177e4 LT |
108 | action->name); |
109 | ||
110 | for (action=action->next; action; action = action->next) { | |
111 | seq_printf(p, ", %c%s", | |
d18ecedc | 112 | (action->flags & IRQF_DISABLED)?'+':' ', |
1da177e4 LT |
113 | action->name); |
114 | } | |
115 | ||
116 | seq_putc(p, '\n'); | |
117 | unlock: | |
a891b393 | 118 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
c5e3d98c | 119 | } else if (irq == ACTUAL_NR_IRQS) { |
1da177e4 LT |
120 | #ifdef CONFIG_SMP |
121 | seq_puts(p, "IPI: "); | |
c5e3d98c ES |
122 | for_each_online_cpu(j) |
123 | seq_printf(p, "%10lu ", cpu_data[j].ipi_count); | |
1da177e4 LT |
124 | seq_putc(p, '\n'); |
125 | #endif | |
65d92064 MC |
126 | seq_puts(p, "PMI: "); |
127 | for_each_online_cpu(j) | |
128 | seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); | |
129 | seq_puts(p, " Performance Monitoring\n"); | |
1da177e4 LT |
130 | seq_printf(p, "ERR: %10lu\n", irq_err_count); |
131 | } | |
132 | return 0; | |
133 | } | |
134 | ||
1da177e4 LT |
135 | /* |
136 | * handle_irq handles all normal device IRQ's (the special | |
137 | * SMP cross-CPU interrupts have their own specific | |
138 | * handlers). | |
139 | */ | |
140 | ||
141 | #define MAX_ILLEGAL_IRQS 16 | |
142 | ||
143 | void | |
3dbb8c62 | 144 | handle_irq(int irq) |
1da177e4 LT |
145 | { |
146 | /* | |
147 | * We ack quickly, we don't want the irq controller | |
148 | * thinking we're snobs just because some other CPU has | |
149 | * disabled global interrupts (we have already done the | |
150 | * INT_ACK cycles, it's too late to try to pretend to the | |
151 | * controller that we aren't taking the interrupt). | |
152 | * | |
153 | * 0 return value means that this irq is already being | |
154 | * handled by some other CPU. (or is disabled) | |
155 | */ | |
1da177e4 | 156 | static unsigned int illegal_count=0; |
a891b393 | 157 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 158 | |
a891b393 KM |
159 | if (!desc || ((unsigned) irq > ACTUAL_NR_IRQS && |
160 | illegal_count < MAX_ILLEGAL_IRQS)) { | |
1da177e4 LT |
161 | irq_err_count++; |
162 | illegal_count++; | |
163 | printk(KERN_CRIT "device_interrupt: invalid interrupt %d\n", | |
164 | irq); | |
165 | return; | |
166 | } | |
167 | ||
eff2c2f6 | 168 | /* |
f5de6ecc | 169 | * From here we must proceed with IPL_MAX. Note that we do not |
eff2c2f6 IK |
170 | * explicitly enable interrupts afterwards - some MILO PALcode |
171 | * (namely LX164 one) seems to have severe problems with RTI | |
172 | * at IPL 0. | |
173 | */ | |
0595bf3b | 174 | local_irq_disable(); |
f5de6ecc | 175 | irq_enter(); |
a891b393 | 176 | generic_handle_irq_desc(irq, desc); |
1da177e4 LT |
177 | irq_exit(); |
178 | } |