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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/alpha/kernel/ns87312.c | |
3 | */ | |
4 | ||
5 | #include <linux/init.h> | |
6 | #include <asm/io.h> | |
7 | #include "proto.h" | |
8 | ||
9 | ||
10 | /* | |
11 | * The SRM console *disables* the IDE interface, this code ensures it's | |
12 | * enabled. | |
13 | * | |
14 | * This code bangs on a control register of the 87312 Super I/O chip | |
15 | * that implements parallel port/serial ports/IDE/FDI. Depending on | |
16 | * the motherboard, the Super I/O chip can be configured through a | |
17 | * pair of registers that are located either at I/O ports 0x26e/0x26f | |
18 | * or 0x398/0x399. Unfortunately, autodetecting which base address is | |
19 | * in use works only once (right after a reset). The Super I/O chip | |
20 | * has the additional quirk that configuration register data must be | |
21 | * written twice (I believe this is a safety feature to prevent | |
22 | * accidental modification---fun, isn't it?). | |
23 | */ | |
24 | ||
25 | void __init | |
26 | ns87312_enable_ide(long ide_base) | |
27 | { | |
28 | int data; | |
29 | unsigned long flags; | |
30 | ||
31 | local_irq_save(flags); | |
32 | outb(0, ide_base); /* set the index register for reg #0 */ | |
33 | data = inb(ide_base+1); /* read the current contents */ | |
34 | outb(0, ide_base); /* set the index register for reg #0 */ | |
35 | outb(data | 0x40, ide_base+1); /* turn on IDE */ | |
36 | outb(data | 0x40, ide_base+1); /* turn on IDE, really! */ | |
37 | local_irq_restore(flags); | |
38 | } |