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1da177e4 LT |
1 | /* |
2 | * linux/arch/alpha/kernel/setup.c | |
3 | * | |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | */ | |
6 | ||
7 | /* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */ | |
8 | ||
9 | /* | |
10 | * Bootup setup stuff. | |
11 | */ | |
12 | ||
13 | #include <linux/sched.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/mm.h> | |
16 | #include <linux/stddef.h> | |
17 | #include <linux/unistd.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/slab.h> | |
20 | #include <linux/user.h> | |
894673ee | 21 | #include <linux/screen_info.h> |
1da177e4 | 22 | #include <linux/delay.h> |
1da177e4 LT |
23 | #include <linux/mc146818rtc.h> |
24 | #include <linux/console.h> | |
917b1f78 | 25 | #include <linux/cpu.h> |
1da177e4 LT |
26 | #include <linux/errno.h> |
27 | #include <linux/init.h> | |
28 | #include <linux/string.h> | |
29 | #include <linux/ioport.h> | |
e5c6c8e4 | 30 | #include <linux/platform_device.h> |
1da177e4 LT |
31 | #include <linux/bootmem.h> |
32 | #include <linux/pci.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/root_dev.h> | |
35 | #include <linux/initrd.h> | |
36 | #include <linux/eisa.h> | |
22a9835c | 37 | #include <linux/pfn.h> |
1da177e4 LT |
38 | #ifdef CONFIG_MAGIC_SYSRQ |
39 | #include <linux/sysrq.h> | |
40 | #include <linux/reboot.h> | |
41 | #endif | |
42 | #include <linux/notifier.h> | |
43 | #include <asm/setup.h> | |
44 | #include <asm/io.h> | |
74fd1b68 | 45 | #include <linux/log2.h> |
00cd1176 | 46 | #include <linux/export.h> |
1da177e4 | 47 | |
e041c683 | 48 | extern struct atomic_notifier_head panic_notifier_list; |
1da177e4 LT |
49 | static int alpha_panic_event(struct notifier_block *, unsigned long, void *); |
50 | static struct notifier_block alpha_panic_block = { | |
51 | alpha_panic_event, | |
52 | NULL, | |
53 | INT_MAX /* try to do it first */ | |
54 | }; | |
55 | ||
56 | #include <asm/uaccess.h> | |
57 | #include <asm/pgtable.h> | |
58 | #include <asm/system.h> | |
59 | #include <asm/hwrpb.h> | |
60 | #include <asm/dma.h> | |
1da177e4 LT |
61 | #include <asm/mmu_context.h> |
62 | #include <asm/console.h> | |
63 | ||
64 | #include "proto.h" | |
65 | #include "pci_impl.h" | |
66 | ||
67 | ||
68 | struct hwrpb_struct *hwrpb; | |
cff52daf | 69 | EXPORT_SYMBOL(hwrpb); |
1da177e4 LT |
70 | unsigned long srm_hae; |
71 | ||
72 | int alpha_l1i_cacheshape; | |
73 | int alpha_l1d_cacheshape; | |
74 | int alpha_l2_cacheshape; | |
75 | int alpha_l3_cacheshape; | |
76 | ||
77 | #ifdef CONFIG_VERBOSE_MCHECK | |
78 | /* 0=minimum, 1=verbose, 2=all */ | |
79 | /* These can be overridden via the command line, ie "verbose_mcheck=2") */ | |
80 | unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON; | |
81 | #endif | |
82 | ||
2258a5bb RR |
83 | #ifdef CONFIG_NUMA |
84 | struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly; | |
85 | EXPORT_SYMBOL(node_to_cpumask_map); | |
86 | #endif | |
87 | ||
1da177e4 LT |
88 | /* Which processor we booted from. */ |
89 | int boot_cpuid; | |
90 | ||
91 | /* | |
92 | * Using SRM callbacks for initial console output. This works from | |
93 | * setup_arch() time through the end of time_init(), as those places | |
94 | * are under our (Alpha) control. | |
95 | ||
96 | * "srmcons" specified in the boot command arguments allows us to | |
97 | * see kernel messages during the period of time before the true | |
98 | * console device is "registered" during console_init(). | |
99 | * As of this version (2.5.59), console_init() will call | |
100 | * disable_early_printk() as the last action before initializing | |
101 | * the console drivers. That's the last possible time srmcons can be | |
102 | * unregistered without interfering with console behavior. | |
103 | * | |
104 | * By default, OFF; set it with a bootcommand arg of "srmcons" or | |
105 | * "console=srm". The meaning of these two args is: | |
106 | * "srmcons" - early callback prints | |
107 | * "console=srm" - full callback based console, including early prints | |
108 | */ | |
109 | int srmcons_output = 0; | |
110 | ||
111 | /* Enforce a memory size limit; useful for testing. By default, none. */ | |
112 | unsigned long mem_size_limit = 0; | |
113 | ||
114 | /* Set AGP GART window size (0 means disabled). */ | |
115 | unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE; | |
116 | ||
117 | #ifdef CONFIG_ALPHA_GENERIC | |
118 | struct alpha_machine_vector alpha_mv; | |
119 | int alpha_using_srm; | |
cff52daf | 120 | EXPORT_SYMBOL(alpha_using_srm); |
1da177e4 LT |
121 | #endif |
122 | ||
1da177e4 LT |
123 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, |
124 | unsigned long); | |
125 | static struct alpha_machine_vector *get_sysvec_byname(const char *); | |
126 | static void get_sysnames(unsigned long, unsigned long, unsigned long, | |
127 | char **, char **); | |
128 | static void determine_cpu_caches (unsigned int); | |
129 | ||
3c253ca0 | 130 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
1da177e4 LT |
131 | |
132 | /* | |
133 | * The format of "screen_info" is strange, and due to early | |
134 | * i386-setup code. This is just enough to make the console | |
135 | * code think we're on a VGA color display. | |
136 | */ | |
137 | ||
138 | struct screen_info screen_info = { | |
139 | .orig_x = 0, | |
140 | .orig_y = 25, | |
141 | .orig_video_cols = 80, | |
142 | .orig_video_lines = 25, | |
143 | .orig_video_isVGA = 1, | |
144 | .orig_video_points = 16 | |
145 | }; | |
146 | ||
cff52daf AV |
147 | EXPORT_SYMBOL(screen_info); |
148 | ||
1da177e4 LT |
149 | /* |
150 | * The direct map I/O window, if any. This should be the same | |
151 | * for all busses, since it's used by virt_to_bus. | |
152 | */ | |
153 | ||
154 | unsigned long __direct_map_base; | |
155 | unsigned long __direct_map_size; | |
cff52daf AV |
156 | EXPORT_SYMBOL(__direct_map_base); |
157 | EXPORT_SYMBOL(__direct_map_size); | |
1da177e4 LT |
158 | |
159 | /* | |
160 | * Declare all of the machine vectors. | |
161 | */ | |
162 | ||
163 | /* GCC 2.7.2 (on alpha at least) is lame. It does not support either | |
164 | __attribute__((weak)) or #pragma weak. Bypass it and talk directly | |
165 | to the assembler. */ | |
166 | ||
167 | #define WEAK(X) \ | |
168 | extern struct alpha_machine_vector X; \ | |
169 | asm(".weak "#X) | |
170 | ||
171 | WEAK(alcor_mv); | |
172 | WEAK(alphabook1_mv); | |
173 | WEAK(avanti_mv); | |
174 | WEAK(cabriolet_mv); | |
175 | WEAK(clipper_mv); | |
176 | WEAK(dp264_mv); | |
177 | WEAK(eb164_mv); | |
178 | WEAK(eb64p_mv); | |
179 | WEAK(eb66_mv); | |
180 | WEAK(eb66p_mv); | |
181 | WEAK(eiger_mv); | |
182 | WEAK(jensen_mv); | |
183 | WEAK(lx164_mv); | |
184 | WEAK(lynx_mv); | |
185 | WEAK(marvel_ev7_mv); | |
186 | WEAK(miata_mv); | |
187 | WEAK(mikasa_mv); | |
188 | WEAK(mikasa_primo_mv); | |
189 | WEAK(monet_mv); | |
190 | WEAK(nautilus_mv); | |
191 | WEAK(noname_mv); | |
192 | WEAK(noritake_mv); | |
193 | WEAK(noritake_primo_mv); | |
194 | WEAK(p2k_mv); | |
195 | WEAK(pc164_mv); | |
196 | WEAK(privateer_mv); | |
197 | WEAK(rawhide_mv); | |
198 | WEAK(ruffian_mv); | |
199 | WEAK(rx164_mv); | |
200 | WEAK(sable_mv); | |
201 | WEAK(sable_gamma_mv); | |
202 | WEAK(shark_mv); | |
203 | WEAK(sx164_mv); | |
204 | WEAK(takara_mv); | |
205 | WEAK(titan_mv); | |
206 | WEAK(webbrick_mv); | |
207 | WEAK(wildfire_mv); | |
208 | WEAK(xl_mv); | |
209 | WEAK(xlt_mv); | |
210 | ||
211 | #undef WEAK | |
212 | ||
213 | /* | |
214 | * I/O resources inherited from PeeCees. Except for perhaps the | |
215 | * turbochannel alphas, everyone has these on some sort of SuperIO chip. | |
216 | * | |
217 | * ??? If this becomes less standard, move the struct out into the | |
218 | * machine vector. | |
219 | */ | |
220 | ||
221 | static void __init | |
222 | reserve_std_resources(void) | |
223 | { | |
224 | static struct resource standard_io_resources[] = { | |
225 | { .name = "rtc", .start = -1, .end = -1 }, | |
226 | { .name = "dma1", .start = 0x00, .end = 0x1f }, | |
227 | { .name = "pic1", .start = 0x20, .end = 0x3f }, | |
228 | { .name = "timer", .start = 0x40, .end = 0x5f }, | |
229 | { .name = "keyboard", .start = 0x60, .end = 0x6f }, | |
230 | { .name = "dma page reg", .start = 0x80, .end = 0x8f }, | |
231 | { .name = "pic2", .start = 0xa0, .end = 0xbf }, | |
232 | { .name = "dma2", .start = 0xc0, .end = 0xdf }, | |
233 | }; | |
234 | ||
235 | struct resource *io = &ioport_resource; | |
236 | size_t i; | |
237 | ||
238 | if (hose_head) { | |
239 | struct pci_controller *hose; | |
240 | for (hose = hose_head; hose; hose = hose->next) | |
241 | if (hose->index == 0) { | |
242 | io = hose->io_space; | |
243 | break; | |
244 | } | |
245 | } | |
246 | ||
247 | /* Fix up for the Jensen's queer RTC placement. */ | |
248 | standard_io_resources[0].start = RTC_PORT(0); | |
249 | standard_io_resources[0].end = RTC_PORT(0) + 0x10; | |
250 | ||
25c8716c | 251 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i) |
1da177e4 LT |
252 | request_resource(io, standard_io_resources+i); |
253 | } | |
254 | ||
1da177e4 | 255 | #define PFN_MAX PFN_DOWN(0x80000000) |
fb26b3e6 RK |
256 | #define for_each_mem_cluster(memdesc, _cluster, i) \ |
257 | for ((_cluster) = (memdesc)->cluster, (i) = 0; \ | |
258 | (i) < (memdesc)->numclusters; (i)++, (_cluster)++) | |
1da177e4 LT |
259 | |
260 | static unsigned long __init | |
261 | get_mem_size_limit(char *s) | |
262 | { | |
263 | unsigned long end = 0; | |
264 | char *from = s; | |
265 | ||
266 | end = simple_strtoul(from, &from, 0); | |
267 | if ( *from == 'K' || *from == 'k' ) { | |
268 | end = end << 10; | |
269 | from++; | |
270 | } else if ( *from == 'M' || *from == 'm' ) { | |
271 | end = end << 20; | |
272 | from++; | |
273 | } else if ( *from == 'G' || *from == 'g' ) { | |
274 | end = end << 30; | |
275 | from++; | |
276 | } | |
277 | return end >> PAGE_SHIFT; /* Return the PFN of the limit. */ | |
278 | } | |
279 | ||
280 | #ifdef CONFIG_BLK_DEV_INITRD | |
281 | void * __init | |
282 | move_initrd(unsigned long mem_limit) | |
283 | { | |
284 | void *start; | |
285 | unsigned long size; | |
286 | ||
287 | size = initrd_end - initrd_start; | |
288 | start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0); | |
289 | if (!start || __pa(start) + size > mem_limit) { | |
290 | initrd_start = initrd_end = 0; | |
291 | return NULL; | |
292 | } | |
293 | memmove(start, (void *)initrd_start, size); | |
294 | initrd_start = (unsigned long)start; | |
295 | initrd_end = initrd_start + size; | |
296 | printk("initrd moved to %p\n", start); | |
297 | return start; | |
298 | } | |
299 | #endif | |
300 | ||
301 | #ifndef CONFIG_DISCONTIGMEM | |
302 | static void __init | |
303 | setup_memory(void *kernel_end) | |
304 | { | |
305 | struct memclust_struct * cluster; | |
306 | struct memdesc_struct * memdesc; | |
307 | unsigned long start_kernel_pfn, end_kernel_pfn; | |
308 | unsigned long bootmap_size, bootmap_pages, bootmap_start; | |
309 | unsigned long start, end; | |
310 | unsigned long i; | |
311 | ||
312 | /* Find free clusters, and init and free the bootmem accordingly. */ | |
313 | memdesc = (struct memdesc_struct *) | |
314 | (hwrpb->mddt_offset + (unsigned long) hwrpb); | |
315 | ||
316 | for_each_mem_cluster(memdesc, cluster, i) { | |
317 | printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n", | |
318 | i, cluster->usage, cluster->start_pfn, | |
319 | cluster->start_pfn + cluster->numpages); | |
320 | ||
321 | /* Bit 0 is console/PALcode reserved. Bit 1 is | |
322 | non-volatile memory -- we might want to mark | |
323 | this for later. */ | |
324 | if (cluster->usage & 3) | |
325 | continue; | |
326 | ||
327 | end = cluster->start_pfn + cluster->numpages; | |
328 | if (end > max_low_pfn) | |
329 | max_low_pfn = end; | |
330 | } | |
331 | ||
332 | /* | |
333 | * Except for the NUMA systems (wildfire, marvel) all of the | |
334 | * Alpha systems we run on support 32GB of memory or less. | |
335 | * Since the NUMA systems introduce large holes in memory addressing, | |
336 | * we can get into a situation where there is not enough contiguous | |
337 | * memory for the memory map. | |
338 | * | |
339 | * Limit memory to the first 32GB to limit the NUMA systems to | |
340 | * memory on their first node (wildfire) or 2 (marvel) to avoid | |
341 | * not being able to produce the memory map. In order to access | |
342 | * all of the memory on the NUMA systems, build with discontiguous | |
343 | * memory support. | |
344 | * | |
345 | * If the user specified a memory limit, let that memory limit stand. | |
346 | */ | |
347 | if (!mem_size_limit) | |
348 | mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT; | |
349 | ||
350 | if (mem_size_limit && max_low_pfn >= mem_size_limit) | |
351 | { | |
352 | printk("setup: forcing memory size to %ldK (from %ldK).\n", | |
353 | mem_size_limit << (PAGE_SHIFT - 10), | |
354 | max_low_pfn << (PAGE_SHIFT - 10)); | |
355 | max_low_pfn = mem_size_limit; | |
356 | } | |
357 | ||
358 | /* Find the bounds of kernel memory. */ | |
359 | start_kernel_pfn = PFN_DOWN(KERNEL_START_PHYS); | |
360 | end_kernel_pfn = PFN_UP(virt_to_phys(kernel_end)); | |
361 | bootmap_start = -1; | |
362 | ||
363 | try_again: | |
364 | if (max_low_pfn <= end_kernel_pfn) | |
365 | panic("not enough memory to boot"); | |
366 | ||
367 | /* We need to know how many physically contiguous pages | |
368 | we'll need for the bootmap. */ | |
369 | bootmap_pages = bootmem_bootmap_pages(max_low_pfn); | |
370 | ||
371 | /* Now find a good region where to allocate the bootmap. */ | |
372 | for_each_mem_cluster(memdesc, cluster, i) { | |
373 | if (cluster->usage & 3) | |
374 | continue; | |
375 | ||
376 | start = cluster->start_pfn; | |
377 | end = start + cluster->numpages; | |
378 | if (start >= max_low_pfn) | |
379 | continue; | |
380 | if (end > max_low_pfn) | |
381 | end = max_low_pfn; | |
382 | if (start < start_kernel_pfn) { | |
383 | if (end > end_kernel_pfn | |
384 | && end - end_kernel_pfn >= bootmap_pages) { | |
385 | bootmap_start = end_kernel_pfn; | |
386 | break; | |
387 | } else if (end > start_kernel_pfn) | |
388 | end = start_kernel_pfn; | |
389 | } else if (start < end_kernel_pfn) | |
390 | start = end_kernel_pfn; | |
391 | if (end - start >= bootmap_pages) { | |
392 | bootmap_start = start; | |
393 | break; | |
394 | } | |
395 | } | |
396 | ||
397 | if (bootmap_start == ~0UL) { | |
398 | max_low_pfn >>= 1; | |
399 | goto try_again; | |
400 | } | |
401 | ||
402 | /* Allocate the bootmap and mark the whole MM as reserved. */ | |
403 | bootmap_size = init_bootmem(bootmap_start, max_low_pfn); | |
404 | ||
405 | /* Mark the free regions. */ | |
406 | for_each_mem_cluster(memdesc, cluster, i) { | |
407 | if (cluster->usage & 3) | |
408 | continue; | |
409 | ||
410 | start = cluster->start_pfn; | |
411 | end = cluster->start_pfn + cluster->numpages; | |
412 | if (start >= max_low_pfn) | |
413 | continue; | |
414 | if (end > max_low_pfn) | |
415 | end = max_low_pfn; | |
416 | if (start < start_kernel_pfn) { | |
417 | if (end > end_kernel_pfn) { | |
418 | free_bootmem(PFN_PHYS(start), | |
419 | (PFN_PHYS(start_kernel_pfn) | |
420 | - PFN_PHYS(start))); | |
421 | printk("freeing pages %ld:%ld\n", | |
422 | start, start_kernel_pfn); | |
423 | start = end_kernel_pfn; | |
424 | } else if (end > start_kernel_pfn) | |
425 | end = start_kernel_pfn; | |
426 | } else if (start < end_kernel_pfn) | |
427 | start = end_kernel_pfn; | |
428 | if (start >= end) | |
429 | continue; | |
430 | ||
431 | free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start)); | |
432 | printk("freeing pages %ld:%ld\n", start, end); | |
433 | } | |
434 | ||
435 | /* Reserve the bootmap memory. */ | |
72a7fe39 BW |
436 | reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size, |
437 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
438 | printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size)); |
439 | ||
440 | #ifdef CONFIG_BLK_DEV_INITRD | |
441 | initrd_start = INITRD_START; | |
442 | if (initrd_start) { | |
443 | initrd_end = initrd_start+INITRD_SIZE; | |
444 | printk("Initial ramdisk at: 0x%p (%lu bytes)\n", | |
445 | (void *) initrd_start, INITRD_SIZE); | |
446 | ||
447 | if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) { | |
448 | if (!move_initrd(PFN_PHYS(max_low_pfn))) | |
449 | printk("initrd extends beyond end of memory " | |
450 | "(0x%08lx > 0x%p)\ndisabling initrd\n", | |
451 | initrd_end, | |
452 | phys_to_virt(PFN_PHYS(max_low_pfn))); | |
453 | } else { | |
454 | reserve_bootmem(virt_to_phys((void *)initrd_start), | |
72a7fe39 | 455 | INITRD_SIZE, BOOTMEM_DEFAULT); |
1da177e4 LT |
456 | } |
457 | } | |
458 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
459 | } | |
460 | #else | |
461 | extern void setup_memory(void *); | |
462 | #endif /* !CONFIG_DISCONTIGMEM */ | |
463 | ||
464 | int __init | |
465 | page_is_ram(unsigned long pfn) | |
466 | { | |
467 | struct memclust_struct * cluster; | |
468 | struct memdesc_struct * memdesc; | |
469 | unsigned long i; | |
470 | ||
471 | memdesc = (struct memdesc_struct *) | |
472 | (hwrpb->mddt_offset + (unsigned long) hwrpb); | |
473 | for_each_mem_cluster(memdesc, cluster, i) | |
474 | { | |
475 | if (pfn >= cluster->start_pfn && | |
476 | pfn < cluster->start_pfn + cluster->numpages) { | |
477 | return (cluster->usage & 3) ? 0 : 1; | |
478 | } | |
479 | } | |
480 | ||
481 | return 0; | |
482 | } | |
483 | ||
917b1f78 BU |
484 | static int __init |
485 | register_cpus(void) | |
486 | { | |
487 | int i; | |
488 | ||
489 | for_each_possible_cpu(i) { | |
490 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); | |
491 | if (!p) | |
492 | return -ENOMEM; | |
76b67ed9 | 493 | register_cpu(p, i); |
917b1f78 BU |
494 | } |
495 | return 0; | |
496 | } | |
497 | ||
498 | arch_initcall(register_cpus); | |
499 | ||
1da177e4 LT |
500 | void __init |
501 | setup_arch(char **cmdline_p) | |
502 | { | |
503 | extern char _end[]; | |
504 | ||
505 | struct alpha_machine_vector *vec = NULL; | |
506 | struct percpu_struct *cpu; | |
507 | char *type_name, *var_name, *p; | |
508 | void *kernel_end = _end; /* end of kernel */ | |
509 | char *args = command_line; | |
510 | ||
511 | hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr); | |
512 | boot_cpuid = hard_smp_processor_id(); | |
513 | ||
514 | /* | |
515 | * Pre-process the system type to make sure it will be valid. | |
516 | * | |
517 | * This may restore real CABRIO and EB66+ family names, ie | |
518 | * EB64+ and EB66. | |
519 | * | |
520 | * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series) | |
521 | * and AS1200 (DIGITAL Server 5000 series) have the type as | |
522 | * the negative of the real one. | |
523 | */ | |
524 | if ((long)hwrpb->sys_type < 0) { | |
525 | hwrpb->sys_type = -((long)hwrpb->sys_type); | |
526 | hwrpb_update_checksum(hwrpb); | |
527 | } | |
528 | ||
529 | /* Register a call for panic conditions. */ | |
e041c683 AS |
530 | atomic_notifier_chain_register(&panic_notifier_list, |
531 | &alpha_panic_block); | |
1da177e4 LT |
532 | |
533 | #ifdef CONFIG_ALPHA_GENERIC | |
534 | /* Assume that we've booted from SRM if we haven't booted from MILO. | |
535 | Detect the later by looking for "MILO" in the system serial nr. */ | |
536 | alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0; | |
537 | #endif | |
538 | ||
539 | /* If we are using SRM, we want to allow callbacks | |
540 | as early as possible, so do this NOW, and then | |
541 | they should work immediately thereafter. | |
542 | */ | |
543 | kernel_end = callback_init(kernel_end); | |
544 | ||
545 | /* | |
546 | * Locate the command line. | |
547 | */ | |
548 | /* Hack for Jensen... since we're restricted to 8 or 16 chars for | |
549 | boot flags depending on the boot mode, we need some shorthand. | |
550 | This should do for installation. */ | |
551 | if (strcmp(COMMAND_LINE, "INSTALL") == 0) { | |
552 | strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line); | |
553 | } else { | |
554 | strlcpy(command_line, COMMAND_LINE, sizeof command_line); | |
555 | } | |
3c253ca0 | 556 | strcpy(boot_command_line, command_line); |
1da177e4 LT |
557 | *cmdline_p = command_line; |
558 | ||
559 | /* | |
560 | * Process command-line arguments. | |
561 | */ | |
562 | while ((p = strsep(&args, " \t")) != NULL) { | |
563 | if (!*p) continue; | |
564 | if (strncmp(p, "alpha_mv=", 9) == 0) { | |
565 | vec = get_sysvec_byname(p+9); | |
566 | continue; | |
567 | } | |
568 | if (strncmp(p, "cycle=", 6) == 0) { | |
569 | est_cycle_freq = simple_strtol(p+6, NULL, 0); | |
570 | continue; | |
571 | } | |
572 | if (strncmp(p, "mem=", 4) == 0) { | |
573 | mem_size_limit = get_mem_size_limit(p+4); | |
574 | continue; | |
575 | } | |
576 | if (strncmp(p, "srmcons", 7) == 0) { | |
577 | srmcons_output |= 1; | |
578 | continue; | |
579 | } | |
580 | if (strncmp(p, "console=srm", 11) == 0) { | |
581 | srmcons_output |= 2; | |
582 | continue; | |
583 | } | |
584 | if (strncmp(p, "gartsize=", 9) == 0) { | |
585 | alpha_agpgart_size = | |
586 | get_mem_size_limit(p+9) << PAGE_SHIFT; | |
587 | continue; | |
588 | } | |
589 | #ifdef CONFIG_VERBOSE_MCHECK | |
590 | if (strncmp(p, "verbose_mcheck=", 15) == 0) { | |
591 | alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0); | |
592 | continue; | |
593 | } | |
594 | #endif | |
595 | } | |
596 | ||
597 | /* Replace the command line, now that we've killed it with strsep. */ | |
3c253ca0 | 598 | strcpy(command_line, boot_command_line); |
1da177e4 LT |
599 | |
600 | /* If we want SRM console printk echoing early, do it now. */ | |
601 | if (alpha_using_srm && srmcons_output) { | |
602 | register_srm_console(); | |
603 | ||
604 | /* | |
605 | * If "console=srm" was specified, clear the srmcons_output | |
606 | * flag now so that time.c won't unregister_srm_console | |
607 | */ | |
608 | if (srmcons_output & 2) | |
609 | srmcons_output = 0; | |
610 | } | |
611 | ||
612 | #ifdef CONFIG_MAGIC_SYSRQ | |
613 | /* If we're using SRM, make sysrq-b halt back to the prom, | |
614 | not auto-reboot. */ | |
615 | if (alpha_using_srm) { | |
616 | struct sysrq_key_op *op = __sysrq_get_key_op('b'); | |
617 | op->handler = (void *) machine_halt; | |
618 | } | |
619 | #endif | |
620 | ||
621 | /* | |
622 | * Identify and reconfigure for the current system. | |
623 | */ | |
624 | cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); | |
625 | ||
626 | get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, | |
627 | cpu->type, &type_name, &var_name); | |
628 | if (*var_name == '0') | |
629 | var_name = ""; | |
630 | ||
631 | if (!vec) { | |
632 | vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation, | |
633 | cpu->type); | |
634 | } | |
635 | ||
636 | if (!vec) { | |
637 | panic("Unsupported system type: %s%s%s (%ld %ld)\n", | |
638 | type_name, (*var_name ? " variation " : ""), var_name, | |
639 | hwrpb->sys_type, hwrpb->sys_variation); | |
640 | } | |
641 | if (vec != &alpha_mv) { | |
642 | alpha_mv = *vec; | |
643 | } | |
644 | ||
645 | printk("Booting " | |
646 | #ifdef CONFIG_ALPHA_GENERIC | |
647 | "GENERIC " | |
648 | #endif | |
649 | "on %s%s%s using machine vector %s from %s\n", | |
650 | type_name, (*var_name ? " variation " : ""), | |
651 | var_name, alpha_mv.vector_name, | |
652 | (alpha_using_srm ? "SRM" : "MILO")); | |
653 | ||
654 | printk("Major Options: " | |
655 | #ifdef CONFIG_SMP | |
656 | "SMP " | |
657 | #endif | |
658 | #ifdef CONFIG_ALPHA_EV56 | |
659 | "EV56 " | |
660 | #endif | |
661 | #ifdef CONFIG_ALPHA_EV67 | |
662 | "EV67 " | |
663 | #endif | |
664 | #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS | |
665 | "LEGACY_START " | |
666 | #endif | |
667 | #ifdef CONFIG_VERBOSE_MCHECK | |
668 | "VERBOSE_MCHECK " | |
669 | #endif | |
670 | ||
671 | #ifdef CONFIG_DISCONTIGMEM | |
672 | "DISCONTIGMEM " | |
673 | #ifdef CONFIG_NUMA | |
674 | "NUMA " | |
675 | #endif | |
676 | #endif | |
677 | ||
678 | #ifdef CONFIG_DEBUG_SPINLOCK | |
679 | "DEBUG_SPINLOCK " | |
680 | #endif | |
681 | #ifdef CONFIG_MAGIC_SYSRQ | |
682 | "MAGIC_SYSRQ " | |
683 | #endif | |
684 | "\n"); | |
685 | ||
686 | printk("Command line: %s\n", command_line); | |
687 | ||
688 | /* | |
689 | * Sync up the HAE. | |
690 | * Save the SRM's current value for restoration. | |
691 | */ | |
692 | srm_hae = *alpha_mv.hae_register; | |
693 | __set_hae(alpha_mv.hae_cache); | |
694 | ||
695 | /* Reset enable correctable error reports. */ | |
696 | wrmces(0x7); | |
697 | ||
698 | /* Find our memory. */ | |
699 | setup_memory(kernel_end); | |
700 | ||
701 | /* First guess at cpu cache sizes. Do this before init_arch. */ | |
702 | determine_cpu_caches(cpu->type); | |
703 | ||
704 | /* Initialize the machine. Usually has to do with setting up | |
705 | DMA windows and the like. */ | |
706 | if (alpha_mv.init_arch) | |
707 | alpha_mv.init_arch(); | |
708 | ||
709 | /* Reserve standard resources. */ | |
710 | reserve_std_resources(); | |
711 | ||
712 | /* | |
713 | * Give us a default console. TGA users will see nothing until | |
714 | * chr_dev_init is called, rather late in the boot sequence. | |
715 | */ | |
716 | ||
717 | #ifdef CONFIG_VT | |
718 | #if defined(CONFIG_VGA_CONSOLE) | |
719 | conswitchp = &vga_con; | |
720 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
721 | conswitchp = &dummy_con; | |
722 | #endif | |
723 | #endif | |
724 | ||
725 | /* Default root filesystem to sda2. */ | |
726 | ROOT_DEV = Root_SDA2; | |
727 | ||
728 | #ifdef CONFIG_EISA | |
729 | /* FIXME: only set this when we actually have EISA in this box? */ | |
730 | EISA_bus = 1; | |
731 | #endif | |
732 | ||
733 | /* | |
734 | * Check ASN in HWRPB for validity, report if bad. | |
735 | * FIXME: how was this failing? Should we trust it instead, | |
736 | * and copy the value into alpha_mv.max_asn? | |
737 | */ | |
738 | ||
739 | if (hwrpb->max_asn != MAX_ASN) { | |
740 | printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn); | |
741 | } | |
742 | ||
743 | /* | |
744 | * Identify the flock of penguins. | |
745 | */ | |
746 | ||
747 | #ifdef CONFIG_SMP | |
748 | setup_smp(); | |
749 | #endif | |
750 | paging_init(); | |
751 | } | |
752 | ||
1da177e4 LT |
753 | static char sys_unknown[] = "Unknown"; |
754 | static char systype_names[][16] = { | |
755 | "0", | |
756 | "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen", | |
757 | "Pelican", "Morgan", "Sable", "Medulla", "Noname", | |
758 | "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind", | |
759 | "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1", | |
760 | "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake", | |
761 | "Cortex", "29", "Miata", "XXM", "Takara", "Yukon", | |
762 | "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel" | |
763 | }; | |
764 | ||
765 | static char unofficial_names[][8] = {"100", "Ruffian"}; | |
766 | ||
767 | static char api_names[][16] = {"200", "Nautilus"}; | |
768 | ||
769 | static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"}; | |
770 | static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4}; | |
771 | ||
772 | static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"}; | |
773 | static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2}; | |
774 | ||
775 | static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"}; | |
776 | static int eb64p_indices[] = {0,0,1,2}; | |
777 | ||
778 | static char eb66_names[][8] = {"EB66", "EB66+"}; | |
779 | static int eb66_indices[] = {0,0,1}; | |
780 | ||
781 | static char marvel_names[][16] = { | |
782 | "Marvel/EV7" | |
783 | }; | |
784 | static int marvel_indices[] = { 0 }; | |
785 | ||
786 | static char rawhide_names[][16] = { | |
787 | "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci" | |
788 | }; | |
789 | static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4}; | |
790 | ||
791 | static char titan_names[][16] = { | |
792 | "DEFAULT", "Privateer", "Falcon", "Granite" | |
793 | }; | |
794 | static int titan_indices[] = {0,1,2,2,3}; | |
795 | ||
796 | static char tsunami_names[][16] = { | |
797 | "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper", | |
798 | "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne", | |
799 | "Flying Clipper", "Shark" | |
800 | }; | |
801 | static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12}; | |
802 | ||
803 | static struct alpha_machine_vector * __init | |
804 | get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) | |
805 | { | |
806 | static struct alpha_machine_vector *systype_vecs[] __initdata = | |
807 | { | |
808 | NULL, /* 0 */ | |
809 | NULL, /* ADU */ | |
810 | NULL, /* Cobra */ | |
811 | NULL, /* Ruby */ | |
812 | NULL, /* Flamingo */ | |
813 | NULL, /* Mannequin */ | |
814 | &jensen_mv, | |
815 | NULL, /* Pelican */ | |
816 | NULL, /* Morgan */ | |
817 | NULL, /* Sable -- see below. */ | |
818 | NULL, /* Medulla */ | |
819 | &noname_mv, | |
820 | NULL, /* Turbolaser */ | |
821 | &avanti_mv, | |
822 | NULL, /* Mustang */ | |
823 | NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */ | |
824 | NULL, /* Tradewind */ | |
825 | NULL, /* Mikasa -- see below. */ | |
826 | NULL, /* EB64 */ | |
827 | NULL, /* EB66 -- see variation. */ | |
828 | NULL, /* EB64+ -- see variation. */ | |
829 | &alphabook1_mv, | |
830 | &rawhide_mv, | |
831 | NULL, /* K2 */ | |
832 | &lynx_mv, /* Lynx */ | |
833 | &xl_mv, | |
834 | NULL, /* EB164 -- see variation. */ | |
835 | NULL, /* Noritake -- see below. */ | |
836 | NULL, /* Cortex */ | |
837 | NULL, /* 29 */ | |
838 | &miata_mv, | |
839 | NULL, /* XXM */ | |
840 | &takara_mv, | |
841 | NULL, /* Yukon */ | |
842 | NULL, /* Tsunami -- see variation. */ | |
843 | &wildfire_mv, /* Wildfire */ | |
844 | NULL, /* CUSCO */ | |
845 | &eiger_mv, /* Eiger */ | |
846 | NULL, /* Titan */ | |
847 | NULL, /* Marvel */ | |
848 | }; | |
849 | ||
850 | static struct alpha_machine_vector *unofficial_vecs[] __initdata = | |
851 | { | |
852 | NULL, /* 100 */ | |
853 | &ruffian_mv, | |
854 | }; | |
855 | ||
856 | static struct alpha_machine_vector *api_vecs[] __initdata = | |
857 | { | |
858 | NULL, /* 200 */ | |
859 | &nautilus_mv, | |
860 | }; | |
861 | ||
862 | static struct alpha_machine_vector *alcor_vecs[] __initdata = | |
863 | { | |
864 | &alcor_mv, &xlt_mv, &xlt_mv | |
865 | }; | |
866 | ||
867 | static struct alpha_machine_vector *eb164_vecs[] __initdata = | |
868 | { | |
869 | &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv | |
870 | }; | |
871 | ||
872 | static struct alpha_machine_vector *eb64p_vecs[] __initdata = | |
873 | { | |
874 | &eb64p_mv, | |
875 | &cabriolet_mv, | |
876 | &cabriolet_mv /* AlphaPCI64 */ | |
877 | }; | |
878 | ||
879 | static struct alpha_machine_vector *eb66_vecs[] __initdata = | |
880 | { | |
881 | &eb66_mv, | |
882 | &eb66p_mv | |
883 | }; | |
884 | ||
885 | static struct alpha_machine_vector *marvel_vecs[] __initdata = | |
886 | { | |
887 | &marvel_ev7_mv, | |
888 | }; | |
889 | ||
890 | static struct alpha_machine_vector *titan_vecs[] __initdata = | |
891 | { | |
892 | &titan_mv, /* default */ | |
893 | &privateer_mv, /* privateer */ | |
894 | &titan_mv, /* falcon */ | |
895 | &privateer_mv, /* granite */ | |
896 | }; | |
897 | ||
898 | static struct alpha_machine_vector *tsunami_vecs[] __initdata = | |
899 | { | |
900 | NULL, | |
901 | &dp264_mv, /* dp264 */ | |
902 | &dp264_mv, /* warhol */ | |
903 | &dp264_mv, /* windjammer */ | |
904 | &monet_mv, /* monet */ | |
905 | &clipper_mv, /* clipper */ | |
906 | &dp264_mv, /* goldrush */ | |
907 | &webbrick_mv, /* webbrick */ | |
908 | &dp264_mv, /* catamaran */ | |
909 | NULL, /* brisbane? */ | |
910 | NULL, /* melbourne? */ | |
911 | NULL, /* flying clipper? */ | |
912 | &shark_mv, /* shark */ | |
913 | }; | |
914 | ||
915 | /* ??? Do we need to distinguish between Rawhides? */ | |
916 | ||
917 | struct alpha_machine_vector *vec; | |
918 | ||
919 | /* Search the system tables first... */ | |
920 | vec = NULL; | |
25c8716c | 921 | if (type < ARRAY_SIZE(systype_vecs)) { |
1da177e4 LT |
922 | vec = systype_vecs[type]; |
923 | } else if ((type > ST_API_BIAS) && | |
25c8716c | 924 | (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) { |
1da177e4 LT |
925 | vec = api_vecs[type - ST_API_BIAS]; |
926 | } else if ((type > ST_UNOFFICIAL_BIAS) && | |
25c8716c | 927 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) { |
1da177e4 LT |
928 | vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; |
929 | } | |
930 | ||
931 | /* If we've not found one, try for a variation. */ | |
932 | ||
933 | if (!vec) { | |
934 | /* Member ID is a bit-field. */ | |
935 | unsigned long member = (variation >> 10) & 0x3f; | |
936 | ||
937 | cpu &= 0xffffffff; /* make it usable */ | |
938 | ||
939 | switch (type) { | |
940 | case ST_DEC_ALCOR: | |
25c8716c | 941 | if (member < ARRAY_SIZE(alcor_indices)) |
1da177e4 LT |
942 | vec = alcor_vecs[alcor_indices[member]]; |
943 | break; | |
944 | case ST_DEC_EB164: | |
25c8716c | 945 | if (member < ARRAY_SIZE(eb164_indices)) |
1da177e4 LT |
946 | vec = eb164_vecs[eb164_indices[member]]; |
947 | /* PC164 may show as EB164 variation with EV56 CPU, | |
948 | but, since no true EB164 had anything but EV5... */ | |
949 | if (vec == &eb164_mv && cpu == EV56_CPU) | |
950 | vec = &pc164_mv; | |
951 | break; | |
952 | case ST_DEC_EB64P: | |
25c8716c | 953 | if (member < ARRAY_SIZE(eb64p_indices)) |
1da177e4 LT |
954 | vec = eb64p_vecs[eb64p_indices[member]]; |
955 | break; | |
956 | case ST_DEC_EB66: | |
25c8716c | 957 | if (member < ARRAY_SIZE(eb66_indices)) |
1da177e4 LT |
958 | vec = eb66_vecs[eb66_indices[member]]; |
959 | break; | |
960 | case ST_DEC_MARVEL: | |
25c8716c | 961 | if (member < ARRAY_SIZE(marvel_indices)) |
1da177e4 LT |
962 | vec = marvel_vecs[marvel_indices[member]]; |
963 | break; | |
964 | case ST_DEC_TITAN: | |
965 | vec = titan_vecs[0]; /* default */ | |
25c8716c | 966 | if (member < ARRAY_SIZE(titan_indices)) |
1da177e4 LT |
967 | vec = titan_vecs[titan_indices[member]]; |
968 | break; | |
969 | case ST_DEC_TSUNAMI: | |
25c8716c | 970 | if (member < ARRAY_SIZE(tsunami_indices)) |
1da177e4 LT |
971 | vec = tsunami_vecs[tsunami_indices[member]]; |
972 | break; | |
973 | case ST_DEC_1000: | |
974 | if (cpu == EV5_CPU || cpu == EV56_CPU) | |
975 | vec = &mikasa_primo_mv; | |
976 | else | |
977 | vec = &mikasa_mv; | |
978 | break; | |
979 | case ST_DEC_NORITAKE: | |
980 | if (cpu == EV5_CPU || cpu == EV56_CPU) | |
981 | vec = &noritake_primo_mv; | |
982 | else | |
983 | vec = &noritake_mv; | |
984 | break; | |
985 | case ST_DEC_2100_A500: | |
986 | if (cpu == EV5_CPU || cpu == EV56_CPU) | |
987 | vec = &sable_gamma_mv; | |
988 | else | |
989 | vec = &sable_mv; | |
990 | break; | |
991 | } | |
992 | } | |
993 | return vec; | |
994 | } | |
995 | ||
996 | static struct alpha_machine_vector * __init | |
997 | get_sysvec_byname(const char *name) | |
998 | { | |
999 | static struct alpha_machine_vector *all_vecs[] __initdata = | |
1000 | { | |
1001 | &alcor_mv, | |
1002 | &alphabook1_mv, | |
1003 | &avanti_mv, | |
1004 | &cabriolet_mv, | |
1005 | &clipper_mv, | |
1006 | &dp264_mv, | |
1007 | &eb164_mv, | |
1008 | &eb64p_mv, | |
1009 | &eb66_mv, | |
1010 | &eb66p_mv, | |
1011 | &eiger_mv, | |
1012 | &jensen_mv, | |
1013 | &lx164_mv, | |
1014 | &lynx_mv, | |
1015 | &miata_mv, | |
1016 | &mikasa_mv, | |
1017 | &mikasa_primo_mv, | |
1018 | &monet_mv, | |
1019 | &nautilus_mv, | |
1020 | &noname_mv, | |
1021 | &noritake_mv, | |
1022 | &noritake_primo_mv, | |
1023 | &p2k_mv, | |
1024 | &pc164_mv, | |
1025 | &privateer_mv, | |
1026 | &rawhide_mv, | |
1027 | &ruffian_mv, | |
1028 | &rx164_mv, | |
1029 | &sable_mv, | |
1030 | &sable_gamma_mv, | |
1031 | &shark_mv, | |
1032 | &sx164_mv, | |
1033 | &takara_mv, | |
1034 | &webbrick_mv, | |
1035 | &wildfire_mv, | |
1036 | &xl_mv, | |
1037 | &xlt_mv | |
1038 | }; | |
1039 | ||
1040 | size_t i; | |
1041 | ||
25c8716c | 1042 | for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) { |
1da177e4 LT |
1043 | struct alpha_machine_vector *mv = all_vecs[i]; |
1044 | if (strcasecmp(mv->vector_name, name) == 0) | |
1045 | return mv; | |
1046 | } | |
1047 | return NULL; | |
1048 | } | |
1049 | ||
1050 | static void | |
1051 | get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, | |
1052 | char **type_name, char **variation_name) | |
1053 | { | |
1054 | unsigned long member; | |
1055 | ||
1056 | /* If not in the tables, make it UNKNOWN, | |
1057 | else set type name to family */ | |
25c8716c | 1058 | if (type < ARRAY_SIZE(systype_names)) { |
1da177e4 LT |
1059 | *type_name = systype_names[type]; |
1060 | } else if ((type > ST_API_BIAS) && | |
25c8716c | 1061 | (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) { |
1da177e4 LT |
1062 | *type_name = api_names[type - ST_API_BIAS]; |
1063 | } else if ((type > ST_UNOFFICIAL_BIAS) && | |
25c8716c | 1064 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) { |
1da177e4 LT |
1065 | *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; |
1066 | } else { | |
1067 | *type_name = sys_unknown; | |
1068 | *variation_name = sys_unknown; | |
1069 | return; | |
1070 | } | |
1071 | ||
1072 | /* Set variation to "0"; if variation is zero, done. */ | |
1073 | *variation_name = systype_names[0]; | |
1074 | if (variation == 0) { | |
1075 | return; | |
1076 | } | |
1077 | ||
1078 | member = (variation >> 10) & 0x3f; /* member ID is a bit-field */ | |
1079 | ||
1080 | cpu &= 0xffffffff; /* make it usable */ | |
1081 | ||
1082 | switch (type) { /* select by family */ | |
1083 | default: /* default to variation "0" for now */ | |
1084 | break; | |
1085 | case ST_DEC_EB164: | |
25c8716c | 1086 | if (member < ARRAY_SIZE(eb164_indices)) |
1da177e4 LT |
1087 | *variation_name = eb164_names[eb164_indices[member]]; |
1088 | /* PC164 may show as EB164 variation, but with EV56 CPU, | |
1089 | so, since no true EB164 had anything but EV5... */ | |
1090 | if (eb164_indices[member] == 0 && cpu == EV56_CPU) | |
1091 | *variation_name = eb164_names[1]; /* make it PC164 */ | |
1092 | break; | |
1093 | case ST_DEC_ALCOR: | |
25c8716c | 1094 | if (member < ARRAY_SIZE(alcor_indices)) |
1da177e4 LT |
1095 | *variation_name = alcor_names[alcor_indices[member]]; |
1096 | break; | |
1097 | case ST_DEC_EB64P: | |
25c8716c | 1098 | if (member < ARRAY_SIZE(eb64p_indices)) |
1da177e4 LT |
1099 | *variation_name = eb64p_names[eb64p_indices[member]]; |
1100 | break; | |
1101 | case ST_DEC_EB66: | |
25c8716c | 1102 | if (member < ARRAY_SIZE(eb66_indices)) |
1da177e4 LT |
1103 | *variation_name = eb66_names[eb66_indices[member]]; |
1104 | break; | |
1105 | case ST_DEC_MARVEL: | |
25c8716c | 1106 | if (member < ARRAY_SIZE(marvel_indices)) |
1da177e4 LT |
1107 | *variation_name = marvel_names[marvel_indices[member]]; |
1108 | break; | |
1109 | case ST_DEC_RAWHIDE: | |
25c8716c | 1110 | if (member < ARRAY_SIZE(rawhide_indices)) |
1da177e4 LT |
1111 | *variation_name = rawhide_names[rawhide_indices[member]]; |
1112 | break; | |
1113 | case ST_DEC_TITAN: | |
1114 | *variation_name = titan_names[0]; /* default */ | |
25c8716c | 1115 | if (member < ARRAY_SIZE(titan_indices)) |
1da177e4 LT |
1116 | *variation_name = titan_names[titan_indices[member]]; |
1117 | break; | |
1118 | case ST_DEC_TSUNAMI: | |
25c8716c | 1119 | if (member < ARRAY_SIZE(tsunami_indices)) |
1da177e4 LT |
1120 | *variation_name = tsunami_names[tsunami_indices[member]]; |
1121 | break; | |
1122 | } | |
1123 | } | |
1124 | ||
1125 | /* | |
1126 | * A change was made to the HWRPB via an ECO and the following code | |
1127 | * tracks a part of the ECO. In HWRPB versions less than 5, the ECO | |
1128 | * was not implemented in the console firmware. If it's revision 5 or | |
1129 | * greater we can get the name of the platform as an ASCII string from | |
1130 | * the HWRPB. That's what this function does. It checks the revision | |
1131 | * level and if the string is in the HWRPB it returns the address of | |
1132 | * the string--a pointer to the name of the platform. | |
1133 | * | |
1134 | * Returns: | |
1135 | * - Pointer to a ASCII string if it's in the HWRPB | |
1136 | * - Pointer to a blank string if the data is not in the HWRPB. | |
1137 | */ | |
1138 | ||
1139 | static char * | |
1140 | platform_string(void) | |
1141 | { | |
1142 | struct dsr_struct *dsr; | |
1143 | static char unk_system_string[] = "N/A"; | |
1144 | ||
1145 | /* Go to the console for the string pointer. | |
1146 | * If the rpb_vers is not 5 or greater the rpb | |
1147 | * is old and does not have this data in it. | |
1148 | */ | |
1149 | if (hwrpb->revision < 5) | |
1150 | return (unk_system_string); | |
1151 | else { | |
1152 | /* The Dynamic System Recognition struct | |
1153 | * has the system platform name starting | |
1154 | * after the character count of the string. | |
1155 | */ | |
1156 | dsr = ((struct dsr_struct *) | |
1157 | ((char *)hwrpb + hwrpb->dsr_offset)); | |
1158 | return ((char *)dsr + (dsr->sysname_off + | |
1159 | sizeof(long))); | |
1160 | } | |
1161 | } | |
1162 | ||
1163 | static int | |
1164 | get_nr_processors(struct percpu_struct *cpubase, unsigned long num) | |
1165 | { | |
1166 | struct percpu_struct *cpu; | |
1167 | unsigned long i; | |
1168 | int count = 0; | |
1169 | ||
1170 | for (i = 0; i < num; i++) { | |
1171 | cpu = (struct percpu_struct *) | |
1172 | ((char *)cpubase + i*hwrpb->processor_size); | |
1173 | if ((cpu->flags & 0x1cc) == 0x1cc) | |
1174 | count++; | |
1175 | } | |
1176 | return count; | |
1177 | } | |
1178 | ||
1179 | static void | |
1180 | show_cache_size (struct seq_file *f, const char *which, int shape) | |
1181 | { | |
1182 | if (shape == -1) | |
1183 | seq_printf (f, "%s\t\t: n/a\n", which); | |
1184 | else if (shape == 0) | |
1185 | seq_printf (f, "%s\t\t: unknown\n", which); | |
1186 | else | |
1187 | seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n", | |
1188 | which, shape >> 10, shape & 15, | |
1189 | 1 << ((shape >> 4) & 15)); | |
1190 | } | |
1191 | ||
1192 | static int | |
1193 | show_cpuinfo(struct seq_file *f, void *slot) | |
1194 | { | |
1195 | extern struct unaligned_stat { | |
1196 | unsigned long count, va, pc; | |
1197 | } unaligned[2]; | |
1198 | ||
1199 | static char cpu_names[][8] = { | |
1200 | "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56", | |
1201 | "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL", | |
1202 | "EV68CX", "EV7", "EV79", "EV69" | |
1203 | }; | |
1204 | ||
1205 | struct percpu_struct *cpu = slot; | |
1206 | unsigned int cpu_index; | |
1207 | char *cpu_name; | |
1208 | char *systype_name; | |
1209 | char *sysvariation_name; | |
1210 | int nr_processors; | |
1211 | ||
1212 | cpu_index = (unsigned) (cpu->type - 1); | |
1213 | cpu_name = "Unknown"; | |
25c8716c | 1214 | if (cpu_index < ARRAY_SIZE(cpu_names)) |
1da177e4 LT |
1215 | cpu_name = cpu_names[cpu_index]; |
1216 | ||
1217 | get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, | |
1218 | cpu->type, &systype_name, &sysvariation_name); | |
1219 | ||
1220 | nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); | |
1221 | ||
1222 | seq_printf(f, "cpu\t\t\t: Alpha\n" | |
1223 | "cpu model\t\t: %s\n" | |
1224 | "cpu variation\t\t: %ld\n" | |
1225 | "cpu revision\t\t: %ld\n" | |
1226 | "cpu serial number\t: %s\n" | |
1227 | "system type\t\t: %s\n" | |
1228 | "system variation\t: %s\n" | |
1229 | "system revision\t\t: %ld\n" | |
1230 | "system serial number\t: %s\n" | |
1231 | "cycle frequency [Hz]\t: %lu %s\n" | |
1232 | "timer frequency [Hz]\t: %lu.%02lu\n" | |
1233 | "page size [bytes]\t: %ld\n" | |
1234 | "phys. address bits\t: %ld\n" | |
1235 | "max. addr. space #\t: %ld\n" | |
1236 | "BogoMIPS\t\t: %lu.%02lu\n" | |
1237 | "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n" | |
1238 | "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n" | |
1239 | "platform string\t\t: %s\n" | |
1240 | "cpus detected\t\t: %d\n", | |
1241 | cpu_name, cpu->variation, cpu->revision, | |
1242 | (char*)cpu->serial_no, | |
1243 | systype_name, sysvariation_name, hwrpb->sys_revision, | |
1244 | (char*)hwrpb->ssn, | |
1245 | est_cycle_freq ? : hwrpb->cycle_freq, | |
1246 | est_cycle_freq ? "est." : "", | |
1247 | hwrpb->intr_freq / 4096, | |
1248 | (100 * hwrpb->intr_freq / 4096) % 100, | |
1249 | hwrpb->pagesize, | |
1250 | hwrpb->pa_bits, | |
1251 | hwrpb->max_asn, | |
1252 | loops_per_jiffy / (500000/HZ), | |
1253 | (loops_per_jiffy / (5000/HZ)) % 100, | |
1254 | unaligned[0].count, unaligned[0].pc, unaligned[0].va, | |
1255 | unaligned[1].count, unaligned[1].pc, unaligned[1].va, | |
1256 | platform_string(), nr_processors); | |
1257 | ||
1258 | #ifdef CONFIG_SMP | |
5f0e3da6 | 1259 | seq_printf(f, "cpus active\t\t: %u\n" |
1da177e4 | 1260 | "cpu active mask\t\t: %016lx\n", |
81740fc6 | 1261 | num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]); |
1da177e4 LT |
1262 | #endif |
1263 | ||
1264 | show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape); | |
1265 | show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape); | |
1266 | show_cache_size (f, "L2 cache", alpha_l2_cacheshape); | |
1267 | show_cache_size (f, "L3 cache", alpha_l3_cacheshape); | |
1268 | ||
1269 | return 0; | |
1270 | } | |
1271 | ||
1272 | static int __init | |
1273 | read_mem_block(int *addr, int stride, int size) | |
1274 | { | |
1275 | long nloads = size / stride, cnt, tmp; | |
1276 | ||
1277 | __asm__ __volatile__( | |
1278 | " rpcc %0\n" | |
1279 | "1: ldl %3,0(%2)\n" | |
1280 | " subq %1,1,%1\n" | |
1281 | /* Next two XORs introduce an explicit data dependency between | |
1282 | consecutive loads in the loop, which will give us true load | |
1283 | latency. */ | |
1284 | " xor %3,%2,%2\n" | |
1285 | " xor %3,%2,%2\n" | |
1286 | " addq %2,%4,%2\n" | |
1287 | " bne %1,1b\n" | |
1288 | " rpcc %3\n" | |
1289 | " subl %3,%0,%0\n" | |
1290 | : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp) | |
1291 | : "r" (stride), "1" (nloads), "2" (addr)); | |
1292 | ||
1293 | return cnt / (size / stride); | |
1294 | } | |
1295 | ||
1296 | #define CSHAPE(totalsize, linesize, assoc) \ | |
1297 | ((totalsize & ~0xff) | (linesize << 4) | assoc) | |
1298 | ||
1299 | /* ??? EV5 supports up to 64M, but did the systems with more than | |
1300 | 16M of BCACHE ever exist? */ | |
1301 | #define MAX_BCACHE_SIZE 16*1024*1024 | |
1302 | ||
1303 | /* Note that the offchip caches are direct mapped on all Alphas. */ | |
1304 | static int __init | |
1305 | external_cache_probe(int minsize, int width) | |
1306 | { | |
1307 | int cycles, prev_cycles = 1000000; | |
1308 | int stride = 1 << width; | |
1309 | long size = minsize, maxsize = MAX_BCACHE_SIZE * 2; | |
1310 | ||
1311 | if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT) | |
74fd1b68 | 1312 | maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT); |
1da177e4 LT |
1313 | |
1314 | /* Get the first block cached. */ | |
1315 | read_mem_block(__va(0), stride, size); | |
1316 | ||
1317 | while (size < maxsize) { | |
1318 | /* Get an average load latency in cycles. */ | |
1319 | cycles = read_mem_block(__va(0), stride, size); | |
1320 | if (cycles > prev_cycles * 2) { | |
1321 | /* Fine, we exceed the cache. */ | |
1322 | printk("%ldK Bcache detected; load hit latency %d " | |
1323 | "cycles, load miss latency %d cycles\n", | |
1324 | size >> 11, prev_cycles, cycles); | |
1325 | return CSHAPE(size >> 1, width, 1); | |
1326 | } | |
1327 | /* Try to get the next block cached. */ | |
1328 | read_mem_block(__va(size), stride, size); | |
1329 | prev_cycles = cycles; | |
1330 | size <<= 1; | |
1331 | } | |
1332 | return -1; /* No BCACHE found. */ | |
1333 | } | |
1334 | ||
1335 | static void __init | |
1336 | determine_cpu_caches (unsigned int cpu_type) | |
1337 | { | |
1338 | int L1I, L1D, L2, L3; | |
1339 | ||
1340 | switch (cpu_type) { | |
1341 | case EV4_CPU: | |
1342 | case EV45_CPU: | |
1343 | { | |
1344 | if (cpu_type == EV4_CPU) | |
1345 | L1I = CSHAPE(8*1024, 5, 1); | |
1346 | else | |
1347 | L1I = CSHAPE(16*1024, 5, 1); | |
1348 | L1D = L1I; | |
1349 | L3 = -1; | |
1350 | ||
1351 | /* BIU_CTL is a write-only Abox register. PALcode has a | |
1352 | shadow copy, and may be available from some versions | |
1353 | of the CSERVE PALcall. If we can get it, then | |
1354 | ||
1355 | unsigned long biu_ctl, size; | |
1356 | size = 128*1024 * (1 << ((biu_ctl >> 28) & 7)); | |
1357 | L2 = CSHAPE (size, 5, 1); | |
1358 | ||
1359 | Unfortunately, we can't rely on that. | |
1360 | */ | |
1361 | L2 = external_cache_probe(128*1024, 5); | |
1362 | break; | |
1363 | } | |
1364 | ||
1365 | case LCA4_CPU: | |
1366 | { | |
1367 | unsigned long car, size; | |
1368 | ||
1369 | L1I = L1D = CSHAPE(8*1024, 5, 1); | |
1370 | L3 = -1; | |
1371 | ||
1372 | car = *(vuip) phys_to_virt (0x120000078UL); | |
1373 | size = 64*1024 * (1 << ((car >> 5) & 7)); | |
1374 | /* No typo -- 8 byte cacheline size. Whodathunk. */ | |
1375 | L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1); | |
1376 | break; | |
1377 | } | |
1378 | ||
1379 | case EV5_CPU: | |
1380 | case EV56_CPU: | |
1381 | { | |
1382 | unsigned long sc_ctl, width; | |
1383 | ||
1384 | L1I = L1D = CSHAPE(8*1024, 5, 1); | |
1385 | ||
1386 | /* Check the line size of the Scache. */ | |
1387 | sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL); | |
1388 | width = sc_ctl & 0x1000 ? 6 : 5; | |
1389 | L2 = CSHAPE (96*1024, width, 3); | |
1390 | ||
1391 | /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode | |
1392 | has a shadow copy, and may be available from some versions | |
1393 | of the CSERVE PALcall. If we can get it, then | |
1394 | ||
1395 | unsigned long bc_control, bc_config, size; | |
1396 | size = 1024*1024 * (1 << ((bc_config & 7) - 1)); | |
1397 | L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1); | |
1398 | ||
1399 | Unfortunately, we can't rely on that. | |
1400 | */ | |
1401 | L3 = external_cache_probe(1024*1024, width); | |
1402 | break; | |
1403 | } | |
1404 | ||
1405 | case PCA56_CPU: | |
1406 | case PCA57_CPU: | |
1407 | { | |
1da177e4 LT |
1408 | if (cpu_type == PCA56_CPU) { |
1409 | L1I = CSHAPE(16*1024, 6, 1); | |
1410 | L1D = CSHAPE(8*1024, 5, 1); | |
1411 | } else { | |
1412 | L1I = CSHAPE(32*1024, 6, 2); | |
1413 | L1D = CSHAPE(16*1024, 5, 1); | |
1414 | } | |
1415 | L3 = -1; | |
1416 | ||
280da4e4 RH |
1417 | #if 0 |
1418 | unsigned long cbox_config, size; | |
1419 | ||
1da177e4 LT |
1420 | cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); |
1421 | size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); | |
1422 | ||
1da177e4 LT |
1423 | L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); |
1424 | #else | |
1425 | L2 = external_cache_probe(512*1024, 6); | |
1426 | #endif | |
1427 | break; | |
1428 | } | |
1429 | ||
1430 | case EV6_CPU: | |
1431 | case EV67_CPU: | |
1432 | case EV68CB_CPU: | |
1433 | case EV68AL_CPU: | |
1434 | case EV68CX_CPU: | |
1435 | case EV69_CPU: | |
1436 | L1I = L1D = CSHAPE(64*1024, 6, 2); | |
1437 | L2 = external_cache_probe(1024*1024, 6); | |
1438 | L3 = -1; | |
1439 | break; | |
1440 | ||
1441 | case EV7_CPU: | |
1442 | case EV79_CPU: | |
1443 | L1I = L1D = CSHAPE(64*1024, 6, 2); | |
1444 | L2 = CSHAPE(7*1024*1024/4, 6, 7); | |
1445 | L3 = -1; | |
1446 | break; | |
1447 | ||
1448 | default: | |
1449 | /* Nothing known about this cpu type. */ | |
1450 | L1I = L1D = L2 = L3 = 0; | |
1451 | break; | |
1452 | } | |
1453 | ||
1454 | alpha_l1i_cacheshape = L1I; | |
1455 | alpha_l1d_cacheshape = L1D; | |
1456 | alpha_l2_cacheshape = L2; | |
1457 | alpha_l3_cacheshape = L3; | |
1458 | } | |
1459 | ||
1460 | /* | |
1461 | * We show only CPU #0 info. | |
1462 | */ | |
1463 | static void * | |
1464 | c_start(struct seq_file *f, loff_t *pos) | |
1465 | { | |
1466 | return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset; | |
1467 | } | |
1468 | ||
1469 | static void * | |
1470 | c_next(struct seq_file *f, void *v, loff_t *pos) | |
1471 | { | |
1472 | return NULL; | |
1473 | } | |
1474 | ||
1475 | static void | |
1476 | c_stop(struct seq_file *f, void *v) | |
1477 | { | |
1478 | } | |
1479 | ||
03a44825 | 1480 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
1481 | .start = c_start, |
1482 | .next = c_next, | |
1483 | .stop = c_stop, | |
1484 | .show = show_cpuinfo, | |
1485 | }; | |
1486 | ||
1487 | ||
1488 | static int | |
1489 | alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1490 | { | |
1491 | #if 1 | |
1492 | /* FIXME FIXME FIXME */ | |
1493 | /* If we are using SRM and serial console, just hard halt here. */ | |
1494 | if (alpha_using_srm && srmcons_output) | |
1495 | __halt(); | |
1496 | #endif | |
1497 | return NOTIFY_DONE; | |
1498 | } | |
e5c6c8e4 MN |
1499 | |
1500 | static __init int add_pcspkr(void) | |
1501 | { | |
1502 | struct platform_device *pd; | |
1503 | int ret; | |
1504 | ||
1505 | pd = platform_device_alloc("pcspkr", -1); | |
1506 | if (!pd) | |
1507 | return -ENOMEM; | |
1508 | ||
1509 | ret = platform_device_add(pd); | |
1510 | if (ret) | |
1511 | platform_device_put(pd); | |
1512 | ||
1513 | return ret; | |
1514 | } | |
1515 | device_initcall(add_pcspkr); |