[mirror_ubuntu-zesty-kernel.git] / arch / alpha / kernel / sys_takara.c

/*
 *	linux/arch/alpha/kernel/sys_takara.c
 *
 *	Copyright (C) 1995 David A Rusling
 *	Copyright (C) 1996 Jay A Estabrook
 *	Copyright (C) 1998, 1999 Richard Henderson
 *
 * Code supporting the TAKARA.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>

#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_cia.h>
#include <asm/tlbflush.h>

#include "proto.h"
#include "irq_impl.h"
#include "pci_impl.h"
#include "machvec_impl.h"
#include "pc873xx.h"

/* Note mask bit is true for DISABLED irqs.  */
static unsigned long cached_irq_mask[2] = { -1, -1 };

static inline void
takara_update_irq_hw(unsigned long irq, unsigned long mask)
{
	int regaddr;

	mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30));
	regaddr = 0x510 + (((irq - 16) >> 2) & 0x0c);
	outl(mask & 0xffff0000UL, regaddr);
}

static inline void
takara_enable_irq(unsigned int irq)
{
	unsigned long mask;
	mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
	takara_update_irq_hw(irq, mask);
}

static void
takara_disable_irq(unsigned int irq)
{
	unsigned long mask;
	mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
	takara_update_irq_hw(irq, mask);
}

static struct irq_chip takara_irq_type = {
	.name		= "TAKARA",
	.unmask		= takara_enable_irq,
	.mask		= takara_disable_irq,
	.mask_ack	= takara_disable_irq,
};

static void
takara_device_interrupt(unsigned long vector)
{
	unsigned intstatus;

	/*
	 * The PALcode will have passed us vectors 0x800 or 0x810,
	 * which are fairly arbitrary values and serve only to tell
	 * us whether an interrupt has come in on IRQ0 or IRQ1. If
	 * it's IRQ1 it's a PCI interrupt; if it's IRQ0, it's
	 * probably ISA, but PCI interrupts can come through IRQ0
	 * as well if the interrupt controller isn't in accelerated
	 * mode.
	 *
	 * OTOH, the accelerator thing doesn't seem to be working
	 * overly well, so what we'll do instead is try directly
	 * examining the Master Interrupt Register to see if it's a
	 * PCI interrupt, and if _not_ then we'll pass it on to the
	 * ISA handler.
	 */

	intstatus = inw(0x500) & 15;
	if (intstatus) {
		/*
		 * This is a PCI interrupt. Check each bit and
		 * despatch an interrupt if it's set.
		 */

		if (intstatus & 8) handle_irq(16+3);
		if (intstatus & 4) handle_irq(16+2);
		if (intstatus & 2) handle_irq(16+1);
		if (intstatus & 1) handle_irq(16+0);
	} else {
		isa_device_interrupt (vector);
	}
}

static void 
takara_srm_device_interrupt(unsigned long vector)
{
	int irq = (vector - 0x800) >> 4;
	handle_irq(irq);
}

static void __init
takara_init_irq(void)
{
	long i;

	init_i8259a_irqs();

	if (alpha_using_srm) {
		alpha_mv.device_interrupt = takara_srm_device_interrupt;
	} else {
		unsigned int ctlreg = inl(0x500);

		/* Return to non-accelerated mode.  */
		ctlreg &= ~0x8000;
		outl(ctlreg, 0x500);

		/* Enable the PCI interrupt register.  */
		ctlreg = 0x05107c00;
		outl(ctlreg, 0x500);
	}

	for (i = 16; i < 128; i += 16)
		takara_update_irq_hw(i, -1);

	for (i = 16; i < 128; ++i) {
		irq_to_desc(i)->status |= IRQ_LEVEL;
		set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq);
	}

	common_init_isa_dma();
}


/*
 * The Takara has PCI devices 1, 2, and 3 configured to slots 20,
 * 19, and 18 respectively, in the default configuration. They can
 * also be jumpered to slots 8, 7, and 6 respectively, which is fun
 * because the SIO ISA bridge can also be slot 7. However, the SIO
 * doesn't explicitly generate PCI-type interrupts, so we can
 * assign it whatever the hell IRQ we like and it doesn't matter.
 */

static int __init
takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin)
{
	static char irq_tab[15][5] __initdata = {
		{ 16+3, 16+3, 16+3, 16+3, 16+3},   /* slot  6 == device 3 */
		{ 16+2, 16+2, 16+2, 16+2, 16+2},   /* slot  7 == device 2 */
		{ 16+1, 16+1, 16+1, 16+1, 16+1},   /* slot  8 == device 1 */
		{   -1,   -1,   -1,   -1,   -1},   /* slot  9 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 10 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 11 == nothing */
		/* These are behind the bridges.  */
		{   12,   12,   13,   14,   15},   /* slot 12 == nothing */
		{    8,    8,    9,   19,   11},   /* slot 13 == nothing */
		{    4,    4,    5,    6,    7},   /* slot 14 == nothing */
		{    0,    0,    1,    2,    3},   /* slot 15 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 16 == nothing */
		{64+ 0, 64+0, 64+1, 64+2, 64+3},   /* slot 17= device 4 */
		{48+ 0, 48+0, 48+1, 48+2, 48+3},   /* slot 18= device 3 */
		{32+ 0, 32+0, 32+1, 32+2, 32+3},   /* slot 19= device 2 */
		{16+ 0, 16+0, 16+1, 16+2, 16+3},   /* slot 20= device 1 */
	};
	const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
        int irq = COMMON_TABLE_LOOKUP;
	if (irq >= 0 && irq < 16) {
		/* Guess that we are behind a bridge.  */
		unsigned int busslot = PCI_SLOT(dev->bus->self->devfn);
		irq += irq_tab[busslot-min_idsel][0];
	}
	return irq;
}

static int __init
takara_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	static char irq_tab[15][5] __initdata = {
		{ 16+3, 16+3, 16+3, 16+3, 16+3},   /* slot  6 == device 3 */
		{ 16+2, 16+2, 16+2, 16+2, 16+2},   /* slot  7 == device 2 */
		{ 16+1, 16+1, 16+1, 16+1, 16+1},   /* slot  8 == device 1 */
		{   -1,   -1,   -1,   -1,   -1},   /* slot  9 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 10 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 11 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 12 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 13 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 14 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 15 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 16 == nothing */
		{   -1,   -1,   -1,   -1,   -1},   /* slot 17 == nothing */
		{ 16+3, 16+3, 16+3, 16+3, 16+3},   /* slot 18 == device 3 */
		{ 16+2, 16+2, 16+2, 16+2, 16+2},   /* slot 19 == device 2 */
		{ 16+1, 16+1, 16+1, 16+1, 16+1},   /* slot 20 == device 1 */
	};
	const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
	return COMMON_TABLE_LOOKUP;
}

static u8 __init
takara_swizzle(struct pci_dev *dev, u8 *pinp)
{
	int slot = PCI_SLOT(dev->devfn);
	int pin = *pinp;
	unsigned int ctlreg = inl(0x500);
	unsigned int busslot;

	if (!dev->bus->self)
		return slot;

	busslot = PCI_SLOT(dev->bus->self->devfn);
	/* Check for built-in bridges.  */
	if (dev->bus->number != 0
	    && busslot > 16
	    && ((1<<(36-busslot)) & ctlreg)) {
		if (pin == 1)
			pin += (20 - busslot);
		else {
			printk(KERN_WARNING "takara_swizzle: can only "
			       "handle cards with INTA IRQ pin.\n");
		}
	} else {
		/* Must be a card-based bridge.  */
		printk(KERN_WARNING "takara_swizzle: cannot handle "
		       "card-bridge behind builtin bridge yet.\n");
	}

	*pinp = pin;
	return slot;
}

static void __init
takara_init_pci(void)
{
	if (alpha_using_srm)
		alpha_mv.pci_map_irq = takara_map_irq_srm;

	cia_init_pci();

	if (pc873xx_probe() == -1) {
		printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
	} else {
		printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
			pc873xx_get_model(), pc873xx_get_base());
		pc873xx_enable_ide();
	}
}


/*
 * The System Vector
 */

struct alpha_machine_vector takara_mv __initmv = {
	.vector_name		= "Takara",
	DO_EV5_MMU,
	DO_DEFAULT_RTC,
	DO_CIA_IO,
	.machine_check		= cia_machine_check,
	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,
	.min_io_address		= DEFAULT_IO_BASE,
	.min_mem_address	= CIA_DEFAULT_MEM_BASE,

	.nr_irqs		= 128,
	.device_interrupt	= takara_device_interrupt,

	.init_arch		= cia_init_arch,
	.init_irq		= takara_init_irq,
	.init_rtc		= common_init_rtc,
	.init_pci		= takara_init_pci,
	.kill_arch		= cia_kill_arch,
	.pci_map_irq		= takara_map_irq,
	.pci_swizzle		= takara_swizzle,
};
ALIAS_MV(takara)
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/alpha/kernel/sys_takara.c
	3	*
	4	* Copyright (C) 1995 David A Rusling
	5	* Copyright (C) 1996 Jay A Estabrook
	6	* Copyright (C) 1998, 1999 Richard Henderson
	7	*
	8	* Code supporting the TAKARA.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/types.h>
	13	#include <linux/mm.h>
	14	#include <linux/sched.h>
	15	#include <linux/pci.h>
	16	#include <linux/init.h>
	17
	18	#include <asm/ptrace.h>
	19	#include <asm/system.h>
	20	#include <asm/dma.h>
	21	#include <asm/irq.h>
	22	#include <asm/mmu_context.h>
	23	#include <asm/io.h>
	24	#include <asm/pgtable.h>
	25	#include <asm/core_cia.h>
	26	#include <asm/tlbflush.h>
	27
	28	#include "proto.h"
	29	#include "irq_impl.h"
	30	#include "pci_impl.h"
	31	#include "machvec_impl.h"
59b25ed9	32	#include "pc873xx.h"
1da177e4 LT	33
	34	/* Note mask bit is true for DISABLED irqs. */
	35	static unsigned long cached_irq_mask[2] = { -1, -1 };
	36
	37	static inline void
	38	takara_update_irq_hw(unsigned long irq, unsigned long mask)
	39	{
	40	int regaddr;
	41
	42	mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30));
	43	regaddr = 0x510 + (((irq - 16) >> 2) & 0x0c);
	44	outl(mask & 0xffff0000UL, regaddr);
	45	}
	46
	47	static inline void
	48	takara_enable_irq(unsigned int irq)
	49	{
	50	unsigned long mask;
	51	mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
	52	takara_update_irq_hw(irq, mask);
	53	}
	54
	55	static void
	56	takara_disable_irq(unsigned int irq)
	57	{
	58	unsigned long mask;
	59	mask = (cached_irq_mask[irq >= 64] \|= 1UL << (irq & 63));
	60	takara_update_irq_hw(irq, mask);
	61	}
	62
44377f62	63	static struct irq_chip takara_irq_type = {
8ab1221c	64	.name = "TAKARA",
7d209c81 KM	65	.unmask = takara_enable_irq,
	66	.mask = takara_disable_irq,
	67	.mask_ack = takara_disable_irq,
1da177e4 LT	68	};
	69
	70	static void
7ca56053	71	takara_device_interrupt(unsigned long vector)
1da177e4 LT	72	{
	73	unsigned intstatus;
	74
	75	/*
	76	* The PALcode will have passed us vectors 0x800 or 0x810,
	77	* which are fairly arbitrary values and serve only to tell
	78	* us whether an interrupt has come in on IRQ0 or IRQ1. If
	79	* it's IRQ1 it's a PCI interrupt; if it's IRQ0, it's
	80	* probably ISA, but PCI interrupts can come through IRQ0
	81	* as well if the interrupt controller isn't in accelerated
	82	* mode.
	83	*
	84	* OTOH, the accelerator thing doesn't seem to be working
	85	* overly well, so what we'll do instead is try directly
	86	* examining the Master Interrupt Register to see if it's a
	87	* PCI interrupt, and if _not_ then we'll pass it on to the
	88	* ISA handler.
	89	*/
	90
	91	intstatus = inw(0x500) & 15;
	92	if (intstatus) {
	93	/*
	94	* This is a PCI interrupt. Check each bit and
	95	* despatch an interrupt if it's set.
	96	*/
	97
3dbb8c62 AV	98	if (intstatus & 8) handle_irq(16+3);
	99	if (intstatus & 4) handle_irq(16+2);
	100	if (intstatus & 2) handle_irq(16+1);
	101	if (intstatus & 1) handle_irq(16+0);
1da177e4	102	} else {
7ca56053	103	isa_device_interrupt (vector);
1da177e4 LT	104	}
	105	}
	106
	107	static void
7ca56053	108	takara_srm_device_interrupt(unsigned long vector)
1da177e4 LT	109	{
1da177e4 LT	110	int irq = (vector - 0x800) >> 4;
3dbb8c62	111	handle_irq(irq);
1da177e4 LT	112	}
	113
	114	static void __init
	115	takara_init_irq(void)
	116	{
	117	long i;
	118
	119	init_i8259a_irqs();
	120
	121	if (alpha_using_srm) {
	122	alpha_mv.device_interrupt = takara_srm_device_interrupt;
	123	} else {
	124	unsigned int ctlreg = inl(0x500);
	125
	126	/* Return to non-accelerated mode. */
	127	ctlreg &= ~0x8000;
	128	outl(ctlreg, 0x500);
	129
	130	/* Enable the PCI interrupt register. */
	131	ctlreg = 0x05107c00;
	132	outl(ctlreg, 0x500);
	133	}
	134
	135	for (i = 16; i < 128; i += 16)
	136	takara_update_irq_hw(i, -1);
	137
	138	for (i = 16; i < 128; ++i) {
a891b393	139	irq_to_desc(i)->status \|= IRQ_LEVEL;
7d209c81	140	set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq);
1da177e4 LT	141	}
	142
	143	common_init_isa_dma();
	144	}
	145
	146
	147	/*
	148	* The Takara has PCI devices 1, 2, and 3 configured to slots 20,
	149	* 19, and 18 respectively, in the default configuration. They can
	150	* also be jumpered to slots 8, 7, and 6 respectively, which is fun
	151	* because the SIO ISA bridge can also be slot 7. However, the SIO
	152	* doesn't explicitly generate PCI-type interrupts, so we can
	153	* assign it whatever the hell IRQ we like and it doesn't matter.
	154	*/
	155
	156	static int __init
	157	takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin)
	158	{
	159	static char irq_tab[15][5] __initdata = {
	160	{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */
	161	{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 7 == device 2 */
	162	{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 8 == device 1 */
	163	{ -1, -1, -1, -1, -1}, /* slot 9 == nothing */
	164	{ -1, -1, -1, -1, -1}, /* slot 10 == nothing */
	165	{ -1, -1, -1, -1, -1}, /* slot 11 == nothing */
	166	/* These are behind the bridges. */
	167	{ 12, 12, 13, 14, 15}, /* slot 12 == nothing */
	168	{ 8, 8, 9, 19, 11}, /* slot 13 == nothing */
	169	{ 4, 4, 5, 6, 7}, /* slot 14 == nothing */
	170	{ 0, 0, 1, 2, 3}, /* slot 15 == nothing */
	171	{ -1, -1, -1, -1, -1}, /* slot 16 == nothing */
	172	{64+ 0, 64+0, 64+1, 64+2, 64+3}, /* slot 17= device 4 */
	173	{48+ 0, 48+0, 48+1, 48+2, 48+3}, /* slot 18= device 3 */
	174	{32+ 0, 32+0, 32+1, 32+2, 32+3}, /* slot 19= device 2 */
	175	{16+ 0, 16+0, 16+1, 16+2, 16+3}, /* slot 20= device 1 */
	176	};
	177	const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
	178	int irq = COMMON_TABLE_LOOKUP;
	179	if (irq >= 0 && irq < 16) {
	180	/* Guess that we are behind a bridge. */
	181	unsigned int busslot = PCI_SLOT(dev->bus->self->devfn);
	182	irq += irq_tab[busslot-min_idsel][0];
	183	}
	184	return irq;
	185	}
	186
	187	static int __init
	188	takara_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
	189	{
	190	static char irq_tab[15][5] __initdata = {
	191	{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */
	192	{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 7 == device 2 */
	193	{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 8 == device 1 */
	194	{ -1, -1, -1, -1, -1}, /* slot 9 == nothing */
	195	{ -1, -1, -1, -1, -1}, /* slot 10 == nothing */
	196	{ -1, -1, -1, -1, -1}, /* slot 11 == nothing */
	197	{ -1, -1, -1, -1, -1}, /* slot 12 == nothing */
	198	{ -1, -1, -1, -1, -1}, /* slot 13 == nothing */
	199	{ -1, -1, -1, -1, -1}, /* slot 14 == nothing */
	200	{ -1, -1, -1, -1, -1}, /* slot 15 == nothing */
	201	{ -1, -1, -1, -1, -1}, /* slot 16 == nothing */
	202	{ -1, -1, -1, -1, -1}, /* slot 17 == nothing */
	203	{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 18 == device 3 */
	204	{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 19 == device 2 */
205	{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 20 == device 1 */
206	};
207	const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
208	return COMMON_TABLE_LOOKUP;
209	}
210
211	static u8 __init
212	takara_swizzle(struct pci_dev dev, u8 pinp)
213	{
214	int slot = PCI_SLOT(dev->devfn);
215	int pin = *pinp;
216	unsigned int ctlreg = inl(0x500);
217	unsigned int busslot;
218
219	if (!dev->bus->self)
220	return slot;
221
222	busslot = PCI_SLOT(dev->bus->self->devfn);
223	/* Check for built-in bridges. */
224	if (dev->bus->number != 0
225	&& busslot > 16
226	&& ((1<<(36-busslot)) & ctlreg)) {
227	if (pin == 1)
228	pin += (20 - busslot);
229	else {
230	printk(KERN_WARNING "takara_swizzle: can only "
231	"handle cards with INTA IRQ pin.\n");
232	}
233	} else {
234	/* Must be a card-based bridge. */
235	printk(KERN_WARNING "takara_swizzle: cannot handle "
236	"card-bridge behind builtin bridge yet.\n");
237	}
238
239	*pinp = pin;
240	return slot;
241	}
242
243	static void __init
244	takara_init_pci(void)
245	{
246	if (alpha_using_srm)
247	alpha_mv.pci_map_irq = takara_map_irq_srm;
248
249	cia_init_pci();
59b25ed9 ML	250
	251	if (pc873xx_probe() == -1) {
	252	printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
	253	} else {
	254	printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
	255	pc873xx_get_model(), pc873xx_get_base());
	256	pc873xx_enable_ide();
	257	}
1da177e4 LT	258	}
	259
	260
	261	/*
	262	* The System Vector
	263	*/
	264
	265	struct alpha_machine_vector takara_mv __initmv = {
	266	.vector_name = "Takara",
	267	DO_EV5_MMU,
	268	DO_DEFAULT_RTC,
	269	DO_CIA_IO,
	270	.machine_check = cia_machine_check,
	271	.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
	272	.min_io_address = DEFAULT_IO_BASE,
	273	.min_mem_address = CIA_DEFAULT_MEM_BASE,
	274
	275	.nr_irqs = 128,
	276	.device_interrupt = takara_device_interrupt,
	277
	278	.init_arch = cia_init_arch,
	279	.init_irq = takara_init_irq,
	280	.init_rtc = common_init_rtc,
	281	.init_pci = takara_init_pci,
	282	.kill_arch = cia_kill_arch,
	283	.pci_map_irq = takara_map_irq,
	284	.pci_swizzle = takara_swizzle,
	285	};
	286	ALIAS_MV(takara)