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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
4adeefe1 | 11 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
12 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
13 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
14 | select GENERIC_ATOMIC64 | |
15 | select GENERIC_CLOCKEVENTS | |
16 | select GENERIC_FIND_FIRST_BIT | |
17 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
18 | select GENERIC_IRQ_SHOW | |
19 | select GENERIC_PENDING_IRQ if SMP | |
20 | select GENERIC_SMP_IDLE_THREAD | |
f46121bd | 21 | select HAVE_ARCH_KGDB |
547f1125 | 22 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 23 | select HAVE_GENERIC_HARDIRQS |
4368902b | 24 | select HAVE_IOREMAP_PROT |
4d86dfbb VG |
25 | select HAVE_KPROBES |
26 | select HAVE_KRETPROBES | |
c121c506 | 27 | select HAVE_MEMBLOCK |
854a0d95 | 28 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 29 | select HAVE_OPROFILE |
9c57564e | 30 | select HAVE_PERF_EVENTS |
999159a5 | 31 | select IRQ_DOMAIN |
cfdbc2e1 | 32 | select MODULES_USE_ELF_RELA |
c121c506 | 33 | select NO_BOOTMEM |
999159a5 VG |
34 | select OF |
35 | select OF_EARLY_FLATTREE | |
9c57564e | 36 | select PERF_USE_VMALLOC |
cfdbc2e1 VG |
37 | |
38 | config SCHED_OMIT_FRAME_POINTER | |
39 | def_bool y | |
40 | ||
41 | config GENERIC_CSUM | |
42 | def_bool y | |
43 | ||
44 | config RWSEM_GENERIC_SPINLOCK | |
45 | def_bool y | |
46 | ||
47 | config ARCH_FLATMEM_ENABLE | |
48 | def_bool y | |
49 | ||
50 | config MMU | |
51 | def_bool y | |
52 | ||
53 | config NO_IOPORT | |
54 | def_bool y | |
55 | ||
56 | config GENERIC_CALIBRATE_DELAY | |
57 | def_bool y | |
58 | ||
59 | config GENERIC_HWEIGHT | |
60 | def_bool y | |
61 | ||
44c8bb91 VG |
62 | config STACKTRACE_SUPPORT |
63 | def_bool y | |
64 | select STACKTRACE | |
65 | ||
cfdbc2e1 VG |
66 | config HAVE_LATENCYTOP_SUPPORT |
67 | def_bool y | |
68 | ||
69 | config NO_DMA | |
70 | def_bool n | |
71 | ||
72 | source "init/Kconfig" | |
73 | source "kernel/Kconfig.freezer" | |
74 | ||
75 | menu "ARC Architecture Configuration" | |
76 | ||
93ad700d | 77 | menu "ARC Platform/SoC/Board" |
cfdbc2e1 | 78 | |
93ad700d | 79 | source "arch/arc/plat-arcfpga/Kconfig" |
cfdbc2e1 | 80 | #New platform adds here |
93ad700d | 81 | |
53d98958 | 82 | endmenu |
cfdbc2e1 VG |
83 | |
84 | menu "ARC CPU Configuration" | |
85 | ||
86 | choice | |
87 | prompt "ARC Core" | |
88 | default ARC_CPU_770 | |
89 | ||
90 | config ARC_CPU_750D | |
91 | bool "ARC750D" | |
92 | help | |
93 | Support for ARC750 core | |
94 | ||
95 | config ARC_CPU_770 | |
96 | bool "ARC770" | |
97 | select ARC_CPU_REL_4_10 | |
98 | help | |
99 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
100 | This core has a bunch of cool new features: | |
101 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
102 | Shared Address Spaces (for sharing TLB entires in MMU) | |
103 | -Caches: New Prog Model, Region Flush | |
104 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
105 | ||
106 | endchoice | |
107 | ||
108 | config CPU_BIG_ENDIAN | |
109 | bool "Enable Big Endian Mode" | |
110 | default n | |
111 | help | |
112 | Build kernel for Big Endian Mode of ARC CPU | |
113 | ||
fc7943d2 VG |
114 | # If a platform can't work with 0x8000_0000 based dma_addr_t |
115 | config ARC_PLAT_NEEDS_CPU_TO_DMA | |
116 | bool | |
117 | ||
41195d23 VG |
118 | config SMP |
119 | bool "Symmetric Multi-Processing (Incomplete)" | |
120 | default n | |
121 | select USE_GENERIC_SMP_HELPERS | |
122 | help | |
123 | This enables support for systems with more than one CPU. If you have | |
124 | a system with only one CPU, like most personal computers, say N. If | |
125 | you have a system with more than one CPU, say Y. | |
126 | ||
127 | if SMP | |
128 | ||
129 | config ARC_HAS_COH_CACHES | |
130 | def_bool n | |
131 | ||
41195d23 VG |
132 | config ARC_HAS_COH_RTSC |
133 | def_bool n | |
134 | ||
135 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
136 | def_bool n | |
137 | ||
138 | endif | |
139 | ||
140 | config NR_CPUS | |
141 | int "Maximum number of CPUs (2-32)" | |
142 | range 2 32 | |
143 | depends on SMP | |
144 | default "2" | |
145 | ||
cfdbc2e1 VG |
146 | menuconfig ARC_CACHE |
147 | bool "Enable Cache Support" | |
148 | default y | |
41195d23 VG |
149 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
150 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
151 | |
152 | if ARC_CACHE | |
153 | ||
154 | config ARC_CACHE_LINE_SHIFT | |
155 | int "Cache Line Length (as power of 2)" | |
156 | range 5 7 | |
157 | default "6" | |
158 | help | |
159 | Starting with ARC700 4.9, Cache line length is configurable, | |
160 | This option specifies "N", with Line-len = 2 power N | |
161 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
162 | Linux only supports same line lengths for I and D caches. | |
163 | ||
164 | config ARC_HAS_ICACHE | |
165 | bool "Use Instruction Cache" | |
166 | default y | |
167 | ||
168 | config ARC_HAS_DCACHE | |
169 | bool "Use Data Cache" | |
170 | default y | |
171 | ||
172 | config ARC_CACHE_PAGES | |
173 | bool "Per Page Cache Control" | |
174 | default y | |
175 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
176 | help | |
177 | This can be used to over-ride the global I/D Cache Enable on a | |
178 | per-page basis (but only for pages accessed via MMU such as | |
179 | Kernel Virtual address or User Virtual Address) | |
180 | TLB entries have a per-page Cache Enable Bit. | |
181 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
182 | Global DISABLE + Per Page ENABLE won't work | |
183 | ||
184 | endif #ARC_CACHE | |
185 | ||
8b5850f8 VG |
186 | config ARC_HAS_ICCM |
187 | bool "Use ICCM" | |
188 | help | |
189 | Single Cycle RAMS to store Fast Path Code | |
190 | default n | |
191 | ||
192 | config ARC_ICCM_SZ | |
193 | int "ICCM Size in KB" | |
194 | default "64" | |
195 | depends on ARC_HAS_ICCM | |
196 | ||
197 | config ARC_HAS_DCCM | |
198 | bool "Use DCCM" | |
199 | help | |
200 | Single Cycle RAMS to store Fast Path Data | |
201 | default n | |
202 | ||
203 | config ARC_DCCM_SZ | |
204 | int "DCCM Size in KB" | |
205 | default "64" | |
206 | depends on ARC_HAS_DCCM | |
207 | ||
208 | config ARC_DCCM_BASE | |
209 | hex "DCCM map address" | |
210 | default "0xA0000000" | |
211 | depends on ARC_HAS_DCCM | |
212 | ||
cfdbc2e1 VG |
213 | config ARC_HAS_HW_MPY |
214 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
215 | default y | |
216 | help | |
217 | Influences how gcc generates code for MPY operations. | |
218 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
219 | Multipler. Otherwise software multipy lib is used | |
220 | ||
221 | choice | |
222 | prompt "ARC700 MMU Version" | |
223 | default ARC_MMU_V3 if ARC_CPU_770 | |
224 | default ARC_MMU_V2 if ARC_CPU_750D | |
225 | ||
226 | config ARC_MMU_V1 | |
227 | bool "MMU v1" | |
228 | help | |
229 | Orig ARC700 MMU | |
230 | ||
231 | config ARC_MMU_V2 | |
232 | bool "MMU v2" | |
233 | help | |
234 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
235 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
236 | ||
237 | config ARC_MMU_V3 | |
238 | bool "MMU v3" | |
239 | depends on ARC_CPU_770 | |
240 | help | |
241 | Introduced with ARC700 4.10: New Features | |
242 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
243 | Shared Address Spaces (SASID) | |
244 | ||
245 | endchoice | |
246 | ||
247 | ||
248 | choice | |
249 | prompt "MMU Page Size" | |
250 | default ARC_PAGE_SIZE_8K | |
251 | ||
252 | config ARC_PAGE_SIZE_8K | |
253 | bool "8KB" | |
254 | help | |
255 | Choose between 8k vs 16k | |
256 | ||
257 | config ARC_PAGE_SIZE_16K | |
258 | bool "16KB" | |
259 | depends on ARC_MMU_V3 | |
260 | ||
261 | config ARC_PAGE_SIZE_4K | |
262 | bool "4KB" | |
263 | depends on ARC_MMU_V3 | |
264 | ||
265 | endchoice | |
266 | ||
4788a594 VG |
267 | config ARC_COMPACT_IRQ_LEVELS |
268 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
269 | default n | |
270 | # Timer HAS to be high priority, for any other high priority config | |
271 | select ARC_IRQ3_LV2 | |
41195d23 VG |
272 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
273 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
274 | |
275 | if ARC_COMPACT_IRQ_LEVELS | |
276 | ||
277 | config ARC_IRQ3_LV2 | |
278 | bool | |
279 | ||
280 | config ARC_IRQ5_LV2 | |
281 | bool | |
282 | ||
283 | config ARC_IRQ6_LV2 | |
284 | bool | |
285 | ||
286 | endif | |
287 | ||
cfdbc2e1 VG |
288 | config ARC_FPU_SAVE_RESTORE |
289 | bool "Enable FPU state persistence across context switch" | |
290 | default n | |
291 | help | |
292 | Double Precision Floating Point unit had dedictaed regs which | |
293 | need to be saved/restored across context-switch. | |
294 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
295 | hardware pieces to allow software to conditionally save/restore, | |
296 | based on actual usage of FPU by a task. Thus our implemn does | |
297 | this for all tasks in system. | |
298 | ||
fbf8e13d VG |
299 | config ARC_CANT_LLSC |
300 | def_bool n | |
301 | ||
cfdbc2e1 VG |
302 | menuconfig ARC_CPU_REL_4_10 |
303 | bool "Enable support for Rel 4.10 features" | |
304 | default n | |
305 | help | |
306 | -ARC770 (and dependent features) enabled | |
307 | -ARC750 also shares some of the new features with 770 | |
308 | ||
309 | config ARC_HAS_LLSC | |
310 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
311 | default y | |
fbf8e13d | 312 | depends on ARC_CPU_770 && !ARC_CANT_LLSC |
cfdbc2e1 VG |
313 | |
314 | config ARC_HAS_SWAPE | |
315 | bool "Insn: SWAPE (endian-swap)" | |
316 | default y | |
317 | depends on ARC_CPU_REL_4_10 | |
318 | ||
319 | config ARC_HAS_RTSC | |
320 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
321 | default y | |
322 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
323 | # if SMP, enable RTSC only if counter is coherent across cores |
324 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
325 | |
326 | endmenu # "ARC CPU Configuration" | |
327 | ||
cfdbc2e1 VG |
328 | config LINUX_LINK_BASE |
329 | hex "Linux Link Address" | |
330 | default "0x80000000" | |
331 | help | |
332 | ARC700 divides the 32 bit phy address space into two equal halves | |
333 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
334 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
335 | Typically Linux kernel is linked at the start of untransalted addr, | |
336 | hence the default value of 0x8zs. | |
337 | However some customers have peripherals mapped at this addr, so | |
338 | Linux needs to be scooted a bit. | |
339 | If you don't know what the above means, leave this setting alone. | |
340 | ||
080c3747 VG |
341 | config ARC_CURR_IN_REG |
342 | bool "Dedicate Register r25 for current_task pointer" | |
343 | default y | |
344 | help | |
345 | This reserved Register R25 to point to Current Task in | |
346 | kernel mode. This saves memory access for each such access | |
347 | ||
2e651ea1 VG |
348 | |
349 | config ARC_MISALIGN_ACCESS | |
350 | bool "Emulate unaligned memory access (userspace only)" | |
351 | default N | |
352 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
353 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
354 | help | |
355 | This enables misaligned 16 & 32 bit memory access from user space. | |
356 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
357 | potential bugs in code | |
358 | ||
cfdbc2e1 VG |
359 | config ARC_STACK_NONEXEC |
360 | bool "Make stack non-executable" | |
361 | default n | |
362 | help | |
363 | To disable the execute permissions of stack/heap of processes | |
364 | which are enabled by default. | |
365 | ||
366 | config HZ | |
367 | int "Timer Frequency" | |
368 | default 100 | |
369 | ||
cbe056f7 VG |
370 | config ARC_METAWARE_HLINK |
371 | bool "Support for Metaware debugger assisted Host access" | |
372 | default n | |
373 | help | |
374 | This options allows a Linux userland apps to directly access | |
375 | host file system (open/creat/read/write etc) with help from | |
376 | Metaware Debugger. This can come in handy for Linux-host communication | |
377 | when there is no real usable peripheral such as EMAC. | |
378 | ||
cfdbc2e1 VG |
379 | menuconfig ARC_DBG |
380 | bool "ARC debugging" | |
381 | default y | |
382 | ||
854a0d95 VG |
383 | config ARC_DW2_UNWIND |
384 | bool "Enable DWARF specific kernel stack unwind" | |
385 | depends on ARC_DBG | |
386 | default y | |
387 | select KALLSYMS | |
388 | help | |
389 | Compiles the kernel with DWARF unwind information and can be used | |
390 | to get stack backtraces. | |
391 | ||
392 | If you say Y here the resulting kernel image will be slightly larger | |
393 | but not slower, and it will give very useful debugging information. | |
394 | If you don't debug the kernel, you can say N, but we may not be able | |
395 | to solve problems without frame unwind information | |
396 | ||
cfdbc2e1 VG |
397 | config ARC_DBG_TLB_PARANOIA |
398 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 399 | depends on ARC_DBG |
cfdbc2e1 VG |
400 | default n |
401 | ||
402 | config ARC_DBG_TLB_MISS_COUNT | |
403 | bool "Profile TLB Misses" | |
404 | default n | |
405 | select DEBUG_FS | |
406 | depends on ARC_DBG | |
407 | help | |
408 | Counts number of I and D TLB Misses and exports them via Debugfs | |
409 | The counters can be cleared via Debugfs as well | |
410 | ||
cfdbc2e1 VG |
411 | config CMDLINE_UBOOT |
412 | bool "Support U-boot kernel command line passing" | |
413 | default n | |
414 | help | |
415 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
416 | command line from the U-boot environment to the Linux kernel then | |
417 | switch this option on. | |
418 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
6971881f VG |
419 | to it. kernel startup code will append this to DeviceTree |
420 | /bootargs provided cmdline args. | |
cfdbc2e1 | 421 | |
999159a5 VG |
422 | config ARC_BUILTIN_DTB_NAME |
423 | string "Built in DTB" | |
424 | help | |
425 | Set the name of the DTB to embed in the vmlinux binary | |
426 | Leaving it blank selects the minimal "skeleton" dtb | |
427 | ||
cfdbc2e1 VG |
428 | source "kernel/Kconfig.preempt" |
429 | ||
5628832f VG |
430 | menu "Executable file formats" |
431 | source "fs/Kconfig.binfmt" | |
432 | endmenu | |
433 | ||
cfdbc2e1 VG |
434 | endmenu # "ARC Architecture Configuration" |
435 | ||
436 | source "mm/Kconfig" | |
437 | source "net/Kconfig" | |
438 | source "drivers/Kconfig" | |
439 | source "fs/Kconfig" | |
440 | source "arch/arc/Kconfig.debug" | |
441 | source "security/Kconfig" | |
442 | source "crypto/Kconfig" | |
443 | source "lib/Kconfig" |