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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
11 | select ARCH_NO_VIRT_TO_BUS | |
4adeefe1 | 12 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
13 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
14 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
15 | select GENERIC_ATOMIC64 | |
16 | select GENERIC_CLOCKEVENTS | |
17 | select GENERIC_FIND_FIRST_BIT | |
18 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
19 | select GENERIC_IRQ_SHOW | |
bf90e1ea VG |
20 | select GENERIC_KERNEL_EXECVE |
21 | select GENERIC_KERNEL_THREAD | |
cfdbc2e1 | 22 | select GENERIC_PENDING_IRQ if SMP |
c3581039 | 23 | select GENERIC_SIGALTSTACK |
cfdbc2e1 | 24 | select GENERIC_SMP_IDLE_THREAD |
547f1125 | 25 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 26 | select HAVE_GENERIC_HARDIRQS |
c121c506 | 27 | select HAVE_MEMBLOCK |
854a0d95 | 28 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 29 | select HAVE_OPROFILE |
999159a5 | 30 | select IRQ_DOMAIN |
cfdbc2e1 | 31 | select MODULES_USE_ELF_RELA |
c121c506 | 32 | select NO_BOOTMEM |
999159a5 VG |
33 | select OF |
34 | select OF_EARLY_FLATTREE | |
cfdbc2e1 VG |
35 | |
36 | config SCHED_OMIT_FRAME_POINTER | |
37 | def_bool y | |
38 | ||
39 | config GENERIC_CSUM | |
40 | def_bool y | |
41 | ||
42 | config RWSEM_GENERIC_SPINLOCK | |
43 | def_bool y | |
44 | ||
45 | config ARCH_FLATMEM_ENABLE | |
46 | def_bool y | |
47 | ||
48 | config MMU | |
49 | def_bool y | |
50 | ||
51 | config NO_IOPORT | |
52 | def_bool y | |
53 | ||
54 | config GENERIC_CALIBRATE_DELAY | |
55 | def_bool y | |
56 | ||
57 | config GENERIC_HWEIGHT | |
58 | def_bool y | |
59 | ||
60 | config BINFMT_ELF | |
61 | def_bool y | |
62 | ||
44c8bb91 VG |
63 | config STACKTRACE_SUPPORT |
64 | def_bool y | |
65 | select STACKTRACE | |
66 | ||
cfdbc2e1 VG |
67 | config HAVE_LATENCYTOP_SUPPORT |
68 | def_bool y | |
69 | ||
70 | config NO_DMA | |
71 | def_bool n | |
72 | ||
73 | source "init/Kconfig" | |
74 | source "kernel/Kconfig.freezer" | |
75 | ||
76 | menu "ARC Architecture Configuration" | |
77 | ||
78 | choice | |
79 | prompt "ARC Platform" | |
80 | default ARC_PLAT_FPGA_LEGACY | |
81 | ||
82 | config ARC_PLAT_FPGA_LEGACY | |
83 | bool "\"Legacy\" ARC FPGA dev platform" | |
84 | help | |
85 | Support for ARC development platforms, provided by Synopsys. | |
86 | These are based on FPGA or ISS. e.g. | |
87 | - ARCAngel4 | |
88 | - ML509 | |
89 | - MetaWare ISS | |
90 | ||
91 | #New platform adds here | |
92 | endchoice | |
93 | ||
94 | menu "ARC CPU Configuration" | |
95 | ||
96 | choice | |
97 | prompt "ARC Core" | |
98 | default ARC_CPU_770 | |
99 | ||
100 | config ARC_CPU_750D | |
101 | bool "ARC750D" | |
102 | help | |
103 | Support for ARC750 core | |
104 | ||
105 | config ARC_CPU_770 | |
106 | bool "ARC770" | |
107 | select ARC_CPU_REL_4_10 | |
108 | help | |
109 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
110 | This core has a bunch of cool new features: | |
111 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
112 | Shared Address Spaces (for sharing TLB entires in MMU) | |
113 | -Caches: New Prog Model, Region Flush | |
114 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
115 | ||
116 | endchoice | |
117 | ||
118 | config CPU_BIG_ENDIAN | |
119 | bool "Enable Big Endian Mode" | |
120 | default n | |
121 | help | |
122 | Build kernel for Big Endian Mode of ARC CPU | |
123 | ||
41195d23 VG |
124 | config SMP |
125 | bool "Symmetric Multi-Processing (Incomplete)" | |
126 | default n | |
127 | select USE_GENERIC_SMP_HELPERS | |
128 | help | |
129 | This enables support for systems with more than one CPU. If you have | |
130 | a system with only one CPU, like most personal computers, say N. If | |
131 | you have a system with more than one CPU, say Y. | |
132 | ||
133 | if SMP | |
134 | ||
135 | config ARC_HAS_COH_CACHES | |
136 | def_bool n | |
137 | ||
138 | config ARC_HAS_COH_LLSC | |
139 | def_bool n | |
140 | ||
141 | config ARC_HAS_COH_RTSC | |
142 | def_bool n | |
143 | ||
144 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
145 | def_bool n | |
146 | ||
147 | endif | |
148 | ||
149 | config NR_CPUS | |
150 | int "Maximum number of CPUs (2-32)" | |
151 | range 2 32 | |
152 | depends on SMP | |
153 | default "2" | |
154 | ||
cfdbc2e1 VG |
155 | menuconfig ARC_CACHE |
156 | bool "Enable Cache Support" | |
157 | default y | |
41195d23 VG |
158 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
159 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
160 | |
161 | if ARC_CACHE | |
162 | ||
163 | config ARC_CACHE_LINE_SHIFT | |
164 | int "Cache Line Length (as power of 2)" | |
165 | range 5 7 | |
166 | default "6" | |
167 | help | |
168 | Starting with ARC700 4.9, Cache line length is configurable, | |
169 | This option specifies "N", with Line-len = 2 power N | |
170 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
171 | Linux only supports same line lengths for I and D caches. | |
172 | ||
173 | config ARC_HAS_ICACHE | |
174 | bool "Use Instruction Cache" | |
175 | default y | |
176 | ||
177 | config ARC_HAS_DCACHE | |
178 | bool "Use Data Cache" | |
179 | default y | |
180 | ||
181 | config ARC_CACHE_PAGES | |
182 | bool "Per Page Cache Control" | |
183 | default y | |
184 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
185 | help | |
186 | This can be used to over-ride the global I/D Cache Enable on a | |
187 | per-page basis (but only for pages accessed via MMU such as | |
188 | Kernel Virtual address or User Virtual Address) | |
189 | TLB entries have a per-page Cache Enable Bit. | |
190 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
191 | Global DISABLE + Per Page ENABLE won't work | |
192 | ||
193 | endif #ARC_CACHE | |
194 | ||
195 | config ARC_HAS_HW_MPY | |
196 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
197 | default y | |
198 | help | |
199 | Influences how gcc generates code for MPY operations. | |
200 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
201 | Multipler. Otherwise software multipy lib is used | |
202 | ||
203 | choice | |
204 | prompt "ARC700 MMU Version" | |
205 | default ARC_MMU_V3 if ARC_CPU_770 | |
206 | default ARC_MMU_V2 if ARC_CPU_750D | |
207 | ||
208 | config ARC_MMU_V1 | |
209 | bool "MMU v1" | |
210 | help | |
211 | Orig ARC700 MMU | |
212 | ||
213 | config ARC_MMU_V2 | |
214 | bool "MMU v2" | |
215 | help | |
216 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
217 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
218 | ||
219 | config ARC_MMU_V3 | |
220 | bool "MMU v3" | |
221 | depends on ARC_CPU_770 | |
222 | help | |
223 | Introduced with ARC700 4.10: New Features | |
224 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
225 | Shared Address Spaces (SASID) | |
226 | ||
227 | endchoice | |
228 | ||
229 | ||
230 | choice | |
231 | prompt "MMU Page Size" | |
232 | default ARC_PAGE_SIZE_8K | |
233 | ||
234 | config ARC_PAGE_SIZE_8K | |
235 | bool "8KB" | |
236 | help | |
237 | Choose between 8k vs 16k | |
238 | ||
239 | config ARC_PAGE_SIZE_16K | |
240 | bool "16KB" | |
241 | depends on ARC_MMU_V3 | |
242 | ||
243 | config ARC_PAGE_SIZE_4K | |
244 | bool "4KB" | |
245 | depends on ARC_MMU_V3 | |
246 | ||
247 | endchoice | |
248 | ||
4788a594 VG |
249 | config ARC_COMPACT_IRQ_LEVELS |
250 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
251 | default n | |
252 | # Timer HAS to be high priority, for any other high priority config | |
253 | select ARC_IRQ3_LV2 | |
41195d23 VG |
254 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
255 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
256 | |
257 | if ARC_COMPACT_IRQ_LEVELS | |
258 | ||
259 | config ARC_IRQ3_LV2 | |
260 | bool | |
261 | ||
262 | config ARC_IRQ5_LV2 | |
263 | bool | |
264 | ||
265 | config ARC_IRQ6_LV2 | |
266 | bool | |
267 | ||
268 | endif | |
269 | ||
cfdbc2e1 VG |
270 | config ARC_FPU_SAVE_RESTORE |
271 | bool "Enable FPU state persistence across context switch" | |
272 | default n | |
273 | help | |
274 | Double Precision Floating Point unit had dedictaed regs which | |
275 | need to be saved/restored across context-switch. | |
276 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
277 | hardware pieces to allow software to conditionally save/restore, | |
278 | based on actual usage of FPU by a task. Thus our implemn does | |
279 | this for all tasks in system. | |
280 | ||
281 | menuconfig ARC_CPU_REL_4_10 | |
282 | bool "Enable support for Rel 4.10 features" | |
283 | default n | |
284 | help | |
285 | -ARC770 (and dependent features) enabled | |
286 | -ARC750 also shares some of the new features with 770 | |
287 | ||
288 | config ARC_HAS_LLSC | |
289 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
290 | default y | |
291 | depends on ARC_CPU_770 | |
292 | # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics | |
293 | depends on !SMP || ARC_HAS_COH_LLSC | |
294 | ||
295 | config ARC_HAS_SWAPE | |
296 | bool "Insn: SWAPE (endian-swap)" | |
297 | default y | |
298 | depends on ARC_CPU_REL_4_10 | |
299 | ||
300 | config ARC_HAS_RTSC | |
301 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
302 | default y | |
303 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
304 | # if SMP, enable RTSC only if counter is coherent across cores |
305 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
306 | |
307 | endmenu # "ARC CPU Configuration" | |
308 | ||
309 | menu "Platform Board Configuration" | |
310 | ||
311 | source "arch/arc/plat-arcfpga/Kconfig" | |
312 | ||
313 | #New platform adds here | |
314 | ||
cfdbc2e1 VG |
315 | config LINUX_LINK_BASE |
316 | hex "Linux Link Address" | |
317 | default "0x80000000" | |
318 | help | |
319 | ARC700 divides the 32 bit phy address space into two equal halves | |
320 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
321 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
322 | Typically Linux kernel is linked at the start of untransalted addr, | |
323 | hence the default value of 0x8zs. | |
324 | However some customers have peripherals mapped at this addr, so | |
325 | Linux needs to be scooted a bit. | |
326 | If you don't know what the above means, leave this setting alone. | |
327 | ||
cfdbc2e1 VG |
328 | endmenu # "Platform Board Configuration" |
329 | ||
080c3747 VG |
330 | config ARC_CURR_IN_REG |
331 | bool "Dedicate Register r25 for current_task pointer" | |
332 | default y | |
333 | help | |
334 | This reserved Register R25 to point to Current Task in | |
335 | kernel mode. This saves memory access for each such access | |
336 | ||
cfdbc2e1 VG |
337 | config ARC_STACK_NONEXEC |
338 | bool "Make stack non-executable" | |
339 | default n | |
340 | help | |
341 | To disable the execute permissions of stack/heap of processes | |
342 | which are enabled by default. | |
343 | ||
344 | config HZ | |
345 | int "Timer Frequency" | |
346 | default 100 | |
347 | ||
348 | menuconfig ARC_DBG | |
349 | bool "ARC debugging" | |
350 | default y | |
351 | ||
854a0d95 VG |
352 | config ARC_DW2_UNWIND |
353 | bool "Enable DWARF specific kernel stack unwind" | |
354 | depends on ARC_DBG | |
355 | default y | |
356 | select KALLSYMS | |
357 | help | |
358 | Compiles the kernel with DWARF unwind information and can be used | |
359 | to get stack backtraces. | |
360 | ||
361 | If you say Y here the resulting kernel image will be slightly larger | |
362 | but not slower, and it will give very useful debugging information. | |
363 | If you don't debug the kernel, you can say N, but we may not be able | |
364 | to solve problems without frame unwind information | |
365 | ||
cfdbc2e1 VG |
366 | config ARC_DBG_TLB_PARANOIA |
367 | bool "Paranoia Checks in Low Level TLB Handlers" | |
41195d23 | 368 | depends on ARC_DBG && !SMP |
cfdbc2e1 VG |
369 | default n |
370 | ||
371 | config ARC_DBG_TLB_MISS_COUNT | |
372 | bool "Profile TLB Misses" | |
373 | default n | |
374 | select DEBUG_FS | |
375 | depends on ARC_DBG | |
376 | help | |
377 | Counts number of I and D TLB Misses and exports them via Debugfs | |
378 | The counters can be cleared via Debugfs as well | |
379 | ||
380 | config CMDLINE | |
381 | string "Kernel command line to built-in" | |
382 | default "print-fatal-signals=1" | |
383 | help | |
384 | The default command line which will be appended to the optional | |
385 | u-boot provided command line (see below) | |
386 | ||
387 | config CMDLINE_UBOOT | |
388 | bool "Support U-boot kernel command line passing" | |
389 | default n | |
390 | help | |
391 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
392 | command line from the U-boot environment to the Linux kernel then | |
393 | switch this option on. | |
394 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
395 | to it. kernel startup code will copy the string into cmdline buffer | |
396 | and also append CONFIG_CMDLINE. | |
397 | ||
999159a5 VG |
398 | config ARC_BUILTIN_DTB_NAME |
399 | string "Built in DTB" | |
400 | help | |
401 | Set the name of the DTB to embed in the vmlinux binary | |
402 | Leaving it blank selects the minimal "skeleton" dtb | |
403 | ||
cfdbc2e1 VG |
404 | source "kernel/Kconfig.preempt" |
405 | ||
406 | endmenu # "ARC Architecture Configuration" | |
407 | ||
408 | source "mm/Kconfig" | |
409 | source "net/Kconfig" | |
410 | source "drivers/Kconfig" | |
411 | source "fs/Kconfig" | |
412 | source "arch/arc/Kconfig.debug" | |
413 | source "security/Kconfig" | |
414 | source "crypto/Kconfig" | |
415 | source "lib/Kconfig" |