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Merge tag 'ntb-4.13-bugfixes' of git://github.com/jonmason/ntb
[mirror_ubuntu-artful-kernel.git] / arch / arc / boot / dts / axc003_idu.dtsi
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1/*
2 * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
11 */
12
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13/include/ "skeleton_hs_idu.dtsi"
14
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15/ {
16 compatible = "snps,arc";
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17 #address-cells = <2>;
18 #size-cells = <2>;
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19
20 cpu_card {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
f862b315 25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
5fa2daaa 26
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27 core_clk: core_clk {
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
776d7f16 30 clock-frequency = <100000000>;
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31 };
32
9ba7648c 33 core_intc: archs-intc@cpu {
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34 compatible = "snps,archs-intc";
35 interrupt-controller;
36 #interrupt-cells = <1>;
37 };
38
39 idu_intc: idu-interrupt-controller {
40 compatible = "snps,archs-idu-intc";
41 interrupt-controller;
9ba7648c 42 interrupt-parent = <&core_intc>;
ec69b269 43 #interrupt-cells = <1>;
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44 };
45
46 /*
47 * this GPIO block ORs all interrupts on CPU card (creg,..)
48 * to uplink only 1 IRQ to ARC core intc
49 */
50 dw-apb-gpio@0x2000 {
51 compatible = "snps,dw-apb-gpio";
52 reg = < 0x2000 0x80 >;
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 ictl_intc: gpio-controller@0 {
57 compatible = "snps,dw-apb-gpio-port";
58 gpio-controller;
59 #gpio-cells = <2>;
60 snps,nr-gpios = <30>;
61 reg = <0>;
62 interrupt-controller;
63 #interrupt-cells = <2>;
64 interrupt-parent = <&idu_intc>;
ec69b269 65 interrupts = <1>;
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66 };
67 };
68
69 debug_uart: dw-apb-uart@0x5000 {
70 compatible = "snps,dw-apb-uart";
71 reg = <0x5000 0x100>;
72 clock-frequency = <33333000>;
73 interrupt-parent = <&ictl_intc>;
74 interrupts = <2 4>;
75 baud = <115200>;
76 reg-shift = <2>;
77 reg-io-width = <4>;
78 };
79
80 arcpct0: pct {
81 compatible = "snps,archs-pct";
82 #interrupt-cells = <1>;
9ba7648c 83 interrupt-parent = <&core_intc>;
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84 interrupts = <20>;
85 };
86 };
87
88 /*
89 * This INTC is actually connected to DW APB GPIO
90 * which acts as a wire between MB INTC and CPU INTC.
91 * GPIO INTC is configured in platform init code
92 * and here we mimic direct connection from MB INTC to
93 * CPU INTC, thus we set "interrupts = <0 1>" instead of
94 * "interrupts = <12>"
95 *
96 * This intc actually resides on MB, but we move it here to
97 * avoid duplicating the MB dtsi file given that IRQ from
98 * this intc to cpu intc are different for axs101 and axs103
99 */
100 mb_intc: dw-apb-ictl@0xe0012000 {
101 #interrupt-cells = <1>;
102 compatible = "snps,dw-apb-ictl";
f862b315 103 reg = < 0x0 0xe0012000 0x0 0x200 >;
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104 interrupt-controller;
105 interrupt-parent = <&idu_intc>;
ec69b269 106 interrupts = <0>;
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107 };
108
109 memory {
5fa2daaa 110 device_type = "memory";
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111 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
112 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
113 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
5fa2daaa 114 };
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115
116 reserved-memory {
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117 #address-cells = <2>;
118 #size-cells = <2>;
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119 ranges;
120 /*
121 * Move frame buffer out of IOC aperture (0x8z-0xAz).
122 */
123 frame_buffer: frame_buffer@be000000 {
124 compatible = "shared-dma-pool";
f862b315 125 reg = <0x0 0xbe000000 0x0 0x2000000>;
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126 no-map;
127 };
128 };
5fa2daaa 129};