[mirror_ubuntu-hirsute-kernel.git] / arch / arc / kernel / setup.c

/*
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/seq_file.h>
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/root_dev.h>
#include <linux/console.h>
#include <linux/module.h>
#include <linux/cpu.h>
#include <linux/clk-provider.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
#include <linux/cache.h>
#include <asm/sections.h>
#include <asm/arcregs.h>
#include <asm/tlb.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/irq.h>
#include <asm/unwind.h>
#include <asm/clk.h>
#include <asm/mach_desc.h>
#include <asm/smp.h>

#define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))

/* Part of U-boot ABI: see head.S */
int __initdata uboot_tag;
char __initdata *uboot_arg;

const struct machine_desc *machine_desc;

struct task_struct *_current_task[NR_CPUS];	/* For stack switching */

struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];

static void read_arc_build_cfg_regs(void)
{
	struct bcr_perip uncached_space;
	struct bcr_generic bcr;
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	FIX_PTR(cpu);

	READ_BCR(AUX_IDENTITY, cpu->core);
	READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);

	READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);

	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
	cpu->uncached_base = uncached_space.start << 24;

	READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);

	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */

	/* Note that we read the CCM BCRs independent of kernel config
	 * This is to catch the cases where user doesn't know that
	 * CCMs are present in hardware build
	 */
	{
		struct bcr_iccm iccm;
		struct bcr_dccm dccm;
		struct bcr_dccm_base dccm_base;
		unsigned int bcr_32bit_val;

		bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
		if (bcr_32bit_val) {
			iccm = *((struct bcr_iccm *)&bcr_32bit_val);
			cpu->iccm.base_addr = iccm.base << 16;
			cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
		}

		bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
		if (bcr_32bit_val) {
			dccm = *((struct bcr_dccm *)&bcr_32bit_val);
			cpu->dccm.sz = 0x800 << (dccm.sz);

			READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
			cpu->dccm.base_addr = dccm_base.addr << 8;
		}
	}

	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);

	read_decode_mmu_bcr();
	read_decode_cache_bcr();

	{
		struct bcr_fp_arcompact sp, dp;
		struct bcr_bpu_arcompact bpu;

		READ_BCR(ARC_REG_FP_BCR, sp);
		READ_BCR(ARC_REG_DPFP_BCR, dp);
		cpu->extn.fpu_sp = sp.ver ? 1 : 0;
		cpu->extn.fpu_dp = dp.ver ? 1 : 0;

		READ_BCR(ARC_REG_BPU_BCR, bpu);
		cpu->bpu.ver = bpu.ver;
		cpu->bpu.full = bpu.fam ? 1 : 0;
		if (bpu.ent) {
			cpu->bpu.num_cache = 256 << (bpu.ent - 1);
			cpu->bpu.num_pred = 256 << (bpu.ent - 1);
		}
	}

	READ_BCR(ARC_REG_AP_BCR, bcr);
	cpu->extn.ap = bcr.ver ? 1 : 0;

	READ_BCR(ARC_REG_SMART_BCR, bcr);
	cpu->extn.smart = bcr.ver ? 1 : 0;

	READ_BCR(ARC_REG_RTT_BCR, bcr);
	cpu->extn.rtt = bcr.ver ? 1 : 0;

	cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
}

static const struct cpuinfo_data arc_cpu_tbl[] = {
	{ {0x20, "ARC 600"      }, 0x2F},
	{ {0x30, "ARC 700"      }, 0x33},
	{ {0x34, "ARC 700 R4.10"}, 0x34},
	{ {0x35, "ARC 700 R4.11"}, 0x35},
	{ {0x00, NULL		} }
};

#define IS_AVAIL1(v, str)	((v) ? str : "")
#define IS_USED(cfg)		(IS_ENABLED(cfg) ? "" : "(not used) ")
#define IS_AVAIL2(v, str, cfg)  IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))

static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
{
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	struct bcr_identity *core = &cpu->core;
	const struct cpuinfo_data *tbl;
	char *isa_nm;
	int i, be, atomic;
	int n = 0;

	FIX_PTR(cpu);

	{
		isa_nm = "ARCompact";
		be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);

		atomic = cpu->isa.atomic1;
		if (!cpu->isa.ver)	/* ISA BCR absent, use Kconfig info */
			atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
	}

	n += scnprintf(buf + n, len - n,
		       "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
		       core->family, core->cpu_id, core->chip_id);

	for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
		if ((core->family >= tbl->info.id) &&
		    (core->family <= tbl->up_range)) {
			n += scnprintf(buf + n, len - n,
				       "processor [%d]\t: %s (%s ISA) %s\n",
				       cpu_id, tbl->info.str, isa_nm,
				       IS_AVAIL1(be, "[Big-Endian]"));
			break;
		}
	}

	if (tbl->info.id == 0)
		n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");

	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
		       (unsigned int)(arc_get_core_freq() / 1000000),
		       (unsigned int)(arc_get_core_freq() / 10000) % 100);

	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s\nISA Extn\t: ",
		       IS_AVAIL1(cpu->timers.t0, "Timer0 "),
		       IS_AVAIL1(cpu->timers.t1, "Timer1 "));

	n += i = scnprintf(buf + n, len - n, "%s%s",
			   IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));

	if (i)
		n += scnprintf(buf + n, len - n, "\n\t\t: ");

	n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
		       IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
		       IS_AVAIL1(cpu->extn.norm, "norm "),
		       IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
		       IS_AVAIL1(cpu->extn.swap, "swap "),
		       IS_AVAIL1(cpu->extn.minmax, "minmax "),
		       IS_AVAIL1(cpu->extn.crc, "crc "),
		       IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));

	if (cpu->bpu.ver)
		n += scnprintf(buf + n, len - n,
			      "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
			      IS_AVAIL1(cpu->bpu.full, "full"),
			      IS_AVAIL1(!cpu->bpu.full, "partial"),
			      cpu->bpu.num_cache, cpu->bpu.num_pred);

	return buf;
}

static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
{
	int n = 0;
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];

	FIX_PTR(cpu);

	n += scnprintf(buf + n, len - n,
		       "Vector Table\t: %#x\nUncached Base\t: %#x\n",
		       cpu->vec_base, cpu->uncached_base);

	if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
		n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
			       IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
			       IS_AVAIL1(cpu->extn.fpu_dp, "DP "));

	if (cpu->extn.debug)
		n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
			       IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
			       IS_AVAIL1(cpu->extn.smart, "smaRT "),
			       IS_AVAIL1(cpu->extn.rtt, "RTT "));

	if (cpu->dccm.sz || cpu->iccm.sz)
		n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
			       cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
			       cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));

	n += scnprintf(buf + n, len - n,
		       "OS ABI [v3]\t: no-legacy-syscalls\n");

	return buf;
}

static void arc_chk_core_config(void)
{
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	int fpu_enabled;

	if (!cpu->timers.t0)
		panic("Timer0 is not present!\n");

	if (!cpu->timers.t1)
		panic("Timer1 is not present!\n");

#ifdef CONFIG_ARC_HAS_DCCM
	/*
	 * DCCM can be arbit placed in hardware.
	 * Make sure it's placement/sz matches what Linux is built with
	 */
	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
		panic("Linux built with incorrect DCCM Base address\n");

	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
		panic("Linux built with incorrect DCCM Size\n");
#endif

#ifdef CONFIG_ARC_HAS_ICCM
	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
		panic("Linux built with incorrect ICCM Size\n");
#endif

	/*
	 * FP hardware/software config sanity
	 * -If hardware contains DPFP, kernel needs to save/restore FPU state
	 * -If not, it will crash trying to save/restore the non-existant regs
	 *
	 * (only DPDP checked since SP has no arch visible regs)
	 */
	fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);

	if (cpu->extn.fpu_dp && !fpu_enabled)
		pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
	else if (!cpu->extn.fpu_dp && fpu_enabled)
		panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
}

/*
 * Initialize and setup the processor core
 * This is called by all the CPUs thus should not do special case stuff
 *    such as only for boot CPU etc
 */

void setup_processor(void)
{
	char str[512];
	int cpu_id = smp_processor_id();

	read_arc_build_cfg_regs();
	arc_init_IRQ();

	printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));

	arc_mmu_init();
	arc_cache_init();

	printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
	printk(arc_platform_smp_cpuinfo());

	arc_chk_core_config();
}

static inline int is_kernel(unsigned long addr)
{
	if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
		return 1;
	return 0;
}

void __init setup_arch(char **cmdline_p)
{
#ifdef CONFIG_ARC_UBOOT_SUPPORT
	/* make sure that uboot passed pointer to cmdline/dtb is valid */
	if (uboot_tag && is_kernel((unsigned long)uboot_arg))
		panic("Invalid uboot arg\n");

	/* See if u-boot passed an external Device Tree blob */
	machine_desc = setup_machine_fdt(uboot_arg);	/* uboot_tag == 2 */
	if (!machine_desc)
#endif
	{
		/* No, so try the embedded one */
		machine_desc = setup_machine_fdt(__dtb_start);
		if (!machine_desc)
			panic("Embedded DT invalid\n");

		/*
		 * If we are here, it is established that @uboot_arg didn't
		 * point to DT blob. Instead if u-boot says it is cmdline,
		 * Appent to embedded DT cmdline.
		 * setup_machine_fdt() would have populated @boot_command_line
		 */
		if (uboot_tag == 1) {
			/* Ensure a whitespace between the 2 cmdlines */
			strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
			strlcat(boot_command_line, uboot_arg,
				COMMAND_LINE_SIZE);
		}
	}

	/* Save unparsed command line copy for /proc/cmdline */
	*cmdline_p = boot_command_line;

	/* To force early parsing of things like mem=xxx */
	parse_early_param();

	/* Platform/board specific: e.g. early console registration */
	if (machine_desc->init_early)
		machine_desc->init_early();

	setup_processor();
	smp_init_cpus();
	setup_arch_memory();

	/* copy flat DT out of .init and then unflatten it */
	unflatten_and_copy_device_tree();

	/* Can be issue if someone passes cmd line arg "ro"
	 * But that is unlikely so keeping it as it is
	 */
	root_mountflags &= ~MS_RDONLY;

#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif

	arc_unwind_init();
	arc_unwind_setup();
}

static int __init customize_machine(void)
{
	of_clk_init(NULL);
	/*
	 * Traverses flattened DeviceTree - registering platform devices
	 * (if any) complete with their resources
	 */
	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

	if (machine_desc->init_machine)
		machine_desc->init_machine();

	return 0;
}
arch_initcall(customize_machine);

static int __init init_late_machine(void)
{
	if (machine_desc->init_late)
		machine_desc->init_late();

	return 0;
}
late_initcall(init_late_machine);
/*
 *  Get CPU information for use by the procfs.
 */

#define cpu_to_ptr(c)	((void *)(0xFFFF0000 | (unsigned int)(c)))
#define ptr_to_cpu(p)	(~0xFFFF0000UL & (unsigned int)(p))

static int show_cpuinfo(struct seq_file *m, void *v)
{
	char *str;
	int cpu_id = ptr_to_cpu(v);

	if (!cpu_online(cpu_id)) {
		seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
		goto done;
	}

	str = (char *)__get_free_page(GFP_TEMPORARY);
	if (!str)
		goto done;

	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));

	seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
		   loops_per_jiffy / (500000 / HZ),
		   (loops_per_jiffy / (5000 / HZ)) % 100);

	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
	seq_printf(m, arc_platform_smp_cpuinfo());

	free_page((unsigned long)str);
done:
	seq_printf(m, "\n");

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	/*
	 * Callback returns cpu-id to iterator for show routine, NULL to stop.
	 * However since NULL is also a valid cpu-id (0), we use a round-about
	 * way to pass it w/o having to kmalloc/free a 2 byte string.
	 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
	 */
	return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo
};

static DEFINE_PER_CPU(struct cpu, cpu_topology);

static int __init topology_init(void)
{
	int cpu;

	for_each_present_cpu(cpu)
	    register_cpu(&per_cpu(cpu_topology, cpu), cpu);

	return 0;
}

subsys_initcall(topology_init);
Commit	Line	Data
c121c506 VG	1	/*
	2	* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	#include <linux/seq_file.h>
	10	#include <linux/fs.h>
	11	#include <linux/delay.h>
	12	#include <linux/root_dev.h>
	13	#include <linux/console.h>
	14	#include <linux/module.h>
	15	#include <linux/cpu.h>
d7f8a085	16	#include <linux/clk-provider.h>
999159a5	17	#include <linux/of_fdt.h>
d7f8a085	18	#include <linux/of_platform.h>
1ec9db10	19	#include <linux/cache.h>
999159a5	20	#include <asm/sections.h>
c121c506 VG	21	#include <asm/arcregs.h>
c121c506 VG	22	#include <asm/tlb.h>
c121c506 VG	23	#include <asm/setup.h>
	24	#include <asm/page.h>
	25	#include <asm/irq.h>
854a0d95	26	#include <asm/unwind.h>
af617428	27	#include <asm/clk.h>
03a6d28c	28	#include <asm/mach_desc.h>
619f3018	29	#include <asm/smp.h>
c121c506 VG	30
	31	#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
	32
59ed9413 VG	33	/* Part of U-boot ABI: see head.S */
	34	int __initdata uboot_tag;
	35	char __initdata *uboot_arg;
	36
880beb88	37	const struct machine_desc *machine_desc;
c121c506 VG	38
	39	struct task_struct _current_task[NR_CPUS]; / For stack switching */
	40
	41	struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
	42
8e457d6a	43	static void read_arc_build_cfg_regs(void)
c121c506	44	{
af617428	45	struct bcr_perip uncached_space;
56372082	46	struct bcr_generic bcr;
af617428 VG	47	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	48	FIX_PTR(cpu);
	49
	50	READ_BCR(AUX_IDENTITY, cpu->core);
56372082	51	READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
af617428	52
56372082	53	READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
af617428	54	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
af617428 VG	55
	56	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
	57	cpu->uncached_base = uncached_space.start << 24;
	58
56372082	59	READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
af617428	60
56372082 VG	61	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
	62	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
	63	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
	64	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
	65	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
af617428	66
8b5850f8 VG	67	/* Note that we read the CCM BCRs independent of kernel config
	68	* This is to catch the cases where user doesn't know that
	69	* CCMs are present in hardware build
	70	*/
	71	{
	72	struct bcr_iccm iccm;
	73	struct bcr_dccm dccm;
	74	struct bcr_dccm_base dccm_base;
	75	unsigned int bcr_32bit_val;
	76
	77	bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
	78	if (bcr_32bit_val) {
	79	iccm = ((struct bcr_iccm )&bcr_32bit_val);
	80	cpu->iccm.base_addr = iccm.base << 16;
	81	cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
	82	}
	83
	84	bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
	85	if (bcr_32bit_val) {
	86	dccm = ((struct bcr_dccm )&bcr_32bit_val);
	87	cpu->dccm.sz = 0x800 << (dccm.sz);
	88
	89	READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
	90	cpu->dccm.base_addr = dccm_base.addr << 8;
	91	}
	92	}
	93
af617428 VG	94	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
af617428 VG	95
c121c506 VG	96	read_decode_mmu_bcr();
c121c506 VG	97	read_decode_cache_bcr();
af617428	98
56372082 VG	99	{
	100	struct bcr_fp_arcompact sp, dp;
	101	struct bcr_bpu_arcompact bpu;
	102
	103	READ_BCR(ARC_REG_FP_BCR, sp);
	104	READ_BCR(ARC_REG_DPFP_BCR, dp);
	105	cpu->extn.fpu_sp = sp.ver ? 1 : 0;
	106	cpu->extn.fpu_dp = dp.ver ? 1 : 0;
	107
	108	READ_BCR(ARC_REG_BPU_BCR, bpu);
	109	cpu->bpu.ver = bpu.ver;
	110	cpu->bpu.full = bpu.fam ? 1 : 0;
	111	if (bpu.ent) {
	112	cpu->bpu.num_cache = 256 << (bpu.ent - 1);
	113	cpu->bpu.num_pred = 256 << (bpu.ent - 1);
	114	}
	115	}
	116
	117	READ_BCR(ARC_REG_AP_BCR, bcr);
	118	cpu->extn.ap = bcr.ver ? 1 : 0;
	119
	120	READ_BCR(ARC_REG_SMART_BCR, bcr);
	121	cpu->extn.smart = bcr.ver ? 1 : 0;
	122
a44ec8bd VG	123	READ_BCR(ARC_REG_RTT_BCR, bcr);
	124	cpu->extn.rtt = bcr.ver ? 1 : 0;
	125
	126	cpu->extn.debug = cpu->extn.ap \| cpu->extn.smart \| cpu->extn.rtt;
af617428 VG	127	}
	128
	129	static const struct cpuinfo_data arc_cpu_tbl[] = {
af617428 VG	130	{ {0x20, "ARC 600" }, 0x2F},
	131	{ {0x30, "ARC 700" }, 0x33},
	132	{ {0x34, "ARC 700 R4.10"}, 0x34},
56372082	133	{ {0x35, "ARC 700 R4.11"}, 0x35},
af617428 VG	134	{ {0x00, NULL } }
	135	};
	136
56372082 VG	137	#define IS_AVAIL1(v, str) ((v) ? str : "")
	138	#define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
	139	#define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
	140
8e457d6a	141	static char arc_cpu_mumbojumbo(int cpu_id, char buf, int len)
af617428	142	{
af617428 VG	143	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	144	struct bcr_identity *core = &cpu->core;
	145	const struct cpuinfo_data *tbl;
56372082 VG	146	char *isa_nm;
	147	int i, be, atomic;
	148	int n = 0;
	149
af617428 VG	150	FIX_PTR(cpu);
af617428 VG	151
56372082 VG	152	{
	153	isa_nm = "ARCompact";
	154	be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
	155
	156	atomic = cpu->isa.atomic1;
	157	if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
	158	atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
	159	}
	160
af617428	161	n += scnprintf(buf + n, len - n,
56372082 VG	162	"\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
56372082 VG	163	core->family, core->cpu_id, core->chip_id);
af617428 VG	164
	165	for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
	166	if ((core->family >= tbl->info.id) &&
	167	(core->family <= tbl->up_range)) {
	168	n += scnprintf(buf + n, len - n,
56372082 VG	169	"processor [%d]\t: %s (%s ISA) %s\n",
	170	cpu_id, tbl->info.str, isa_nm,
	171	IS_AVAIL1(be, "[Big-Endian]"));
af617428 VG	172	break;
	173	}
	174	}
	175
	176	if (tbl->info.id == 0)
	177	n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
	178
	179	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
	180	(unsigned int)(arc_get_core_freq() / 1000000),
	181	(unsigned int)(arc_get_core_freq() / 10000) % 100);
	182
565a9b49	183	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s\nISA Extn\t: ",
56372082	184	IS_AVAIL1(cpu->timers.t0, "Timer0 "),
565a9b49	185	IS_AVAIL1(cpu->timers.t1, "Timer1 "));
af617428	186
56372082 VG	187	n += i = scnprintf(buf + n, len - n, "%s%s",
56372082 VG	188	IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
af617428	189
56372082 VG	190	if (i)
56372082 VG	191	n += scnprintf(buf + n, len - n, "\n\t\t: ");
af617428	192
56372082 VG	193	n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
	194	IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
	195	IS_AVAIL1(cpu->extn.norm, "norm "),
	196	IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
	197	IS_AVAIL1(cpu->extn.swap, "swap "),
	198	IS_AVAIL1(cpu->extn.minmax, "minmax "),
	199	IS_AVAIL1(cpu->extn.crc, "crc "),
	200	IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
af617428	201
56372082 VG	202	if (cpu->bpu.ver)
	203	n += scnprintf(buf + n, len - n,
	204	"BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
	205	IS_AVAIL1(cpu->bpu.full, "full"),
	206	IS_AVAIL1(!cpu->bpu.full, "partial"),
	207	cpu->bpu.num_cache, cpu->bpu.num_pred);
af617428	208
56372082 VG	209	return buf;
56372082 VG	210	}
af617428	211
8e457d6a	212	static char arc_extn_mumbojumbo(int cpu_id, char buf, int len)
af617428 VG	213	{
	214	int n = 0;
	215	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	216
	217	FIX_PTR(cpu);
af617428 VG	218
af617428 VG	219	n += scnprintf(buf + n, len - n,
56372082 VG	220	"Vector Table\t: %#x\nUncached Base\t: %#x\n",
	221	cpu->vec_base, cpu->uncached_base);
	222
	223	if (cpu->extn.fpu_sp \|\| cpu->extn.fpu_dp)
	224	n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
	225	IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
	226	IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
	227
	228	if (cpu->extn.debug)
	229	n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
	230	IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
	231	IS_AVAIL1(cpu->extn.smart, "smaRT "),
	232	IS_AVAIL1(cpu->extn.rtt, "RTT "));
	233
	234	if (cpu->dccm.sz \|\| cpu->iccm.sz)
	235	n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
	236	cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
af617428 VG	237	cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
af617428 VG	238
af617428	239	n += scnprintf(buf + n, len - n,
8ff14bbc	240	"OS ABI [v3]\t: no-legacy-syscalls\n");
af617428 VG	241
	242	return buf;
	243	}
	244
c4b9856b	245	static void arc_chk_core_config(void)
8b5850f8	246	{
8b5850f8	247	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
c4b9856b	248	int fpu_enabled;
8b5850f8	249
56372082 VG	250	if (!cpu->timers.t0)
	251	panic("Timer0 is not present!\n");
	252
	253	if (!cpu->timers.t1)
	254	panic("Timer1 is not present!\n");
	255
8b5850f8 VG	256	#ifdef CONFIG_ARC_HAS_DCCM
	257	/*
	258	* DCCM can be arbit placed in hardware.
	259	* Make sure it's placement/sz matches what Linux is built with
	260	*/
	261	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
	262	panic("Linux built with incorrect DCCM Base address\n");
	263
	264	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
	265	panic("Linux built with incorrect DCCM Size\n");
	266	#endif
	267
	268	#ifdef CONFIG_ARC_HAS_ICCM
	269	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
	270	panic("Linux built with incorrect ICCM Size\n");
	271	#endif
8b5850f8	272
c4b9856b VG	273	/*
	274	* FP hardware/software config sanity
	275	* -If hardware contains DPFP, kernel needs to save/restore FPU state
	276	* -If not, it will crash trying to save/restore the non-existant regs
	277	*
	278	* (only DPDP checked since SP has no arch visible regs)
	279	*/
	280	fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
af617428	281
56372082	282	if (cpu->extn.fpu_dp && !fpu_enabled)
c4b9856b	283	pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
56372082	284	else if (!cpu->extn.fpu_dp && fpu_enabled)
c4b9856b	285	panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
c121c506 VG	286	}
	287
	288	/*
	289	* Initialize and setup the processor core
	290	* This is called by all the CPUs thus should not do special case stuff
	291	* such as only for boot CPU etc
	292	*/
	293
ce759956	294	void setup_processor(void)
c121c506	295	{
af617428 VG	296	char str[512];
	297	int cpu_id = smp_processor_id();
	298
c121c506 VG	299	read_arc_build_cfg_regs();
c121c506 VG	300	arc_init_IRQ();
af617428 VG	301
	302	printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
	303
c121c506 VG	304	arc_mmu_init();
c121c506 VG	305	arc_cache_init();
af617428 VG	306
af617428 VG	307	printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
af617428	308	printk(arc_platform_smp_cpuinfo());
af617428	309
c4b9856b	310	arc_chk_core_config();
c121c506 VG	311	}
c121c506 VG	312
59ed9413 VG	313	static inline int is_kernel(unsigned long addr)
	314	{
	315	if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
	316	return 1;
	317	return 0;
	318	}
	319
c121c506 VG	320	void __init setup_arch(char **cmdline_p)
c121c506 VG	321	{
036b2c56	322	#ifdef CONFIG_ARC_UBOOT_SUPPORT
e57d339a VG	323	/* make sure that uboot passed pointer to cmdline/dtb is valid */
	324	if (uboot_tag && is_kernel((unsigned long)uboot_arg))
	325	panic("Invalid uboot arg\n");
	326
	327	/* See if u-boot passed an external Device Tree blob */
	328	machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
036b2c56 VG	329	if (!machine_desc)
	330	#endif
	331	{
e57d339a	332	/* No, so try the embedded one */
59ed9413 VG	333	machine_desc = setup_machine_fdt(__dtb_start);
	334	if (!machine_desc)
	335	panic("Embedded DT invalid\n");
	336
	337	/*
e57d339a VG	338	* If we are here, it is established that @uboot_arg didn't
	339	* point to DT blob. Instead if u-boot says it is cmdline,
	340	* Appent to embedded DT cmdline.
59ed9413 VG	341	* setup_machine_fdt() would have populated @boot_command_line
	342	*/
	343	if (uboot_tag == 1) {
59ed9413 VG	344	/* Ensure a whitespace between the 2 cmdlines */
	345	strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
	346	strlcat(boot_command_line, uboot_arg,
	347	COMMAND_LINE_SIZE);
	348	}
e57d339a	349	}
c121c506 VG	350
c121c506 VG	351	/* Save unparsed command line copy for /proc/cmdline */
9593a933	352	*cmdline_p = boot_command_line;
999159a5	353
c121c506 VG	354	/* To force early parsing of things like mem=xxx */
	355	parse_early_param();
	356
	357	/* Platform/board specific: e.g. early console registration */
03a6d28c VG	358	if (machine_desc->init_early)
03a6d28c VG	359	machine_desc->init_early();
c121c506 VG	360
c121c506 VG	361	setup_processor();
41195d23	362	smp_init_cpus();
c121c506 VG	363	setup_arch_memory();
c121c506 VG	364
eab6a08c	365	/* copy flat DT out of .init and then unflatten it */
1efc959e	366	unflatten_and_copy_device_tree();
999159a5	367
c121c506 VG	368	/* Can be issue if someone passes cmd line arg "ro"
	369	* But that is unlikely so keeping it as it is
	370	*/
	371	root_mountflags &= ~MS_RDONLY;
	372
c121c506 VG	373	#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	374	conswitchp = &dummy_con;
	375	#endif
	376
854a0d95 VG	377	arc_unwind_init();
854a0d95 VG	378	arc_unwind_setup();
c121c506 VG	379	}
c121c506 VG	380
03a6d28c VG	381	static int __init customize_machine(void)
03a6d28c VG	382	{
d7f8a085 VG	383	of_clk_init(NULL);
	384	/*
	385	* Traverses flattened DeviceTree - registering platform devices
	386	* (if any) complete with their resources
	387	*/
	388	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	389
03a6d28c VG	390	if (machine_desc->init_machine)
	391	machine_desc->init_machine();
	392
	393	return 0;
	394	}
	395	arch_initcall(customize_machine);
	396
	397	static int __init init_late_machine(void)
	398	{
	399	if (machine_desc->init_late)
	400	machine_desc->init_late();
	401
	402	return 0;
	403	}
	404	late_initcall(init_late_machine);
c121c506 VG	405	/*
	406	* Get CPU information for use by the procfs.
	407	*/
	408
	409	#define cpu_to_ptr(c) ((void *)(0xFFFF0000 \| (unsigned int)(c)))
	410	#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
	411
	412	static int show_cpuinfo(struct seq_file m, void v)
	413	{
	414	char *str;
	415	int cpu_id = ptr_to_cpu(v);
	416
4c86231c VG	417	if (!cpu_online(cpu_id)) {
	418	seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
	419	goto done;
	420	}
	421
c121c506 VG	422	str = (char *)__get_free_page(GFP_TEMPORARY);
	423	if (!str)
	424	goto done;
	425
af617428	426	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
c121c506	427
56372082	428	seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
c121c506 VG	429	loops_per_jiffy / (500000 / HZ),
	430	(loops_per_jiffy / (5000 / HZ)) % 100);
	431
af617428	432	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
af617428	433	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
af617428	434	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
af617428	435	seq_printf(m, arc_platform_smp_cpuinfo());
af617428	436
c121c506 VG	437	free_page((unsigned long)str);
c121c506 VG	438	done:
4c86231c	439	seq_printf(m, "\n");
c121c506 VG	440
	441	return 0;
	442	}
	443
	444	static void c_start(struct seq_file m, loff_t *pos)
	445	{
	446	/*
	447	* Callback returns cpu-id to iterator for show routine, NULL to stop.
	448	* However since NULL is also a valid cpu-id (0), we use a round-about
	449	* way to pass it w/o having to kmalloc/free a 2 byte string.
	450	* Encode cpu-id as 0xFFcccc, which is decoded by show routine.
	451	*/
	452	return pos < num_possible_cpus() ? cpu_to_ptr(pos) : NULL;
	453	}
	454
	455	static void c_next(struct seq_file m, void v, loff_t pos)
	456	{
	457	++*pos;
	458	return c_start(m, pos);
	459	}
	460
	461	static void c_stop(struct seq_file m, void v)
	462	{
	463	}
	464
	465	const struct seq_operations cpuinfo_op = {
	466	.start = c_start,
	467	.next = c_next,
	468	.stop = c_stop,
	469	.show = show_cpuinfo
	470	};
	471
	472	static DEFINE_PER_CPU(struct cpu, cpu_topology);
	473
	474	static int __init topology_init(void)
	475	{
	476	int cpu;
	477
	478	for_each_present_cpu(cpu)
	479	register_cpu(&per_cpu(cpu_topology, cpu), cpu);
	480
	481	return 0;
	482	}
	483
	484	subsys_initcall(topology_init);