]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
24056f52 | 5 | select HAVE_DMA_API_DEBUG |
2064c946 | 6 | select HAVE_IDE |
2778f620 | 7 | select HAVE_MEMBLOCK |
12b824fb | 8 | select RTC_LIB |
75e7153a | 9 | select SYS_SUPPORTS_APM_EMULATION |
d4c7b1f9 | 10 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
fe166148 | 11 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 12 | select HAVE_ARCH_KGDB |
ed7c84d5 | 13 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
9edddaa2 | 14 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 15 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 19 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
20 | select HAVE_KERNEL_GZIP |
21 | select HAVE_KERNEL_LZO | |
6e8699f7 | 22 | select HAVE_KERNEL_LZMA |
e360adbe | 23 | select HAVE_IRQ_WORK |
7ada189f JI |
24 | select HAVE_PERF_EVENTS |
25 | select PERF_USE_VMALLOC | |
e513f8bf | 26 | select HAVE_REGS_AND_STACK_ACCESS_API |
19852e59 | 27 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
ed60453f | 28 | select HAVE_C_RECORDMCOUNT |
e2a93ecc LB |
29 | select HAVE_GENERIC_HARDIRQS |
30 | select HAVE_SPARSE_IRQ | |
1da177e4 LT |
31 | help |
32 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 33 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 34 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 35 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
36 | Europe. There is an ARM Linux project with a web page at |
37 | <http://www.arm.linux.org.uk/>. | |
38 | ||
1a189b97 RK |
39 | config HAVE_PWM |
40 | bool | |
41 | ||
0b05da72 HUK |
42 | config MIGHT_HAVE_PCI |
43 | bool | |
44 | ||
75e7153a RB |
45 | config SYS_SUPPORTS_APM_EMULATION |
46 | bool | |
47 | ||
112f38a4 RK |
48 | config HAVE_SCHED_CLOCK |
49 | bool | |
50 | ||
0a938b97 DB |
51 | config GENERIC_GPIO |
52 | bool | |
0a938b97 | 53 | |
5cfc8ee0 JS |
54 | config ARCH_USES_GETTIMEOFFSET |
55 | bool | |
56 | default n | |
746140c7 | 57 | |
0567a0c0 KH |
58 | config GENERIC_CLOCKEVENTS |
59 | bool | |
0567a0c0 | 60 | |
a8655e83 CM |
61 | config GENERIC_CLOCKEVENTS_BROADCAST |
62 | bool | |
63 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 64 | default y if SMP |
a8655e83 | 65 | |
bf9dd360 RH |
66 | config KTIME_SCALAR |
67 | bool | |
68 | default y | |
69 | ||
bc581770 LW |
70 | config HAVE_TCM |
71 | bool | |
72 | select GENERIC_ALLOCATOR | |
73 | ||
e119bfff RK |
74 | config HAVE_PROC_CPU |
75 | bool | |
76 | ||
5ea81769 AV |
77 | config NO_IOPORT |
78 | bool | |
5ea81769 | 79 | |
1da177e4 LT |
80 | config EISA |
81 | bool | |
82 | ---help--- | |
83 | The Extended Industry Standard Architecture (EISA) bus was | |
84 | developed as an open alternative to the IBM MicroChannel bus. | |
85 | ||
86 | The EISA bus provided some of the features of the IBM MicroChannel | |
87 | bus while maintaining backward compatibility with cards made for | |
88 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
89 | 1995 when it was made obsolete by the PCI bus. | |
90 | ||
91 | Say Y here if you are building a kernel for an EISA-based machine. | |
92 | ||
93 | Otherwise, say N. | |
94 | ||
95 | config SBUS | |
96 | bool | |
97 | ||
98 | config MCA | |
99 | bool | |
100 | help | |
101 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
102 | laptops. It is a bus system similar to PCI or ISA. See | |
103 | <file:Documentation/mca.txt> (and especially the web page given | |
104 | there) before attempting to build an MCA bus kernel. | |
105 | ||
f16fb1ec RK |
106 | config STACKTRACE_SUPPORT |
107 | bool | |
108 | default y | |
109 | ||
f76e9154 NP |
110 | config HAVE_LATENCYTOP_SUPPORT |
111 | bool | |
112 | depends on !SMP | |
113 | default y | |
114 | ||
f16fb1ec RK |
115 | config LOCKDEP_SUPPORT |
116 | bool | |
117 | default y | |
118 | ||
7ad1bcb2 RK |
119 | config TRACE_IRQFLAGS_SUPPORT |
120 | bool | |
121 | default y | |
122 | ||
4a2581a0 TG |
123 | config HARDIRQS_SW_RESEND |
124 | bool | |
125 | default y | |
126 | ||
127 | config GENERIC_IRQ_PROBE | |
128 | bool | |
129 | default y | |
130 | ||
95c354fe NP |
131 | config GENERIC_LOCKBREAK |
132 | bool | |
133 | default y | |
134 | depends on SMP && PREEMPT | |
135 | ||
1da177e4 LT |
136 | config RWSEM_GENERIC_SPINLOCK |
137 | bool | |
138 | default y | |
139 | ||
140 | config RWSEM_XCHGADD_ALGORITHM | |
141 | bool | |
142 | ||
f0d1b0b3 DH |
143 | config ARCH_HAS_ILOG2_U32 |
144 | bool | |
f0d1b0b3 DH |
145 | |
146 | config ARCH_HAS_ILOG2_U64 | |
147 | bool | |
f0d1b0b3 | 148 | |
89c52ed4 BD |
149 | config ARCH_HAS_CPUFREQ |
150 | bool | |
151 | help | |
152 | Internal node to signify that the ARCH has CPUFREQ support | |
153 | and that the relevant menu configurations are displayed for | |
154 | it. | |
155 | ||
c7b0aff4 KH |
156 | config ARCH_HAS_CPU_IDLE_WAIT |
157 | def_bool y | |
158 | ||
b89c3b16 AM |
159 | config GENERIC_HWEIGHT |
160 | bool | |
161 | default y | |
162 | ||
1da177e4 LT |
163 | config GENERIC_CALIBRATE_DELAY |
164 | bool | |
165 | default y | |
166 | ||
a08b6b79 AV |
167 | config ARCH_MAY_HAVE_PC_FDC |
168 | bool | |
169 | ||
5ac6da66 CL |
170 | config ZONE_DMA |
171 | bool | |
5ac6da66 | 172 | |
ccd7ab7f FT |
173 | config NEED_DMA_MAP_STATE |
174 | def_bool y | |
175 | ||
1da177e4 LT |
176 | config GENERIC_ISA_DMA |
177 | bool | |
178 | ||
1da177e4 LT |
179 | config FIQ |
180 | bool | |
181 | ||
034d2f5a AV |
182 | config ARCH_MTD_XIP |
183 | bool | |
184 | ||
c760fc19 HC |
185 | config VECTORS_BASE |
186 | hex | |
6afd6fae | 187 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
188 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
189 | default 0x00000000 | |
190 | help | |
191 | The base address of exception vectors. | |
192 | ||
1da177e4 LT |
193 | source "init/Kconfig" |
194 | ||
dc52ddc0 MH |
195 | source "kernel/Kconfig.freezer" |
196 | ||
1da177e4 LT |
197 | menu "System Type" |
198 | ||
3c427975 HC |
199 | config MMU |
200 | bool "MMU-based Paged Memory Management Support" | |
201 | default y | |
202 | help | |
203 | Select if you want MMU-based virtualised addressing space | |
204 | support by paged memory management. If unsure, say 'Y'. | |
205 | ||
ccf50e23 RK |
206 | # |
207 | # The "ARM system type" choice list is ordered alphabetically by option | |
208 | # text. Please add new entries in the option alphabetic order. | |
209 | # | |
1da177e4 LT |
210 | choice |
211 | prompt "ARM system type" | |
6a0e2430 | 212 | default ARCH_VERSATILE |
1da177e4 | 213 | |
4af6fee1 DS |
214 | config ARCH_AAEC2000 |
215 | bool "Agilent AAEC-2000 based" | |
c750815e | 216 | select CPU_ARM920T |
4af6fee1 | 217 | select ARM_AMBA |
9483a578 | 218 | select HAVE_CLK |
5cfc8ee0 | 219 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
220 | help |
221 | This enables support for systems based on the Agilent AAEC-2000 | |
222 | ||
223 | config ARCH_INTEGRATOR | |
224 | bool "ARM Ltd. Integrator family" | |
225 | select ARM_AMBA | |
89c52ed4 | 226 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 227 | select CLKDEV_LOOKUP |
c5a0adb5 | 228 | select ICST |
13edd86d | 229 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 230 | select PLAT_VERSATILE |
4af6fee1 DS |
231 | help |
232 | Support for ARM's Integrator platform. | |
233 | ||
234 | config ARCH_REALVIEW | |
235 | bool "ARM Ltd. RealView family" | |
236 | select ARM_AMBA | |
6d803ba7 | 237 | select CLKDEV_LOOKUP |
1da0c89c | 238 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 239 | select ICST |
ae30ceac | 240 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 241 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 242 | select PLAT_VERSATILE |
e3887714 | 243 | select ARM_TIMER_SP804 |
b56ba8aa | 244 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
245 | help |
246 | This enables support for ARM Ltd RealView boards. | |
247 | ||
248 | config ARCH_VERSATILE | |
249 | bool "ARM Ltd. Versatile family" | |
250 | select ARM_AMBA | |
251 | select ARM_VIC | |
6d803ba7 | 252 | select CLKDEV_LOOKUP |
1da0c89c | 253 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 254 | select ICST |
89df1272 | 255 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 256 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 257 | select PLAT_VERSATILE |
e3887714 | 258 | select ARM_TIMER_SP804 |
4af6fee1 DS |
259 | help |
260 | This enables support for ARM Ltd Versatile board. | |
261 | ||
ceade897 RK |
262 | config ARCH_VEXPRESS |
263 | bool "ARM Ltd. Versatile Express family" | |
264 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
265 | select ARM_AMBA | |
266 | select ARM_TIMER_SP804 | |
6d803ba7 | 267 | select CLKDEV_LOOKUP |
ceade897 | 268 | select GENERIC_CLOCKEVENTS |
ceade897 | 269 | select HAVE_CLK |
0af85dda | 270 | select HAVE_SCHED_CLOCK |
ceade897 RK |
271 | select ICST |
272 | select PLAT_VERSATILE | |
273 | help | |
274 | This enables support for the ARM Ltd Versatile Express boards. | |
275 | ||
8fc5ffa0 AV |
276 | config ARCH_AT91 |
277 | bool "Atmel AT91" | |
f373e8c0 | 278 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 279 | select HAVE_CLK |
4af6fee1 | 280 | help |
2b3b3516 AV |
281 | This enables support for systems based on the Atmel AT91RM9200, |
282 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 283 | |
ccf50e23 RK |
284 | config ARCH_BCMRING |
285 | bool "Broadcom BCMRING" | |
286 | depends on MMU | |
287 | select CPU_V6 | |
288 | select ARM_AMBA | |
6d803ba7 | 289 | select CLKDEV_LOOKUP |
ccf50e23 RK |
290 | select GENERIC_CLOCKEVENTS |
291 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
292 | help | |
293 | Support for Broadcom's BCMRing platform. | |
294 | ||
1da177e4 | 295 | config ARCH_CLPS711X |
4af6fee1 | 296 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 297 | select CPU_ARM720T |
5cfc8ee0 | 298 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
299 | help |
300 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 301 | |
d94f944e AV |
302 | config ARCH_CNS3XXX |
303 | bool "Cavium Networks CNS3XXX family" | |
304 | select CPU_V6 | |
d94f944e AV |
305 | select GENERIC_CLOCKEVENTS |
306 | select ARM_GIC | |
0b05da72 | 307 | select MIGHT_HAVE_PCI |
5f32f7a0 | 308 | select PCI_DOMAINS if PCI |
d94f944e AV |
309 | help |
310 | Support for Cavium Networks CNS3XXX platform. | |
311 | ||
788c9700 RK |
312 | config ARCH_GEMINI |
313 | bool "Cortina Systems Gemini" | |
314 | select CPU_FA526 | |
788c9700 | 315 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 316 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
317 | help |
318 | Support for the Cortina Systems Gemini family SoCs | |
319 | ||
1da177e4 LT |
320 | config ARCH_EBSA110 |
321 | bool "EBSA-110" | |
c750815e | 322 | select CPU_SA110 |
f7e68bbf | 323 | select ISA |
c5eb2a2b | 324 | select NO_IOPORT |
5cfc8ee0 | 325 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
326 | help |
327 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 328 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
329 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
330 | parallel port. | |
331 | ||
e7736d47 LB |
332 | config ARCH_EP93XX |
333 | bool "EP93xx-based" | |
c750815e | 334 | select CPU_ARM920T |
e7736d47 LB |
335 | select ARM_AMBA |
336 | select ARM_VIC | |
6d803ba7 | 337 | select CLKDEV_LOOKUP |
7444a72e | 338 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 339 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 340 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
341 | help |
342 | This enables support for the Cirrus EP93xx series of CPUs. | |
343 | ||
1da177e4 LT |
344 | config ARCH_FOOTBRIDGE |
345 | bool "FootBridge" | |
c750815e | 346 | select CPU_SA110 |
1da177e4 | 347 | select FOOTBRIDGE |
5cfc8ee0 | 348 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
349 | help |
350 | Support for systems based on the DC21285 companion chip | |
351 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 352 | |
788c9700 RK |
353 | config ARCH_MXC |
354 | bool "Freescale MXC/iMX-based" | |
788c9700 | 355 | select GENERIC_CLOCKEVENTS |
788c9700 | 356 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 357 | select CLKDEV_LOOKUP |
788c9700 RK |
358 | help |
359 | Support for Freescale MXC/iMX-based family of processors | |
360 | ||
1d3f33d5 SG |
361 | config ARCH_MXS |
362 | bool "Freescale MXS-based" | |
363 | select GENERIC_CLOCKEVENTS | |
364 | select ARCH_REQUIRE_GPIOLIB | |
b9214b97 | 365 | select CLKDEV_LOOKUP |
1d3f33d5 SG |
366 | help |
367 | Support for Freescale MXS-based family of processors | |
368 | ||
7bd0f2f5 | 369 | config ARCH_STMP3XXX |
370 | bool "Freescale STMP3xxx" | |
371 | select CPU_ARM926T | |
6d803ba7 | 372 | select CLKDEV_LOOKUP |
7bd0f2f5 | 373 | select ARCH_REQUIRE_GPIOLIB |
7bd0f2f5 | 374 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 375 | select USB_ARCH_HAS_EHCI |
376 | help | |
377 | Support for systems based on the Freescale 3xxx CPUs. | |
378 | ||
4af6fee1 DS |
379 | config ARCH_NETX |
380 | bool "Hilscher NetX based" | |
c750815e | 381 | select CPU_ARM926T |
4af6fee1 | 382 | select ARM_VIC |
2fcfe6b8 | 383 | select GENERIC_CLOCKEVENTS |
f999b8bd | 384 | help |
4af6fee1 DS |
385 | This enables support for systems based on the Hilscher NetX Soc |
386 | ||
387 | config ARCH_H720X | |
388 | bool "Hynix HMS720x-based" | |
c750815e | 389 | select CPU_ARM720T |
4af6fee1 | 390 | select ISA_DMA_API |
5cfc8ee0 | 391 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
392 | help |
393 | This enables support for systems based on the Hynix HMS720x | |
394 | ||
3b938be6 RK |
395 | config ARCH_IOP13XX |
396 | bool "IOP13xx-based" | |
397 | depends on MMU | |
c750815e | 398 | select CPU_XSC3 |
3b938be6 RK |
399 | select PLAT_IOP |
400 | select PCI | |
401 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 402 | select VMSPLIT_1G |
3b938be6 RK |
403 | help |
404 | Support for Intel's IOP13XX (XScale) family of processors. | |
405 | ||
3f7e5815 LB |
406 | config ARCH_IOP32X |
407 | bool "IOP32x-based" | |
a4f7e763 | 408 | depends on MMU |
c750815e | 409 | select CPU_XSCALE |
7ae1f7ec | 410 | select PLAT_IOP |
f7e68bbf | 411 | select PCI |
bb2b180c | 412 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 413 | help |
3f7e5815 LB |
414 | Support for Intel's 80219 and IOP32X (XScale) family of |
415 | processors. | |
416 | ||
417 | config ARCH_IOP33X | |
418 | bool "IOP33x-based" | |
419 | depends on MMU | |
c750815e | 420 | select CPU_XSCALE |
7ae1f7ec | 421 | select PLAT_IOP |
3f7e5815 | 422 | select PCI |
bb2b180c | 423 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
424 | help |
425 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 426 | |
3b938be6 RK |
427 | config ARCH_IXP23XX |
428 | bool "IXP23XX-based" | |
a4f7e763 | 429 | depends on MMU |
c750815e | 430 | select CPU_XSC3 |
3b938be6 | 431 | select PCI |
5cfc8ee0 | 432 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 433 | help |
3b938be6 | 434 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
435 | |
436 | config ARCH_IXP2000 | |
437 | bool "IXP2400/2800-based" | |
a4f7e763 | 438 | depends on MMU |
c750815e | 439 | select CPU_XSCALE |
f7e68bbf | 440 | select PCI |
5cfc8ee0 | 441 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
442 | help |
443 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 444 | |
3b938be6 RK |
445 | config ARCH_IXP4XX |
446 | bool "IXP4xx-based" | |
a4f7e763 | 447 | depends on MMU |
c750815e | 448 | select CPU_XSCALE |
8858e9af | 449 | select GENERIC_GPIO |
3b938be6 | 450 | select GENERIC_CLOCKEVENTS |
5b0d495c | 451 | select HAVE_SCHED_CLOCK |
0b05da72 | 452 | select MIGHT_HAVE_PCI |
485bdde7 | 453 | select DMABOUNCE if PCI |
c4713074 | 454 | help |
3b938be6 | 455 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 456 | |
edabd38e SB |
457 | config ARCH_DOVE |
458 | bool "Marvell Dove" | |
459 | select PCI | |
edabd38e | 460 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
461 | select GENERIC_CLOCKEVENTS |
462 | select PLAT_ORION | |
463 | help | |
464 | Support for the Marvell Dove SoC 88AP510 | |
465 | ||
651c74c7 SB |
466 | config ARCH_KIRKWOOD |
467 | bool "Marvell Kirkwood" | |
c750815e | 468 | select CPU_FEROCEON |
651c74c7 | 469 | select PCI |
a8865655 | 470 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
471 | select GENERIC_CLOCKEVENTS |
472 | select PLAT_ORION | |
473 | help | |
474 | Support for the following Marvell Kirkwood series SoCs: | |
475 | 88F6180, 88F6192 and 88F6281. | |
476 | ||
777f9beb LB |
477 | config ARCH_LOKI |
478 | bool "Marvell Loki (88RC8480)" | |
c750815e | 479 | select CPU_FEROCEON |
777f9beb LB |
480 | select GENERIC_CLOCKEVENTS |
481 | select PLAT_ORION | |
482 | help | |
483 | Support for the Marvell Loki (88RC8480) SoC. | |
484 | ||
40805949 KW |
485 | config ARCH_LPC32XX |
486 | bool "NXP LPC32XX" | |
487 | select CPU_ARM926T | |
488 | select ARCH_REQUIRE_GPIOLIB | |
489 | select HAVE_IDE | |
490 | select ARM_AMBA | |
491 | select USB_ARCH_HAS_OHCI | |
6d803ba7 | 492 | select CLKDEV_LOOKUP |
40805949 KW |
493 | select GENERIC_TIME |
494 | select GENERIC_CLOCKEVENTS | |
495 | help | |
496 | Support for the NXP LPC32XX family of processors | |
497 | ||
794d15b2 SS |
498 | config ARCH_MV78XX0 |
499 | bool "Marvell MV78xx0" | |
c750815e | 500 | select CPU_FEROCEON |
794d15b2 | 501 | select PCI |
a8865655 | 502 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
503 | select GENERIC_CLOCKEVENTS |
504 | select PLAT_ORION | |
505 | help | |
506 | Support for the following Marvell MV78xx0 series SoCs: | |
507 | MV781x0, MV782x0. | |
508 | ||
9dd0b194 | 509 | config ARCH_ORION5X |
585cf175 TP |
510 | bool "Marvell Orion" |
511 | depends on MMU | |
c750815e | 512 | select CPU_FEROCEON |
038ee083 | 513 | select PCI |
a8865655 | 514 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 515 | select GENERIC_CLOCKEVENTS |
69b02f6a | 516 | select PLAT_ORION |
585cf175 | 517 | help |
9dd0b194 | 518 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 519 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 520 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 521 | |
788c9700 | 522 | config ARCH_MMP |
2f7e8fae | 523 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 524 | depends on MMU |
788c9700 | 525 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 526 | select CLKDEV_LOOKUP |
788c9700 | 527 | select GENERIC_CLOCKEVENTS |
28bb7bc6 | 528 | select HAVE_SCHED_CLOCK |
788c9700 RK |
529 | select TICK_ONESHOT |
530 | select PLAT_PXA | |
0bd86961 | 531 | select SPARSE_IRQ |
788c9700 | 532 | help |
2f7e8fae | 533 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
534 | |
535 | config ARCH_KS8695 | |
536 | bool "Micrel/Kendin KS8695" | |
537 | select CPU_ARM922T | |
98830bc9 | 538 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 539 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
540 | help |
541 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
542 | System-on-Chip devices. | |
543 | ||
544 | config ARCH_NS9XXX | |
545 | bool "NetSilicon NS9xxx" | |
546 | select CPU_ARM926T | |
547 | select GENERIC_GPIO | |
788c9700 RK |
548 | select GENERIC_CLOCKEVENTS |
549 | select HAVE_CLK | |
550 | help | |
551 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
552 | System. | |
553 | ||
554 | <http://www.digi.com/products/microprocessors/index.jsp> | |
555 | ||
556 | config ARCH_W90X900 | |
557 | bool "Nuvoton W90X900 CPU" | |
558 | select CPU_ARM926T | |
c52d3d68 | 559 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 560 | select CLKDEV_LOOKUP |
58b5369e | 561 | select GENERIC_CLOCKEVENTS |
788c9700 | 562 | help |
a8bc4ead | 563 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
564 | At present, the w90x900 has been renamed nuc900, regarding | |
565 | the ARM series product line, you can login the following | |
566 | link address to know more. | |
567 | ||
568 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
569 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 570 | |
a62e9030 | 571 | config ARCH_NUC93X |
572 | bool "Nuvoton NUC93X CPU" | |
573 | select CPU_ARM926T | |
6d803ba7 | 574 | select CLKDEV_LOOKUP |
a62e9030 | 575 | help |
576 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
577 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
578 | ||
c5f80065 EG |
579 | config ARCH_TEGRA |
580 | bool "NVIDIA Tegra" | |
4073723a | 581 | select CLKDEV_LOOKUP |
c5f80065 EG |
582 | select GENERIC_TIME |
583 | select GENERIC_CLOCKEVENTS | |
584 | select GENERIC_GPIO | |
585 | select HAVE_CLK | |
e3f4c0ab | 586 | select HAVE_SCHED_CLOCK |
c5f80065 | 587 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 588 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
589 | help |
590 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
591 | Tegra 6xx and Tegra 2 series). | |
592 | ||
4af6fee1 DS |
593 | config ARCH_PNX4008 |
594 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 595 | select CPU_ARM926T |
6d803ba7 | 596 | select CLKDEV_LOOKUP |
5cfc8ee0 | 597 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
598 | help |
599 | This enables support for Philips PNX4008 mobile platform. | |
600 | ||
1da177e4 | 601 | config ARCH_PXA |
2c8086a5 | 602 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 603 | depends on MMU |
034d2f5a | 604 | select ARCH_MTD_XIP |
89c52ed4 | 605 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 606 | select CLKDEV_LOOKUP |
7444a72e | 607 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 608 | select GENERIC_CLOCKEVENTS |
7ce83018 | 609 | select HAVE_SCHED_CLOCK |
a88264c2 | 610 | select TICK_ONESHOT |
bd5ce433 | 611 | select PLAT_PXA |
6ac6b817 | 612 | select SPARSE_IRQ |
f999b8bd | 613 | help |
2c8086a5 | 614 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 615 | |
788c9700 RK |
616 | config ARCH_MSM |
617 | bool "Qualcomm MSM" | |
4b536b8d | 618 | select HAVE_CLK |
49cbe786 | 619 | select GENERIC_CLOCKEVENTS |
923a081c | 620 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 621 | help |
4b53eb4f DW |
622 | Support for Qualcomm MSM/QSD based systems. This runs on the |
623 | apps processor of the MSM/QSD and depends on a shared memory | |
624 | interface to the modem processor which runs the baseband | |
625 | stack and controls some vital subsystems | |
626 | (clock and power control, etc). | |
49cbe786 | 627 | |
c793c1b0 | 628 | config ARCH_SHMOBILE |
6d72ad35 PM |
629 | bool "Renesas SH-Mobile / R-Mobile" |
630 | select HAVE_CLK | |
5e93c6b4 | 631 | select CLKDEV_LOOKUP |
6d72ad35 PM |
632 | select GENERIC_CLOCKEVENTS |
633 | select NO_IOPORT | |
634 | select SPARSE_IRQ | |
60f1435c | 635 | select MULTI_IRQ_HANDLER |
c793c1b0 | 636 | help |
6d72ad35 | 637 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 638 | |
1da177e4 LT |
639 | config ARCH_RPC |
640 | bool "RiscPC" | |
641 | select ARCH_ACORN | |
642 | select FIQ | |
643 | select TIMER_ACORN | |
a08b6b79 | 644 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 645 | select HAVE_PATA_PLATFORM |
065909b9 | 646 | select ISA_DMA_API |
5ea81769 | 647 | select NO_IOPORT |
07f841b7 | 648 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 649 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
650 | help |
651 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
652 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
653 | ||
654 | config ARCH_SA1100 | |
655 | bool "SA1100-based" | |
c750815e | 656 | select CPU_SA1100 |
f7e68bbf | 657 | select ISA |
05944d74 | 658 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 659 | select ARCH_MTD_XIP |
89c52ed4 | 660 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 661 | select CPU_FREQ |
3e238be2 | 662 | select GENERIC_CLOCKEVENTS |
9483a578 | 663 | select HAVE_CLK |
5094b92f | 664 | select HAVE_SCHED_CLOCK |
3e238be2 | 665 | select TICK_ONESHOT |
7444a72e | 666 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
667 | help |
668 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
669 | |
670 | config ARCH_S3C2410 | |
63b1f51b | 671 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 672 | select GENERIC_GPIO |
9d56c02a | 673 | select ARCH_HAS_CPUFREQ |
9483a578 | 674 | select HAVE_CLK |
5cfc8ee0 | 675 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 676 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
677 | help |
678 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
679 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 680 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 681 | |
63b1f51b BD |
682 | Note, the S3C2416 and the S3C2450 are so close that they even share |
683 | the same SoC ID code. This means that there is no seperate machine | |
684 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
685 | ||
a08ab637 BD |
686 | config ARCH_S3C64XX |
687 | bool "Samsung S3C64XX" | |
89f1fa08 | 688 | select PLAT_SAMSUNG |
89f0ce72 | 689 | select CPU_V6 |
89f0ce72 | 690 | select ARM_VIC |
a08ab637 | 691 | select HAVE_CLK |
89f0ce72 | 692 | select NO_IOPORT |
5cfc8ee0 | 693 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 694 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
695 | select ARCH_REQUIRE_GPIOLIB |
696 | select SAMSUNG_CLKSRC | |
697 | select SAMSUNG_IRQ_VIC_TIMER | |
698 | select SAMSUNG_IRQ_UART | |
699 | select S3C_GPIO_TRACK | |
700 | select S3C_GPIO_PULL_UPDOWN | |
701 | select S3C_GPIO_CFG_S3C24XX | |
702 | select S3C_GPIO_CFG_S3C64XX | |
703 | select S3C_DEV_NAND | |
704 | select USB_ARCH_HAS_OHCI | |
705 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 706 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 707 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
708 | help |
709 | Samsung S3C64XX series based systems | |
710 | ||
49b7a491 KK |
711 | config ARCH_S5P64X0 |
712 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
713 | select CPU_V6 |
714 | select GENERIC_GPIO | |
715 | select HAVE_CLK | |
c39d8d55 | 716 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
925c68cd | 717 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 718 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 719 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 720 | help |
49b7a491 KK |
721 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
722 | SMDK6450. | |
c4ffccdd | 723 | |
550db7f1 KK |
724 | config ARCH_S5P6442 |
725 | bool "Samsung S5P6442" | |
726 | select CPU_V6 | |
727 | select GENERIC_GPIO | |
728 | select HAVE_CLK | |
925c68cd | 729 | select ARCH_USES_GETTIMEOFFSET |
c39d8d55 | 730 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
550db7f1 KK |
731 | help |
732 | Samsung S5P6442 CPU based systems | |
733 | ||
acc84707 MS |
734 | config ARCH_S5PC100 |
735 | bool "Samsung S5PC100" | |
5a7652f2 BM |
736 | select GENERIC_GPIO |
737 | select HAVE_CLK | |
738 | select CPU_V7 | |
d6d502fa | 739 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 740 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 741 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 742 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 743 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 744 | help |
acc84707 | 745 | Samsung S5PC100 series based systems |
5a7652f2 | 746 | |
170f4e42 KK |
747 | config ARCH_S5PV210 |
748 | bool "Samsung S5PV210/S5PC110" | |
749 | select CPU_V7 | |
eecb6a84 | 750 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
751 | select GENERIC_GPIO |
752 | select HAVE_CLK | |
753 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 754 | select ARCH_HAS_CPUFREQ |
925c68cd | 755 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 756 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 757 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 758 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
759 | help |
760 | Samsung S5PV210/S5PC110 series based systems | |
761 | ||
cc0e72b8 CY |
762 | config ARCH_S5PV310 |
763 | bool "Samsung S5PV310/S5PC210" | |
764 | select CPU_V7 | |
f567fa6f | 765 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
766 | select GENERIC_GPIO |
767 | select HAVE_CLK | |
b333fb16 | 768 | select ARCH_HAS_CPUFREQ |
cc0e72b8 | 769 | select GENERIC_CLOCKEVENTS |
754961a8 | 770 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 771 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 772 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 CY |
773 | help |
774 | Samsung S5PV310 series based systems | |
775 | ||
1da177e4 LT |
776 | config ARCH_SHARK |
777 | bool "Shark" | |
c750815e | 778 | select CPU_SA110 |
f7e68bbf RK |
779 | select ISA |
780 | select ISA_DMA | |
3bca103a | 781 | select ZONE_DMA |
f7e68bbf | 782 | select PCI |
5cfc8ee0 | 783 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
784 | help |
785 | Support for the StrongARM based Digital DNARD machine, also known | |
786 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 787 | |
83ef3338 HK |
788 | config ARCH_TCC_926 |
789 | bool "Telechips TCC ARM926-based systems" | |
790 | select CPU_ARM926T | |
791 | select HAVE_CLK | |
6d803ba7 | 792 | select CLKDEV_LOOKUP |
83ef3338 HK |
793 | select GENERIC_CLOCKEVENTS |
794 | help | |
795 | Support for Telechips TCC ARM926-based systems. | |
796 | ||
1da177e4 LT |
797 | config ARCH_LH7A40X |
798 | bool "Sharp LH7A40X" | |
c750815e | 799 | select CPU_ARM922T |
4ba3f7c5 | 800 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 801 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
802 | help |
803 | Say Y here for systems based on one of the Sharp LH7A40X | |
804 | System on a Chip processors. These CPUs include an ARM922T | |
805 | core with a wide array of integrated devices for | |
806 | hand-held and low-power applications. | |
807 | ||
d98aac75 LW |
808 | config ARCH_U300 |
809 | bool "ST-Ericsson U300 Series" | |
810 | depends on MMU | |
811 | select CPU_ARM926T | |
5c21b7ca | 812 | select HAVE_SCHED_CLOCK |
bc581770 | 813 | select HAVE_TCM |
d98aac75 LW |
814 | select ARM_AMBA |
815 | select ARM_VIC | |
d98aac75 | 816 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 817 | select CLKDEV_LOOKUP |
d98aac75 LW |
818 | select GENERIC_GPIO |
819 | help | |
820 | Support for ST-Ericsson U300 series mobile platforms. | |
821 | ||
ccf50e23 RK |
822 | config ARCH_U8500 |
823 | bool "ST-Ericsson U8500 Series" | |
824 | select CPU_V7 | |
825 | select ARM_AMBA | |
ccf50e23 | 826 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 827 | select CLKDEV_LOOKUP |
94bdc0e2 | 828 | select ARCH_REQUIRE_GPIOLIB |
7c1a70e9 | 829 | select ARCH_HAS_CPUFREQ |
ccf50e23 RK |
830 | help |
831 | Support for ST-Ericsson's Ux500 architecture | |
832 | ||
833 | config ARCH_NOMADIK | |
834 | bool "STMicroelectronics Nomadik" | |
835 | select ARM_AMBA | |
836 | select ARM_VIC | |
837 | select CPU_ARM926T | |
6d803ba7 | 838 | select CLKDEV_LOOKUP |
ccf50e23 | 839 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
840 | select ARCH_REQUIRE_GPIOLIB |
841 | help | |
842 | Support for the Nomadik platform by ST-Ericsson | |
843 | ||
7c6337e2 KH |
844 | config ARCH_DAVINCI |
845 | bool "TI DaVinci" | |
7c6337e2 | 846 | select GENERIC_CLOCKEVENTS |
dce1115b | 847 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 848 | select ZONE_DMA |
9232fcc9 | 849 | select HAVE_IDE |
6d803ba7 | 850 | select CLKDEV_LOOKUP |
20e9969b | 851 | select GENERIC_ALLOCATOR |
ae88e05a | 852 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
853 | help |
854 | Support for TI's DaVinci platform. | |
855 | ||
3b938be6 RK |
856 | config ARCH_OMAP |
857 | bool "TI OMAP" | |
9483a578 | 858 | select HAVE_CLK |
7444a72e | 859 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 860 | select ARCH_HAS_CPUFREQ |
06cad098 | 861 | select GENERIC_CLOCKEVENTS |
dc548fbb | 862 | select HAVE_SCHED_CLOCK |
9af915da | 863 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 864 | help |
6e457bb0 | 865 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 866 | |
cee37e50 VK |
867 | config PLAT_SPEAR |
868 | bool "ST SPEAr" | |
869 | select ARM_AMBA | |
870 | select ARCH_REQUIRE_GPIOLIB | |
6d803ba7 | 871 | select CLKDEV_LOOKUP |
cee37e50 | 872 | select GENERIC_CLOCKEVENTS |
cee37e50 VK |
873 | select HAVE_CLK |
874 | help | |
875 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
876 | ||
1da177e4 LT |
877 | endchoice |
878 | ||
ccf50e23 RK |
879 | # |
880 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
881 | # Kconfigs may be included either alphabetically (according to the | |
882 | # plat- suffix) or along side the corresponding mach-* source. | |
883 | # | |
95b8f20f RK |
884 | source "arch/arm/mach-aaec2000/Kconfig" |
885 | ||
886 | source "arch/arm/mach-at91/Kconfig" | |
887 | ||
888 | source "arch/arm/mach-bcmring/Kconfig" | |
889 | ||
1da177e4 LT |
890 | source "arch/arm/mach-clps711x/Kconfig" |
891 | ||
d94f944e AV |
892 | source "arch/arm/mach-cns3xxx/Kconfig" |
893 | ||
95b8f20f RK |
894 | source "arch/arm/mach-davinci/Kconfig" |
895 | ||
896 | source "arch/arm/mach-dove/Kconfig" | |
897 | ||
e7736d47 LB |
898 | source "arch/arm/mach-ep93xx/Kconfig" |
899 | ||
1da177e4 LT |
900 | source "arch/arm/mach-footbridge/Kconfig" |
901 | ||
59d3a193 PZ |
902 | source "arch/arm/mach-gemini/Kconfig" |
903 | ||
95b8f20f RK |
904 | source "arch/arm/mach-h720x/Kconfig" |
905 | ||
1da177e4 LT |
906 | source "arch/arm/mach-integrator/Kconfig" |
907 | ||
3f7e5815 LB |
908 | source "arch/arm/mach-iop32x/Kconfig" |
909 | ||
910 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 911 | |
285f5fa7 DW |
912 | source "arch/arm/mach-iop13xx/Kconfig" |
913 | ||
1da177e4 LT |
914 | source "arch/arm/mach-ixp4xx/Kconfig" |
915 | ||
916 | source "arch/arm/mach-ixp2000/Kconfig" | |
917 | ||
c4713074 LB |
918 | source "arch/arm/mach-ixp23xx/Kconfig" |
919 | ||
95b8f20f RK |
920 | source "arch/arm/mach-kirkwood/Kconfig" |
921 | ||
922 | source "arch/arm/mach-ks8695/Kconfig" | |
923 | ||
924 | source "arch/arm/mach-lh7a40x/Kconfig" | |
925 | ||
777f9beb LB |
926 | source "arch/arm/mach-loki/Kconfig" |
927 | ||
40805949 KW |
928 | source "arch/arm/mach-lpc32xx/Kconfig" |
929 | ||
95b8f20f RK |
930 | source "arch/arm/mach-msm/Kconfig" |
931 | ||
794d15b2 SS |
932 | source "arch/arm/mach-mv78xx0/Kconfig" |
933 | ||
95b8f20f | 934 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 935 | |
1d3f33d5 SG |
936 | source "arch/arm/mach-mxs/Kconfig" |
937 | ||
95b8f20f | 938 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 939 | |
95b8f20f RK |
940 | source "arch/arm/mach-nomadik/Kconfig" |
941 | source "arch/arm/plat-nomadik/Kconfig" | |
942 | ||
943 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 944 | |
186f93ea | 945 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 946 | |
d48af15e TL |
947 | source "arch/arm/plat-omap/Kconfig" |
948 | ||
949 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 950 | |
1dbae815 TL |
951 | source "arch/arm/mach-omap2/Kconfig" |
952 | ||
9dd0b194 | 953 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 954 | |
95b8f20f RK |
955 | source "arch/arm/mach-pxa/Kconfig" |
956 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 957 | |
95b8f20f RK |
958 | source "arch/arm/mach-mmp/Kconfig" |
959 | ||
960 | source "arch/arm/mach-realview/Kconfig" | |
961 | ||
962 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 963 | |
cf383678 | 964 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 965 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 966 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 967 | |
cee37e50 | 968 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 969 | |
83ef3338 HK |
970 | source "arch/arm/plat-tcc/Kconfig" |
971 | ||
a21765a7 BD |
972 | if ARCH_S3C2410 |
973 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 974 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 975 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 976 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 977 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 978 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 979 | endif |
1da177e4 | 980 | |
a08ab637 | 981 | if ARCH_S3C64XX |
431107ea | 982 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
983 | endif |
984 | ||
49b7a491 | 985 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 986 | |
550db7f1 | 987 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 988 | |
5a7652f2 | 989 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 990 | |
170f4e42 KK |
991 | source "arch/arm/mach-s5pv210/Kconfig" |
992 | ||
cc0e72b8 CY |
993 | source "arch/arm/mach-s5pv310/Kconfig" |
994 | ||
882d01f9 | 995 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 996 | |
882d01f9 | 997 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 998 | |
c5f80065 EG |
999 | source "arch/arm/mach-tegra/Kconfig" |
1000 | ||
95b8f20f | 1001 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1002 | |
95b8f20f | 1003 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1004 | |
1005 | source "arch/arm/mach-versatile/Kconfig" | |
1006 | ||
ceade897 RK |
1007 | source "arch/arm/mach-vexpress/Kconfig" |
1008 | ||
7ec80ddf | 1009 | source "arch/arm/mach-w90x900/Kconfig" |
1010 | ||
1da177e4 LT |
1011 | # Definitions to make life easier |
1012 | config ARCH_ACORN | |
1013 | bool | |
1014 | ||
7ae1f7ec LB |
1015 | config PLAT_IOP |
1016 | bool | |
469d3044 | 1017 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1018 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1019 | |
69b02f6a LB |
1020 | config PLAT_ORION |
1021 | bool | |
f06a1624 | 1022 | select HAVE_SCHED_CLOCK |
69b02f6a | 1023 | |
bd5ce433 EM |
1024 | config PLAT_PXA |
1025 | bool | |
1026 | ||
f4b8b319 RK |
1027 | config PLAT_VERSATILE |
1028 | bool | |
1029 | ||
e3887714 RK |
1030 | config ARM_TIMER_SP804 |
1031 | bool | |
1032 | ||
1da177e4 LT |
1033 | source arch/arm/mm/Kconfig |
1034 | ||
afe4b25e LB |
1035 | config IWMMXT |
1036 | bool "Enable iWMMXt support" | |
ef6c8445 HZ |
1037 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1038 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | |
afe4b25e LB |
1039 | help |
1040 | Enable support for iWMMXt context switching at run time if | |
1041 | running on a CPU that supports it. | |
1042 | ||
1da177e4 LT |
1043 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1044 | config XSCALE_PMU | |
1045 | bool | |
1046 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1047 | default y | |
1048 | ||
0f4f0672 | 1049 | config CPU_HAS_PMU |
8954bb0d WD |
1050 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
1051 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
1052 | default y |
1053 | bool | |
1054 | ||
52108641 | 1055 | config MULTI_IRQ_HANDLER |
1056 | bool | |
1057 | help | |
1058 | Allow each machine to specify it's own IRQ handler at run time. | |
1059 | ||
3b93e7b0 HC |
1060 | if !MMU |
1061 | source "arch/arm/Kconfig-nommu" | |
1062 | endif | |
1063 | ||
9cba3ccc CM |
1064 | config ARM_ERRATA_411920 |
1065 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
81d11955 | 1066 | depends on CPU_V6 |
9cba3ccc CM |
1067 | help |
1068 | Invalidation of the Instruction Cache operation can | |
1069 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1070 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1071 | recommended workaround. | |
1072 | ||
7ce236fc CM |
1073 | config ARM_ERRATA_430973 |
1074 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1075 | depends on CPU_V7 | |
1076 | help | |
1077 | This option enables the workaround for the 430973 Cortex-A8 | |
1078 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1079 | interworking branch is replaced with another code sequence at the | |
1080 | same virtual address, whether due to self-modifying code or virtual | |
1081 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1082 | stale interworking branch prediction. This results in Cortex-A8 | |
1083 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1084 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1085 | and also flushes the branch target cache at every context switch. | |
1086 | Note that setting specific bits in the ACTLR register may not be | |
1087 | available in non-secure mode. | |
1088 | ||
855c551f CM |
1089 | config ARM_ERRATA_458693 |
1090 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1091 | depends on CPU_V7 | |
1092 | help | |
1093 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1094 | erratum. For very specific sequences of memory operations, it is | |
1095 | possible for a hazard condition intended for a cache line to instead | |
1096 | be incorrectly associated with a different cache line. This false | |
1097 | hazard might then cause a processor deadlock. The workaround enables | |
1098 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1099 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1100 | register may not be available in non-secure mode. | |
1101 | ||
0516e464 CM |
1102 | config ARM_ERRATA_460075 |
1103 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1104 | depends on CPU_V7 | |
1105 | help | |
1106 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1107 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1108 | situation in which recent store transactions to the L2 cache are lost | |
1109 | and overwritten with stale memory contents from external memory. The | |
1110 | workaround disables the write-allocate mode for the L2 cache via the | |
1111 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1112 | may not be available in non-secure mode. | |
1113 | ||
9f05027c WD |
1114 | config ARM_ERRATA_742230 |
1115 | bool "ARM errata: DMB operation may be faulty" | |
1116 | depends on CPU_V7 && SMP | |
1117 | help | |
1118 | This option enables the workaround for the 742230 Cortex-A9 | |
1119 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1120 | between two write operations may not ensure the correct visibility | |
1121 | ordering of the two writes. This workaround sets a specific bit in | |
1122 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1123 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1124 | the two writes. | |
1125 | ||
a672e99b WD |
1126 | config ARM_ERRATA_742231 |
1127 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1128 | depends on CPU_V7 && SMP | |
1129 | help | |
1130 | This option enables the workaround for the 742231 Cortex-A9 | |
1131 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1132 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1133 | accessing some data located in the same cache line, may get corrupted | |
1134 | data due to bad handling of the address hazard when the line gets | |
1135 | replaced from one of the CPUs at the same time as another CPU is | |
1136 | accessing it. This workaround sets specific bits in the diagnostic | |
1137 | register of the Cortex-A9 which reduces the linefill issuing | |
1138 | capabilities of the processor. | |
1139 | ||
9e65582a SS |
1140 | config PL310_ERRATA_588369 |
1141 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
2839e06c | 1142 | depends on CACHE_L2X0 |
9e65582a SS |
1143 | help |
1144 | The PL310 L2 cache controller implements three types of Clean & | |
1145 | Invalidate maintenance operations: by Physical Address | |
1146 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1147 | They are architecturally defined to behave as the execution of a | |
1148 | clean operation followed immediately by an invalidate operation, | |
1149 | both performing to the same memory location. This functionality | |
1150 | is not correctly implemented in PL310 as clean lines are not | |
2839e06c | 1151 | invalidated as a result of these operations. |
cdf357f1 WD |
1152 | |
1153 | config ARM_ERRATA_720789 | |
1154 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1155 | depends on CPU_V7 && SMP | |
1156 | help | |
1157 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1158 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1159 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1160 | As a consequence of this erratum, some TLB entries which should be | |
1161 | invalidated are not, resulting in an incoherency in the system page | |
1162 | tables. The workaround changes the TLB flushing routines to invalidate | |
1163 | entries regardless of the ASID. | |
475d92fc WD |
1164 | |
1165 | config ARM_ERRATA_743622 | |
1166 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1167 | depends on CPU_V7 | |
1168 | help | |
1169 | This option enables the workaround for the 743622 Cortex-A9 | |
1170 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1171 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1172 | corruption. This workaround sets a specific bit in the diagnostic | |
1173 | register of the Cortex-A9 which disables the Store Buffer | |
1174 | optimisation, preventing the defect from occurring. This has no | |
1175 | visible impact on the overall performance or power consumption of the | |
1176 | processor. | |
1177 | ||
2839e06c SS |
1178 | config PL310_ERRATA_727915 |
1179 | bool "Background Clean & Invalidate by Way operation can cause data corruption" | |
1180 | depends on CACHE_L2X0 | |
1181 | help | |
1182 | PL310 implements the Clean & Invalidate by Way L2 cache maintenance | |
1183 | operation (offset 0x7FC). This operation runs in background so that | |
1184 | PL310 can handle normal accesses while it is in progress. Under very | |
1185 | rare circumstances, due to this erratum, write data can be lost when | |
1186 | PL310 treats a cacheable write transaction during a Clean & | |
1187 | Invalidate by Way operation. | |
1da177e4 LT |
1188 | endmenu |
1189 | ||
1190 | source "arch/arm/common/Kconfig" | |
1191 | ||
1da177e4 LT |
1192 | menu "Bus support" |
1193 | ||
1194 | config ARM_AMBA | |
1195 | bool | |
1196 | ||
1197 | config ISA | |
1198 | bool | |
1da177e4 LT |
1199 | help |
1200 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1201 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1202 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1203 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1204 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1205 | ||
065909b9 | 1206 | # Select ISA DMA controller support |
1da177e4 LT |
1207 | config ISA_DMA |
1208 | bool | |
065909b9 | 1209 | select ISA_DMA_API |
1da177e4 | 1210 | |
065909b9 | 1211 | # Select ISA DMA interface |
5cae841b AV |
1212 | config ISA_DMA_API |
1213 | bool | |
5cae841b | 1214 | |
1da177e4 | 1215 | config PCI |
0b05da72 | 1216 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1217 | help |
1218 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1219 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1220 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1221 | VESA. If you have PCI, say Y, otherwise N. | |
1222 | ||
52882173 AV |
1223 | config PCI_DOMAINS |
1224 | bool | |
1225 | depends on PCI | |
1226 | ||
b080ac8a MRJ |
1227 | config PCI_NANOENGINE |
1228 | bool "BSE nanoEngine PCI support" | |
1229 | depends on SA1100_NANOENGINE | |
1230 | help | |
1231 | Enable PCI on the BSE nanoEngine board. | |
1232 | ||
36e23590 MW |
1233 | config PCI_SYSCALL |
1234 | def_bool PCI | |
1235 | ||
1da177e4 LT |
1236 | # Select the host bridge type |
1237 | config PCI_HOST_VIA82C505 | |
1238 | bool | |
1239 | depends on PCI && ARCH_SHARK | |
1240 | default y | |
1241 | ||
a0113a99 MR |
1242 | config PCI_HOST_ITE8152 |
1243 | bool | |
1244 | depends on PCI && MACH_ARMCORE | |
1245 | default y | |
1246 | select DMABOUNCE | |
1247 | ||
1da177e4 LT |
1248 | source "drivers/pci/Kconfig" |
1249 | ||
1250 | source "drivers/pcmcia/Kconfig" | |
1251 | ||
1252 | endmenu | |
1253 | ||
1254 | menu "Kernel Features" | |
1255 | ||
0567a0c0 KH |
1256 | source "kernel/time/Kconfig" |
1257 | ||
1da177e4 LT |
1258 | config SMP |
1259 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
971acb9b | 1260 | depends on EXPERIMENTAL |
bc28248e | 1261 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1262 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf DW |
1263 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1264 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
e9d728f5 | 1265 | ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE |
f6dd9fa5 | 1266 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1267 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1268 | help |
1269 | This enables support for systems with more than one CPU. If you have | |
1270 | a system with only one CPU, like most personal computers, say N. If | |
1271 | you have a system with more than one CPU, say Y. | |
1272 | ||
1273 | If you say N here, the kernel will run on single and multiprocessor | |
1274 | machines, but will use only one CPU of a multiprocessor machine. If | |
1275 | you say Y here, the kernel will run on many, but not all, single | |
1276 | processor machines. On a single processor machine, the kernel will | |
1277 | run faster if you say N here. | |
1278 | ||
03502faa | 1279 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1280 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1281 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1282 | |
1283 | If you don't know what to do here, say N. | |
1284 | ||
f00ec48f RK |
1285 | config SMP_ON_UP |
1286 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1287 | depends on EXPERIMENTAL | |
4d2692a7 | 1288 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1289 | default y |
1290 | help | |
1291 | SMP kernels contain instructions which fail on non-SMP processors. | |
1292 | Enabling this option allows the kernel to modify itself to make | |
1293 | these instructions safe. Disabling it allows about 1K of space | |
1294 | savings. | |
1295 | ||
1296 | If you don't know what to do here, say Y. | |
1297 | ||
a8cbcd92 RK |
1298 | config HAVE_ARM_SCU |
1299 | bool | |
1300 | depends on SMP | |
1301 | help | |
1302 | This option enables support for the ARM system coherency unit | |
1303 | ||
f32f4ce2 RK |
1304 | config HAVE_ARM_TWD |
1305 | bool | |
1306 | depends on SMP | |
15095bb0 | 1307 | select TICK_ONESHOT |
f32f4ce2 RK |
1308 | help |
1309 | This options enables support for the ARM timer and watchdog unit | |
1310 | ||
8d5796d2 LB |
1311 | choice |
1312 | prompt "Memory split" | |
1313 | default VMSPLIT_3G | |
1314 | help | |
1315 | Select the desired split between kernel and user memory. | |
1316 | ||
1317 | If you are not absolutely sure what you are doing, leave this | |
1318 | option alone! | |
1319 | ||
1320 | config VMSPLIT_3G | |
1321 | bool "3G/1G user/kernel split" | |
1322 | config VMSPLIT_2G | |
1323 | bool "2G/2G user/kernel split" | |
1324 | config VMSPLIT_1G | |
1325 | bool "1G/3G user/kernel split" | |
1326 | endchoice | |
1327 | ||
1328 | config PAGE_OFFSET | |
1329 | hex | |
1330 | default 0x40000000 if VMSPLIT_1G | |
1331 | default 0x80000000 if VMSPLIT_2G | |
1332 | default 0xC0000000 | |
1333 | ||
1da177e4 LT |
1334 | config NR_CPUS |
1335 | int "Maximum number of CPUs (2-32)" | |
1336 | range 2 32 | |
1337 | depends on SMP | |
1338 | default "4" | |
1339 | ||
a054a811 RK |
1340 | config HOTPLUG_CPU |
1341 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1342 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
176bfc44 | 1343 | depends on !ARCH_MSM |
a054a811 RK |
1344 | help |
1345 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1346 | can be controlled through /sys/devices/system/cpu. | |
1347 | ||
37ee16ae RK |
1348 | config LOCAL_TIMERS |
1349 | bool "Use local timer interrupts" | |
971acb9b | 1350 | depends on SMP |
37ee16ae | 1351 | default y |
89c3dedf | 1352 | select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP |
37ee16ae RK |
1353 | help |
1354 | Enable support for local timers on SMP platforms, rather then the | |
1355 | legacy IPI broadcast method. Local timers allows the system | |
1356 | accounting to be spread across the timer interval, preventing a | |
1357 | "thundering herd" at every timer tick. | |
1358 | ||
d45a398f | 1359 | source kernel/Kconfig.preempt |
1da177e4 | 1360 | |
f8065813 RK |
1361 | config HZ |
1362 | int | |
49b7a491 | 1363 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
2192482e | 1364 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
bfe65704 | 1365 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1366 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1367 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1368 | default 100 |
1369 | ||
16c79651 | 1370 | config THUMB2_KERNEL |
4a50bfe3 | 1371 | bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" |
6e6fc998 | 1372 | depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL |
16c79651 CM |
1373 | select AEABI |
1374 | select ARM_ASM_UNIFIED | |
1375 | help | |
1376 | By enabling this option, the kernel will be compiled in | |
1377 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1378 | ARM-Thumb syntax is needed. | |
1379 | ||
1380 | If unsure, say N. | |
1381 | ||
0becb088 CM |
1382 | config ARM_ASM_UNIFIED |
1383 | bool | |
1384 | ||
704bdda0 NP |
1385 | config AEABI |
1386 | bool "Use the ARM EABI to compile the kernel" | |
1387 | help | |
1388 | This option allows for the kernel to be compiled using the latest | |
1389 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1390 | space environment that is also compiled with EABI. | |
1391 | ||
1392 | Since there are major incompatibilities between the legacy ABI and | |
1393 | EABI, especially with regard to structure member alignment, this | |
1394 | option also changes the kernel syscall calling convention to | |
1395 | disambiguate both ABIs and allow for backward compatibility support | |
1396 | (selected with CONFIG_OABI_COMPAT). | |
1397 | ||
1398 | To use this you need GCC version 4.0.0 or later. | |
1399 | ||
6c90c872 | 1400 | config OABI_COMPAT |
a73a3ff1 | 1401 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1402 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1403 | default y |
1404 | help | |
1405 | This option preserves the old syscall interface along with the | |
1406 | new (ARM EABI) one. It also provides a compatibility layer to | |
1407 | intercept syscalls that have structure arguments which layout | |
1408 | in memory differs between the legacy ABI and the new ARM EABI | |
1409 | (only for non "thumb" binaries). This option adds a tiny | |
1410 | overhead to all syscalls and produces a slightly larger kernel. | |
1411 | If you know you'll be using only pure EABI user space then you | |
1412 | can say N here. If this option is not selected and you attempt | |
1413 | to execute a legacy ABI binary then the result will be | |
1414 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1415 | at all). If in doubt say Y. | |
1416 | ||
eb33575c | 1417 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1418 | bool |
e80d6a24 | 1419 | |
05944d74 RK |
1420 | config ARCH_SPARSEMEM_ENABLE |
1421 | bool | |
1422 | ||
07a2f737 RK |
1423 | config ARCH_SPARSEMEM_DEFAULT |
1424 | def_bool ARCH_SPARSEMEM_ENABLE | |
1425 | ||
05944d74 | 1426 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1427 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1428 | |
053a96ca NP |
1429 | config HIGHMEM |
1430 | bool "High Memory Support (EXPERIMENTAL)" | |
1431 | depends on MMU && EXPERIMENTAL | |
1432 | help | |
1433 | The address space of ARM processors is only 4 Gigabytes large | |
1434 | and it has to accommodate user address space, kernel address | |
1435 | space as well as some memory mapped IO. That means that, if you | |
1436 | have a large amount of physical memory and/or IO, not all of the | |
1437 | memory can be "permanently mapped" by the kernel. The physical | |
1438 | memory that is not permanently mapped is called "high memory". | |
1439 | ||
1440 | Depending on the selected kernel/user memory split, minimum | |
1441 | vmalloc space and actual amount of RAM, you may not need this | |
1442 | option which should result in a slightly faster kernel. | |
1443 | ||
1444 | If unsure, say n. | |
1445 | ||
65cec8e3 RK |
1446 | config HIGHPTE |
1447 | bool "Allocate 2nd-level pagetables from highmem" | |
1448 | depends on HIGHMEM | |
1449 | depends on !OUTER_CACHE | |
1450 | ||
1b8873a0 JI |
1451 | config HW_PERF_EVENTS |
1452 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1453 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1454 | default y |
1455 | help | |
1456 | Enable hardware performance counter support for perf events. If | |
1457 | disabled, perf events will use software events only. | |
1458 | ||
3f22ab27 DH |
1459 | source "mm/Kconfig" |
1460 | ||
c1b2d970 MD |
1461 | config FORCE_MAX_ZONEORDER |
1462 | int "Maximum zone order" if ARCH_SHMOBILE | |
1463 | range 11 64 if ARCH_SHMOBILE | |
1464 | default "9" if SA1111 | |
1465 | default "11" | |
1466 | help | |
1467 | The kernel memory allocator divides physically contiguous memory | |
1468 | blocks into "zones", where each zone is a power of two number of | |
1469 | pages. This option selects the largest power of two that the kernel | |
1470 | keeps in the memory allocator. If you need to allocate very large | |
1471 | blocks of physically contiguous memory, then you may need to | |
1472 | increase this value. | |
1473 | ||
1474 | This config option is actually maximum order plus one. For example, | |
1475 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1476 | ||
1da177e4 LT |
1477 | config LEDS |
1478 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1479 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1480 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1481 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1482 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1483 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1484 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1485 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1486 | help |
1487 | If you say Y here, the LEDs on your machine will be used | |
1488 | to provide useful information about your current system status. | |
1489 | ||
1490 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1491 | be able to select which LEDs are active using the options below. If | |
1492 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1493 | red LED will simply flash regularly to indicate that the system is | |
1494 | still functional. It is safe to say Y here if you have a CATS | |
1495 | system, but the driver will do nothing. | |
1496 | ||
1497 | config LEDS_TIMER | |
1498 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1499 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1500 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1501 | depends on LEDS |
0567a0c0 | 1502 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1503 | default y if ARCH_EBSA110 |
1504 | help | |
1505 | If you say Y here, one of the system LEDs (the green one on the | |
1506 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1507 | will flash regularly to indicate that the system is still | |
1508 | operational. This is mainly useful to kernel hackers who are | |
1509 | debugging unstable kernels. | |
1510 | ||
1511 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1512 | functions. You may choose to use both, but the Timer LED function | |
1513 | will overrule the CPU usage LED. | |
1514 | ||
1515 | config LEDS_CPU | |
1516 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1517 | !ARCH_OMAP) \ |
1518 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1519 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1520 | depends on LEDS |
1521 | help | |
1522 | If you say Y here, the red LED will be used to give a good real | |
1523 | time indication of CPU usage, by lighting whenever the idle task | |
1524 | is not currently executing. | |
1525 | ||
1526 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1527 | functions. You may choose to use both, but the Timer LED function | |
1528 | will overrule the CPU usage LED. | |
1529 | ||
1530 | config ALIGNMENT_TRAP | |
1531 | bool | |
f12d0d7c | 1532 | depends on CPU_CP15_MMU |
1da177e4 | 1533 | default y if !ARCH_EBSA110 |
e119bfff | 1534 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1535 | help |
84eb8d06 | 1536 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1537 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1538 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1539 | fetch/store instructions will be emulated in software if you say | |
1540 | here, which has a severe performance impact. This is necessary for | |
1541 | correct operation of some network protocols. With an IP-only | |
1542 | configuration it is safe to say N, otherwise say Y. | |
1543 | ||
39ec58f3 LB |
1544 | config UACCESS_WITH_MEMCPY |
1545 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1546 | depends on MMU && EXPERIMENTAL | |
1547 | default y if CPU_FEROCEON | |
1548 | help | |
1549 | Implement faster copy_to_user and clear_user methods for CPU | |
1550 | cores where a 8-word STM instruction give significantly higher | |
1551 | memory write throughput than a sequence of individual 32bit stores. | |
1552 | ||
1553 | A possible side effect is a slight increase in scheduling latency | |
1554 | between threads sharing the same address space if they invoke | |
1555 | such copy operations with large buffers. | |
1556 | ||
1557 | However, if the CPU data cache is using a write-allocate mode, | |
1558 | this option is unlikely to provide any performance gain. | |
1559 | ||
70c70d97 NP |
1560 | config SECCOMP |
1561 | bool | |
1562 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1563 | ---help--- | |
1564 | This kernel feature is useful for number crunching applications | |
1565 | that may need to compute untrusted bytecode during their | |
1566 | execution. By using pipes or other transports made available to | |
1567 | the process as file descriptors supporting the read/write | |
1568 | syscalls, it's possible to isolate those applications in | |
1569 | their own address space using seccomp. Once seccomp is | |
1570 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1571 | and the task is only allowed to execute a few safe syscalls | |
1572 | defined by each seccomp mode. | |
1573 | ||
c743f380 NP |
1574 | config CC_STACKPROTECTOR |
1575 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1576 | depends on EXPERIMENTAL |
c743f380 NP |
1577 | help |
1578 | This option turns on the -fstack-protector GCC feature. This | |
1579 | feature puts, at the beginning of functions, a canary value on | |
1580 | the stack just before the return address, and validates | |
1581 | the value just before actually returning. Stack based buffer | |
1582 | overflows (that need to overwrite this return address) now also | |
1583 | overwrite the canary, which gets detected and the attack is then | |
1584 | neutralized via a kernel panic. | |
1585 | This feature requires gcc version 4.2 or above. | |
1586 | ||
73a65b3f UKK |
1587 | config DEPRECATED_PARAM_STRUCT |
1588 | bool "Provide old way to pass kernel parameters" | |
1589 | help | |
1590 | This was deprecated in 2001 and announced to live on for 5 years. | |
1591 | Some old boot loaders still use this way. | |
1592 | ||
1da177e4 LT |
1593 | endmenu |
1594 | ||
1595 | menu "Boot options" | |
1596 | ||
1597 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1598 | # TEXT and BSS so we preserve their values in the config files. | |
1599 | config ZBOOT_ROM_TEXT | |
1600 | hex "Compressed ROM boot loader base address" | |
1601 | default "0" | |
1602 | help | |
1603 | The physical address at which the ROM-able zImage is to be | |
1604 | placed in the target. Platforms which normally make use of | |
1605 | ROM-able zImage formats normally set this to a suitable | |
1606 | value in their defconfig file. | |
1607 | ||
1608 | If ZBOOT_ROM is not enabled, this has no effect. | |
1609 | ||
1610 | config ZBOOT_ROM_BSS | |
1611 | hex "Compressed ROM boot loader BSS address" | |
1612 | default "0" | |
1613 | help | |
f8c440b2 DF |
1614 | The base address of an area of read/write memory in the target |
1615 | for the ROM-able zImage which must be available while the | |
1616 | decompressor is running. It must be large enough to hold the | |
1617 | entire decompressed kernel plus an additional 128 KiB. | |
1618 | Platforms which normally make use of ROM-able zImage formats | |
1619 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1620 | |
1621 | If ZBOOT_ROM is not enabled, this has no effect. | |
1622 | ||
1623 | config ZBOOT_ROM | |
1624 | bool "Compressed boot loader in ROM/flash" | |
1625 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1626 | help | |
1627 | Say Y here if you intend to execute your compressed kernel image | |
1628 | (zImage) directly from ROM or flash. If unsure, say N. | |
1629 | ||
1630 | config CMDLINE | |
1631 | string "Default kernel command string" | |
1632 | default "" | |
1633 | help | |
1634 | On some architectures (EBSA110 and CATS), there is currently no way | |
1635 | for the boot loader to pass arguments to the kernel. For these | |
1636 | architectures, you should supply some command-line options at build | |
1637 | time by entering them here. As a minimum, you should specify the | |
1638 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1639 | ||
92d2040d AH |
1640 | config CMDLINE_FORCE |
1641 | bool "Always use the default kernel command string" | |
1642 | depends on CMDLINE != "" | |
1643 | help | |
1644 | Always use the default kernel command string, even if the boot | |
1645 | loader passes other arguments to the kernel. | |
1646 | This is useful if you cannot or don't want to change the | |
1647 | command-line options your boot loader passes to the kernel. | |
1648 | ||
1649 | If unsure, say N. | |
1650 | ||
1da177e4 LT |
1651 | config XIP_KERNEL |
1652 | bool "Kernel Execute-In-Place from ROM" | |
1653 | depends on !ZBOOT_ROM | |
1654 | help | |
1655 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1656 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1657 | space since the text section of the kernel is not loaded from flash | |
1658 | to RAM. Read-write sections, such as the data section and stack, | |
1659 | are still copied to RAM. The XIP kernel is not compressed since | |
1660 | it has to run directly from flash, so it will take more space to | |
1661 | store it. The flash address used to link the kernel object files, | |
1662 | and for storing it, is configuration dependent. Therefore, if you | |
1663 | say Y here, you must know the proper physical address where to | |
1664 | store the kernel image depending on your own flash memory usage. | |
1665 | ||
1666 | Also note that the make target becomes "make xipImage" rather than | |
1667 | "make zImage" or "make Image". The final kernel binary to put in | |
1668 | ROM memory will be arch/arm/boot/xipImage. | |
1669 | ||
1670 | If unsure, say N. | |
1671 | ||
1672 | config XIP_PHYS_ADDR | |
1673 | hex "XIP Kernel Physical Location" | |
1674 | depends on XIP_KERNEL | |
1675 | default "0x00080000" | |
1676 | help | |
1677 | This is the physical address in your flash memory the kernel will | |
1678 | be linked for and stored to. This address is dependent on your | |
1679 | own flash usage. | |
1680 | ||
c587e4a6 RP |
1681 | config KEXEC |
1682 | bool "Kexec system call (EXPERIMENTAL)" | |
1683 | depends on EXPERIMENTAL | |
1684 | help | |
1685 | kexec is a system call that implements the ability to shutdown your | |
1686 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1687 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1688 | you can start any kernel with it, not just Linux. |
1689 | ||
1690 | It is an ongoing process to be certain the hardware in a machine | |
1691 | is properly shutdown, so do not be surprised if this code does not | |
1692 | initially work for you. It may help to enable device hotplugging | |
1693 | support. | |
1694 | ||
4cd9d6f7 RP |
1695 | config ATAGS_PROC |
1696 | bool "Export atags in procfs" | |
b98d7291 UL |
1697 | depends on KEXEC |
1698 | default y | |
4cd9d6f7 RP |
1699 | help |
1700 | Should the atags used to boot the kernel be exported in an "atags" | |
1701 | file in procfs. Useful with kexec. | |
1702 | ||
cb5d39b3 MW |
1703 | config CRASH_DUMP |
1704 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
1705 | depends on EXPERIMENTAL | |
1706 | help | |
1707 | Generate crash dump after being started by kexec. This should | |
1708 | be normally only set in special crash dump kernels which are | |
1709 | loaded in the main kernel with kexec-tools into a specially | |
1710 | reserved region and then later executed after a crash by | |
1711 | kdump/kexec. The crash dump kernel must be compiled to a | |
1712 | memory address not used by the main kernel | |
1713 | ||
1714 | For more details see Documentation/kdump/kdump.txt | |
1715 | ||
e69edc79 EM |
1716 | config AUTO_ZRELADDR |
1717 | bool "Auto calculation of the decompressed kernel image address" | |
1718 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1719 | help | |
1720 | ZRELADDR is the physical address where the decompressed kernel | |
1721 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1722 | will be determined at run-time by masking the current IP with | |
1723 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1724 | from start of memory. | |
1725 | ||
1da177e4 LT |
1726 | endmenu |
1727 | ||
ac9d7efc | 1728 | menu "CPU Power Management" |
1da177e4 | 1729 | |
89c52ed4 | 1730 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1731 | |
1732 | source "drivers/cpufreq/Kconfig" | |
1733 | ||
64f102b6 YS |
1734 | config CPU_FREQ_IMX |
1735 | tristate "CPUfreq driver for i.MX CPUs" | |
1736 | depends on ARCH_MXC && CPU_FREQ | |
1737 | help | |
1738 | This enables the CPUfreq driver for i.MX CPUs. | |
1739 | ||
1da177e4 LT |
1740 | config CPU_FREQ_SA1100 |
1741 | bool | |
1da177e4 LT |
1742 | |
1743 | config CPU_FREQ_SA1110 | |
1744 | bool | |
1da177e4 LT |
1745 | |
1746 | config CPU_FREQ_INTEGRATOR | |
1747 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1748 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1749 | default y | |
1750 | help | |
1751 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1752 | ||
1753 | For details, take a look at <file:Documentation/cpu-freq>. | |
1754 | ||
1755 | If in doubt, say Y. | |
1756 | ||
9e2697ff RK |
1757 | config CPU_FREQ_PXA |
1758 | bool | |
1759 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1760 | default y | |
1761 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1762 | ||
b3748ddd MB |
1763 | config CPU_FREQ_S3C64XX |
1764 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1765 | depends on CPU_FREQ && CPU_S3C6410 | |
1766 | ||
9d56c02a BD |
1767 | config CPU_FREQ_S3C |
1768 | bool | |
1769 | help | |
1770 | Internal configuration node for common cpufreq on Samsung SoC | |
1771 | ||
1772 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 1773 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
9d56c02a BD |
1774 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL |
1775 | select CPU_FREQ_S3C | |
1776 | help | |
1777 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1778 | of CPUs. | |
1779 | ||
1780 | For details, take a look at <file:Documentation/cpu-freq>. | |
1781 | ||
1782 | If in doubt, say N. | |
1783 | ||
1784 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 1785 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
1786 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
1787 | help | |
1788 | Compile in support for changing the PLL frequency from the | |
1789 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1790 | after a frequency change, so by default it is not enabled. | |
1791 | ||
1792 | This also means that the PLL tables for the selected CPU(s) will | |
1793 | be built which may increase the size of the kernel image. | |
1794 | ||
1795 | config CPU_FREQ_S3C24XX_DEBUG | |
1796 | bool "Debug CPUfreq Samsung driver core" | |
1797 | depends on CPU_FREQ_S3C24XX | |
1798 | help | |
1799 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1800 | ||
1801 | config CPU_FREQ_S3C24XX_IODEBUG | |
1802 | bool "Debug CPUfreq Samsung driver IO timing" | |
1803 | depends on CPU_FREQ_S3C24XX | |
1804 | help | |
1805 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1806 | ||
e6d197a6 BD |
1807 | config CPU_FREQ_S3C24XX_DEBUGFS |
1808 | bool "Export debugfs for CPUFreq" | |
1809 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1810 | help | |
1811 | Export status information via debugfs. | |
1812 | ||
1da177e4 LT |
1813 | endif |
1814 | ||
ac9d7efc RK |
1815 | source "drivers/cpuidle/Kconfig" |
1816 | ||
1817 | endmenu | |
1818 | ||
1da177e4 LT |
1819 | menu "Floating point emulation" |
1820 | ||
1821 | comment "At least one emulation must be selected" | |
1822 | ||
1823 | config FPE_NWFPE | |
1824 | bool "NWFPE math emulation" | |
593c252a | 1825 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
1826 | ---help--- |
1827 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1828 | This is necessary to run most binaries. Linux does not currently | |
1829 | support floating point hardware so you need to say Y here even if | |
1830 | your machine has an FPA or floating point co-processor podule. | |
1831 | ||
1832 | You may say N here if you are going to load the Acorn FPEmulator | |
1833 | early in the bootup. | |
1834 | ||
1835 | config FPE_NWFPE_XP | |
1836 | bool "Support extended precision" | |
bedf142b | 1837 | depends on FPE_NWFPE |
1da177e4 LT |
1838 | help |
1839 | Say Y to include 80-bit support in the kernel floating-point | |
1840 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1841 | Note that gcc does not generate 80-bit operations by default, | |
1842 | so in most cases this option only enlarges the size of the | |
1843 | floating point emulator without any good reason. | |
1844 | ||
1845 | You almost surely want to say N here. | |
1846 | ||
1847 | config FPE_FASTFPE | |
1848 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1849 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1850 | ---help--- |
1851 | Say Y here to include the FAST floating point emulator in the kernel. | |
1852 | This is an experimental much faster emulator which now also has full | |
1853 | precision for the mantissa. It does not support any exceptions. | |
1854 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1855 | ||
1856 | It should be sufficient for most programs. It may be not suitable | |
1857 | for scientific calculations, but you have to check this for yourself. | |
1858 | If you do not feel you need a faster FP emulation you should better | |
1859 | choose NWFPE. | |
1860 | ||
1861 | config VFP | |
1862 | bool "VFP-format floating point maths" | |
c00d4ffd | 1863 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1864 | help |
1865 | Say Y to include VFP support code in the kernel. This is needed | |
1866 | if your hardware includes a VFP unit. | |
1867 | ||
1868 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1869 | release notes and additional status information. | |
1870 | ||
1871 | Say N if your target does not have VFP hardware. | |
1872 | ||
25ebee02 CM |
1873 | config VFPv3 |
1874 | bool | |
1875 | depends on VFP | |
1876 | default y if CPU_V7 | |
1877 | ||
b5872db4 CM |
1878 | config NEON |
1879 | bool "Advanced SIMD (NEON) Extension support" | |
1880 | depends on VFPv3 && CPU_V7 | |
1881 | help | |
1882 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1883 | Extension. | |
1884 | ||
1da177e4 LT |
1885 | endmenu |
1886 | ||
1887 | menu "Userspace binary formats" | |
1888 | ||
1889 | source "fs/Kconfig.binfmt" | |
1890 | ||
1891 | config ARTHUR | |
1892 | tristate "RISC OS personality" | |
704bdda0 | 1893 | depends on !AEABI |
1da177e4 LT |
1894 | help |
1895 | Say Y here to include the kernel code necessary if you want to run | |
1896 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1897 | experimental; if this sounds frightening, say N and sleep in peace. | |
1898 | You can also say M here to compile this support as a module (which | |
1899 | will be called arthur). | |
1900 | ||
1901 | endmenu | |
1902 | ||
1903 | menu "Power management options" | |
1904 | ||
eceab4ac | 1905 | source "kernel/power/Kconfig" |
1da177e4 | 1906 | |
f4cb5700 JB |
1907 | config ARCH_SUSPEND_POSSIBLE |
1908 | def_bool y | |
1909 | ||
1da177e4 LT |
1910 | endmenu |
1911 | ||
d5950b43 SR |
1912 | source "net/Kconfig" |
1913 | ||
ac25150f | 1914 | source "drivers/Kconfig" |
1da177e4 LT |
1915 | |
1916 | source "fs/Kconfig" | |
1917 | ||
1da177e4 LT |
1918 | source "arch/arm/Kconfig.debug" |
1919 | ||
1920 | source "security/Kconfig" | |
1921 | ||
1922 | source "crypto/Kconfig" | |
1923 | ||
1924 | source "lib/Kconfig" |