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ARM: versatile: switch Versatile to use consolidated CLCD
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1da177e4
LT
1config ARM
2 bool
3 default y
e17c6d56 4 select HAVE_AOUT
24056f52 5 select HAVE_DMA_API_DEBUG
2064c946 6 select HAVE_IDE
2778f620 7 select HAVE_MEMBLOCK
12b824fb 8 select RTC_LIB
75e7153a 9 select SYS_SUPPORTS_APM_EMULATION
d4c7b1f9 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
fe166148 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
5cbad0eb 12 select HAVE_ARCH_KGDB
ed7c84d5 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
9edddaa2 14 select HAVE_KRETPROBES if (HAVE_KPROBES)
606576ce 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
80be7a7f
RV
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
0e341af8 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
1fe53268 19 select HAVE_GENERIC_DMA_COHERENT
e7db7b42
AT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
6e8699f7 22 select HAVE_KERNEL_LZMA
e360adbe 23 select HAVE_IRQ_WORK
7ada189f
JI
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
e513f8bf 26 select HAVE_REGS_AND_STACK_ACCESS_API
19852e59 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
ed60453f 28 select HAVE_C_RECORDMCOUNT
e2a93ecc
LB
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
1da177e4
LT
31 help
32 The ARM series is a line of low-power-consumption RISC chip designs
f6c8965a 33 licensed by ARM Ltd and targeted at embedded applications and
1da177e4 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
f6c8965a 35 manufactured, but legacy ARM-based PC hardware remains popular in
1da177e4
LT
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
38
1a189b97
RK
39config HAVE_PWM
40 bool
41
0b05da72
HUK
42config MIGHT_HAVE_PCI
43 bool
44
75e7153a
RB
45config SYS_SUPPORTS_APM_EMULATION
46 bool
47
112f38a4
RK
48config HAVE_SCHED_CLOCK
49 bool
50
0a938b97
DB
51config GENERIC_GPIO
52 bool
0a938b97 53
5cfc8ee0
JS
54config ARCH_USES_GETTIMEOFFSET
55 bool
56 default n
746140c7 57
0567a0c0
KH
58config GENERIC_CLOCKEVENTS
59 bool
0567a0c0 60
a8655e83
CM
61config GENERIC_CLOCKEVENTS_BROADCAST
62 bool
63 depends on GENERIC_CLOCKEVENTS
5388a6b2 64 default y if SMP
a8655e83 65
bc581770
LW
66config HAVE_TCM
67 bool
68 select GENERIC_ALLOCATOR
69
e119bfff
RK
70config HAVE_PROC_CPU
71 bool
72
5ea81769
AV
73config NO_IOPORT
74 bool
5ea81769 75
1da177e4
LT
76config EISA
77 bool
78 ---help---
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
81
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
86
87 Say Y here if you are building a kernel for an EISA-based machine.
88
89 Otherwise, say N.
90
91config SBUS
92 bool
93
94config MCA
95 bool
96 help
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
101
f16fb1ec
RK
102config STACKTRACE_SUPPORT
103 bool
104 default y
105
f76e9154
NP
106config HAVE_LATENCYTOP_SUPPORT
107 bool
108 depends on !SMP
109 default y
110
f16fb1ec
RK
111config LOCKDEP_SUPPORT
112 bool
113 default y
114
7ad1bcb2
RK
115config TRACE_IRQFLAGS_SUPPORT
116 bool
117 default y
118
4a2581a0
TG
119config HARDIRQS_SW_RESEND
120 bool
121 default y
122
123config GENERIC_IRQ_PROBE
124 bool
125 default y
126
95c354fe
NP
127config GENERIC_LOCKBREAK
128 bool
129 default y
130 depends on SMP && PREEMPT
131
1da177e4
LT
132config RWSEM_GENERIC_SPINLOCK
133 bool
134 default y
135
136config RWSEM_XCHGADD_ALGORITHM
137 bool
138
f0d1b0b3
DH
139config ARCH_HAS_ILOG2_U32
140 bool
f0d1b0b3
DH
141
142config ARCH_HAS_ILOG2_U64
143 bool
f0d1b0b3 144
89c52ed4
BD
145config ARCH_HAS_CPUFREQ
146 bool
147 help
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
150 it.
151
c7b0aff4
KH
152config ARCH_HAS_CPU_IDLE_WAIT
153 def_bool y
154
b89c3b16
AM
155config GENERIC_HWEIGHT
156 bool
157 default y
158
1da177e4
LT
159config GENERIC_CALIBRATE_DELAY
160 bool
161 default y
162
a08b6b79
AV
163config ARCH_MAY_HAVE_PC_FDC
164 bool
165
5ac6da66
CL
166config ZONE_DMA
167 bool
5ac6da66 168
ccd7ab7f
FT
169config NEED_DMA_MAP_STATE
170 def_bool y
171
1da177e4
LT
172config GENERIC_ISA_DMA
173 bool
174
1da177e4
LT
175config FIQ
176 bool
177
034d2f5a
AV
178config ARCH_MTD_XIP
179 bool
180
d6d502fa
KK
181config ARM_L1_CACHE_SHIFT_6
182 bool
183 help
184 Setting ARM L1 cache line size to 64 Bytes.
185
c760fc19
HC
186config VECTORS_BASE
187 hex
6afd6fae 188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
c760fc19
HC
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
190 default 0x00000000
191 help
192 The base address of exception vectors.
193
1da177e4
LT
194source "init/Kconfig"
195
dc52ddc0
MH
196source "kernel/Kconfig.freezer"
197
1da177e4
LT
198menu "System Type"
199
3c427975
HC
200config MMU
201 bool "MMU-based Paged Memory Management Support"
202 default y
203 help
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
206
ccf50e23
RK
207#
208# The "ARM system type" choice list is ordered alphabetically by option
209# text. Please add new entries in the option alphabetic order.
210#
1da177e4
LT
211choice
212 prompt "ARM system type"
6a0e2430 213 default ARCH_VERSATILE
1da177e4 214
4af6fee1
DS
215config ARCH_AAEC2000
216 bool "Agilent AAEC-2000 based"
c750815e 217 select CPU_ARM920T
4af6fee1 218 select ARM_AMBA
9483a578 219 select HAVE_CLK
5cfc8ee0 220 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
221 help
222 This enables support for systems based on the Agilent AAEC-2000
223
224config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
226 select ARM_AMBA
89c52ed4 227 select ARCH_HAS_CPUFREQ
6d803ba7 228 select CLKDEV_LOOKUP
c5a0adb5 229 select ICST
13edd86d 230 select GENERIC_CLOCKEVENTS
f4b8b319 231 select PLAT_VERSATILE
4af6fee1
DS
232 help
233 Support for ARM's Integrator platform.
234
235config ARCH_REALVIEW
236 bool "ARM Ltd. RealView family"
237 select ARM_AMBA
6d803ba7 238 select CLKDEV_LOOKUP
1da0c89c 239 select HAVE_SCHED_CLOCK
c5a0adb5 240 select ICST
ae30ceac 241 select GENERIC_CLOCKEVENTS
eb7fffa3 242 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 243 select PLAT_VERSATILE
e3887714 244 select ARM_TIMER_SP804
b56ba8aa 245 select GPIO_PL061 if GPIOLIB
4af6fee1
DS
246 help
247 This enables support for ARM Ltd RealView boards.
248
249config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
251 select ARM_AMBA
252 select ARM_VIC
6d803ba7 253 select CLKDEV_LOOKUP
1da0c89c 254 select HAVE_SCHED_CLOCK
c5a0adb5 255 select ICST
89df1272 256 select GENERIC_CLOCKEVENTS
bbeddc43 257 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 258 select PLAT_VERSATILE
3414ba8c 259 select PLAT_VERSATILE_CLCD
e3887714 260 select ARM_TIMER_SP804
4af6fee1
DS
261 help
262 This enables support for ARM Ltd Versatile board.
263
ceade897
RK
264config ARCH_VEXPRESS
265 bool "ARM Ltd. Versatile Express family"
266 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_AMBA
268 select ARM_TIMER_SP804
6d803ba7 269 select CLKDEV_LOOKUP
ceade897 270 select GENERIC_CLOCKEVENTS
ceade897 271 select HAVE_CLK
0af85dda 272 select HAVE_SCHED_CLOCK
95c34f83 273 select HAVE_PATA_PLATFORM
ceade897
RK
274 select ICST
275 select PLAT_VERSATILE
276 help
277 This enables support for the ARM Ltd Versatile Express boards.
278
8fc5ffa0
AV
279config ARCH_AT91
280 bool "Atmel AT91"
f373e8c0 281 select ARCH_REQUIRE_GPIOLIB
93686ae8 282 select HAVE_CLK
4af6fee1 283 help
2b3b3516
AV
284 This enables support for systems based on the Atmel AT91RM9200,
285 AT91SAM9 and AT91CAP9 processors.
4af6fee1 286
ccf50e23
RK
287config ARCH_BCMRING
288 bool "Broadcom BCMRING"
289 depends on MMU
290 select CPU_V6
291 select ARM_AMBA
6d803ba7 292 select CLKDEV_LOOKUP
ccf50e23
RK
293 select GENERIC_CLOCKEVENTS
294 select ARCH_WANT_OPTIONAL_GPIOLIB
295 help
296 Support for Broadcom's BCMRing platform.
297
1da177e4 298config ARCH_CLPS711X
4af6fee1 299 bool "Cirrus Logic CLPS711x/EP721x-based"
c750815e 300 select CPU_ARM720T
5cfc8ee0 301 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
302 help
303 Support for Cirrus Logic 711x/721x based boards.
1da177e4 304
d94f944e
AV
305config ARCH_CNS3XXX
306 bool "Cavium Networks CNS3XXX family"
307 select CPU_V6
d94f944e
AV
308 select GENERIC_CLOCKEVENTS
309 select ARM_GIC
0b05da72 310 select MIGHT_HAVE_PCI
5f32f7a0 311 select PCI_DOMAINS if PCI
d94f944e
AV
312 help
313 Support for Cavium Networks CNS3XXX platform.
314
788c9700
RK
315config ARCH_GEMINI
316 bool "Cortina Systems Gemini"
317 select CPU_FA526
788c9700 318 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 319 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
320 help
321 Support for the Cortina Systems Gemini family SoCs
322
1da177e4
LT
323config ARCH_EBSA110
324 bool "EBSA-110"
c750815e 325 select CPU_SA110
f7e68bbf 326 select ISA
c5eb2a2b 327 select NO_IOPORT
5cfc8ee0 328 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
329 help
330 This is an evaluation board for the StrongARM processor available
f6c8965a 331 from Digital. It has limited hardware on-board, including an
1da177e4
LT
332 Ethernet interface, two PCMCIA sockets, two serial ports and a
333 parallel port.
334
e7736d47
LB
335config ARCH_EP93XX
336 bool "EP93xx-based"
c750815e 337 select CPU_ARM920T
e7736d47
LB
338 select ARM_AMBA
339 select ARM_VIC
6d803ba7 340 select CLKDEV_LOOKUP
7444a72e 341 select ARCH_REQUIRE_GPIOLIB
eb33575c 342 select ARCH_HAS_HOLES_MEMORYMODEL
5cfc8ee0 343 select ARCH_USES_GETTIMEOFFSET
e7736d47
LB
344 help
345 This enables support for the Cirrus EP93xx series of CPUs.
346
1da177e4
LT
347config ARCH_FOOTBRIDGE
348 bool "FootBridge"
c750815e 349 select CPU_SA110
1da177e4 350 select FOOTBRIDGE
5cfc8ee0 351 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
352 help
353 Support for systems based on the DC21285 companion chip
354 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
1da177e4 355
788c9700
RK
356config ARCH_MXC
357 bool "Freescale MXC/iMX-based"
788c9700 358 select GENERIC_CLOCKEVENTS
788c9700 359 select ARCH_REQUIRE_GPIOLIB
6d803ba7 360 select CLKDEV_LOOKUP
788c9700
RK
361 help
362 Support for Freescale MXC/iMX-based family of processors
363
1d3f33d5
SG
364config ARCH_MXS
365 bool "Freescale MXS-based"
366 select GENERIC_CLOCKEVENTS
367 select ARCH_REQUIRE_GPIOLIB
b9214b97 368 select CLKDEV_LOOKUP
1d3f33d5
SG
369 help
370 Support for Freescale MXS-based family of processors
371
7bd0f2f5 372config ARCH_STMP3XXX
373 bool "Freescale STMP3xxx"
374 select CPU_ARM926T
6d803ba7 375 select CLKDEV_LOOKUP
7bd0f2f5 376 select ARCH_REQUIRE_GPIOLIB
7bd0f2f5 377 select GENERIC_CLOCKEVENTS
7bd0f2f5 378 select USB_ARCH_HAS_EHCI
379 help
380 Support for systems based on the Freescale 3xxx CPUs.
381
4af6fee1
DS
382config ARCH_NETX
383 bool "Hilscher NetX based"
c750815e 384 select CPU_ARM926T
4af6fee1 385 select ARM_VIC
2fcfe6b8 386 select GENERIC_CLOCKEVENTS
f999b8bd 387 help
4af6fee1
DS
388 This enables support for systems based on the Hilscher NetX Soc
389
390config ARCH_H720X
391 bool "Hynix HMS720x-based"
c750815e 392 select CPU_ARM720T
4af6fee1 393 select ISA_DMA_API
5cfc8ee0 394 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
395 help
396 This enables support for systems based on the Hynix HMS720x
397
3b938be6
RK
398config ARCH_IOP13XX
399 bool "IOP13xx-based"
400 depends on MMU
c750815e 401 select CPU_XSC3
3b938be6
RK
402 select PLAT_IOP
403 select PCI
404 select ARCH_SUPPORTS_MSI
8d5796d2 405 select VMSPLIT_1G
3b938be6
RK
406 help
407 Support for Intel's IOP13XX (XScale) family of processors.
408
3f7e5815
LB
409config ARCH_IOP32X
410 bool "IOP32x-based"
a4f7e763 411 depends on MMU
c750815e 412 select CPU_XSCALE
7ae1f7ec 413 select PLAT_IOP
f7e68bbf 414 select PCI
bb2b180c 415 select ARCH_REQUIRE_GPIOLIB
f999b8bd 416 help
3f7e5815
LB
417 Support for Intel's 80219 and IOP32X (XScale) family of
418 processors.
419
420config ARCH_IOP33X
421 bool "IOP33x-based"
422 depends on MMU
c750815e 423 select CPU_XSCALE
7ae1f7ec 424 select PLAT_IOP
3f7e5815 425 select PCI
bb2b180c 426 select ARCH_REQUIRE_GPIOLIB
3f7e5815
LB
427 help
428 Support for Intel's IOP33X (XScale) family of processors.
1da177e4 429
3b938be6
RK
430config ARCH_IXP23XX
431 bool "IXP23XX-based"
a4f7e763 432 depends on MMU
c750815e 433 select CPU_XSC3
3b938be6 434 select PCI
5cfc8ee0 435 select ARCH_USES_GETTIMEOFFSET
f999b8bd 436 help
3b938be6 437 Support for Intel's IXP23xx (XScale) family of processors.
1da177e4
LT
438
439config ARCH_IXP2000
440 bool "IXP2400/2800-based"
a4f7e763 441 depends on MMU
c750815e 442 select CPU_XSCALE
f7e68bbf 443 select PCI
5cfc8ee0 444 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
445 help
446 Support for Intel's IXP2400/2800 (XScale) family of processors.
1da177e4 447
3b938be6
RK
448config ARCH_IXP4XX
449 bool "IXP4xx-based"
a4f7e763 450 depends on MMU
c750815e 451 select CPU_XSCALE
8858e9af 452 select GENERIC_GPIO
3b938be6 453 select GENERIC_CLOCKEVENTS
5b0d495c 454 select HAVE_SCHED_CLOCK
0b05da72 455 select MIGHT_HAVE_PCI
485bdde7 456 select DMABOUNCE if PCI
c4713074 457 help
3b938be6 458 Support for Intel's IXP4XX (XScale) family of processors.
c4713074 459
edabd38e
SB
460config ARCH_DOVE
461 bool "Marvell Dove"
462 select PCI
edabd38e 463 select ARCH_REQUIRE_GPIOLIB
edabd38e
SB
464 select GENERIC_CLOCKEVENTS
465 select PLAT_ORION
466 help
467 Support for the Marvell Dove SoC 88AP510
468
651c74c7
SB
469config ARCH_KIRKWOOD
470 bool "Marvell Kirkwood"
c750815e 471 select CPU_FEROCEON
651c74c7 472 select PCI
a8865655 473 select ARCH_REQUIRE_GPIOLIB
651c74c7
SB
474 select GENERIC_CLOCKEVENTS
475 select PLAT_ORION
476 help
477 Support for the following Marvell Kirkwood series SoCs:
478 88F6180, 88F6192 and 88F6281.
479
777f9beb
LB
480config ARCH_LOKI
481 bool "Marvell Loki (88RC8480)"
c750815e 482 select CPU_FEROCEON
777f9beb
LB
483 select GENERIC_CLOCKEVENTS
484 select PLAT_ORION
485 help
486 Support for the Marvell Loki (88RC8480) SoC.
487
40805949
KW
488config ARCH_LPC32XX
489 bool "NXP LPC32XX"
490 select CPU_ARM926T
491 select ARCH_REQUIRE_GPIOLIB
492 select HAVE_IDE
493 select ARM_AMBA
494 select USB_ARCH_HAS_OHCI
6d803ba7 495 select CLKDEV_LOOKUP
40805949
KW
496 select GENERIC_TIME
497 select GENERIC_CLOCKEVENTS
498 help
499 Support for the NXP LPC32XX family of processors
500
794d15b2
SS
501config ARCH_MV78XX0
502 bool "Marvell MV78xx0"
c750815e 503 select CPU_FEROCEON
794d15b2 504 select PCI
a8865655 505 select ARCH_REQUIRE_GPIOLIB
794d15b2
SS
506 select GENERIC_CLOCKEVENTS
507 select PLAT_ORION
508 help
509 Support for the following Marvell MV78xx0 series SoCs:
510 MV781x0, MV782x0.
511
9dd0b194 512config ARCH_ORION5X
585cf175
TP
513 bool "Marvell Orion"
514 depends on MMU
c750815e 515 select CPU_FEROCEON
038ee083 516 select PCI
a8865655 517 select ARCH_REQUIRE_GPIOLIB
51cbff1d 518 select GENERIC_CLOCKEVENTS
69b02f6a 519 select PLAT_ORION
585cf175 520 help
9dd0b194 521 Support for the following Marvell Orion 5x series SoCs:
d2b2a6bb 522 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
d323ade1 523 Orion-2 (5281), Orion-1-90 (6183).
585cf175 524
788c9700 525config ARCH_MMP
2f7e8fae 526 bool "Marvell PXA168/910/MMP2"
788c9700 527 depends on MMU
788c9700 528 select ARCH_REQUIRE_GPIOLIB
6d803ba7 529 select CLKDEV_LOOKUP
788c9700 530 select GENERIC_CLOCKEVENTS
28bb7bc6 531 select HAVE_SCHED_CLOCK
788c9700
RK
532 select TICK_ONESHOT
533 select PLAT_PXA
0bd86961 534 select SPARSE_IRQ
788c9700 535 help
2f7e8fae 536 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
788c9700
RK
537
538config ARCH_KS8695
539 bool "Micrel/Kendin KS8695"
540 select CPU_ARM922T
98830bc9 541 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 542 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
543 help
544 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
545 System-on-Chip devices.
546
547config ARCH_NS9XXX
548 bool "NetSilicon NS9xxx"
549 select CPU_ARM926T
550 select GENERIC_GPIO
788c9700
RK
551 select GENERIC_CLOCKEVENTS
552 select HAVE_CLK
553 help
554 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
555 System.
556
557 <http://www.digi.com/products/microprocessors/index.jsp>
558
559config ARCH_W90X900
560 bool "Nuvoton W90X900 CPU"
561 select CPU_ARM926T
c52d3d68 562 select ARCH_REQUIRE_GPIOLIB
6d803ba7 563 select CLKDEV_LOOKUP
58b5369e 564 select GENERIC_CLOCKEVENTS
788c9700 565 help
a8bc4ead 566 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
567 At present, the w90x900 has been renamed nuc900, regarding
568 the ARM series product line, you can login the following
569 link address to know more.
570
571 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
572 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
788c9700 573
a62e9030 574config ARCH_NUC93X
575 bool "Nuvoton NUC93X CPU"
576 select CPU_ARM926T
6d803ba7 577 select CLKDEV_LOOKUP
a62e9030 578 help
579 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
580 low-power and high performance MPEG-4/JPEG multimedia controller chip.
581
c5f80065
EG
582config ARCH_TEGRA
583 bool "NVIDIA Tegra"
4073723a 584 select CLKDEV_LOOKUP
c5f80065
EG
585 select GENERIC_TIME
586 select GENERIC_CLOCKEVENTS
587 select GENERIC_GPIO
588 select HAVE_CLK
e3f4c0ab 589 select HAVE_SCHED_CLOCK
c5f80065 590 select ARCH_HAS_BARRIERS if CACHE_L2X0
7056d423 591 select ARCH_HAS_CPUFREQ
c5f80065
EG
592 help
593 This enables support for NVIDIA Tegra based systems (Tegra APX,
594 Tegra 6xx and Tegra 2 series).
595
4af6fee1
DS
596config ARCH_PNX4008
597 bool "Philips Nexperia PNX4008 Mobile"
c750815e 598 select CPU_ARM926T
6d803ba7 599 select CLKDEV_LOOKUP
5cfc8ee0 600 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
601 help
602 This enables support for Philips PNX4008 mobile platform.
603
1da177e4 604config ARCH_PXA
2c8086a5 605 bool "PXA2xx/PXA3xx-based"
a4f7e763 606 depends on MMU
034d2f5a 607 select ARCH_MTD_XIP
89c52ed4 608 select ARCH_HAS_CPUFREQ
6d803ba7 609 select CLKDEV_LOOKUP
7444a72e 610 select ARCH_REQUIRE_GPIOLIB
981d0f39 611 select GENERIC_CLOCKEVENTS
7ce83018 612 select HAVE_SCHED_CLOCK
a88264c2 613 select TICK_ONESHOT
bd5ce433 614 select PLAT_PXA
6ac6b817 615 select SPARSE_IRQ
f999b8bd 616 help
2c8086a5 617 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
1da177e4 618
788c9700
RK
619config ARCH_MSM
620 bool "Qualcomm MSM"
4b536b8d 621 select HAVE_CLK
49cbe786 622 select GENERIC_CLOCKEVENTS
923a081c 623 select ARCH_REQUIRE_GPIOLIB
49cbe786 624 help
4b53eb4f
DW
625 Support for Qualcomm MSM/QSD based systems. This runs on the
626 apps processor of the MSM/QSD and depends on a shared memory
627 interface to the modem processor which runs the baseband
628 stack and controls some vital subsystems
629 (clock and power control, etc).
49cbe786 630
c793c1b0 631config ARCH_SHMOBILE
6d72ad35
PM
632 bool "Renesas SH-Mobile / R-Mobile"
633 select HAVE_CLK
5e93c6b4 634 select CLKDEV_LOOKUP
6d72ad35
PM
635 select GENERIC_CLOCKEVENTS
636 select NO_IOPORT
637 select SPARSE_IRQ
60f1435c 638 select MULTI_IRQ_HANDLER
c793c1b0 639 help
6d72ad35 640 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
c793c1b0 641
1da177e4
LT
642config ARCH_RPC
643 bool "RiscPC"
644 select ARCH_ACORN
645 select FIQ
646 select TIMER_ACORN
a08b6b79 647 select ARCH_MAY_HAVE_PC_FDC
341eb781 648 select HAVE_PATA_PLATFORM
065909b9 649 select ISA_DMA_API
5ea81769 650 select NO_IOPORT
07f841b7 651 select ARCH_SPARSEMEM_ENABLE
5cfc8ee0 652 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
653 help
654 On the Acorn Risc-PC, Linux can support the internal IDE disk and
655 CD-ROM interface, serial and parallel port, and the floppy drive.
656
657config ARCH_SA1100
658 bool "SA1100-based"
c750815e 659 select CPU_SA1100
f7e68bbf 660 select ISA
05944d74 661 select ARCH_SPARSEMEM_ENABLE
034d2f5a 662 select ARCH_MTD_XIP
89c52ed4 663 select ARCH_HAS_CPUFREQ
1937f5b9 664 select CPU_FREQ
3e238be2 665 select GENERIC_CLOCKEVENTS
9483a578 666 select HAVE_CLK
5094b92f 667 select HAVE_SCHED_CLOCK
3e238be2 668 select TICK_ONESHOT
7444a72e 669 select ARCH_REQUIRE_GPIOLIB
f999b8bd
MM
670 help
671 Support for StrongARM 11x0 based boards.
1da177e4
LT
672
673config ARCH_S3C2410
63b1f51b 674 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
0a938b97 675 select GENERIC_GPIO
9d56c02a 676 select ARCH_HAS_CPUFREQ
9483a578 677 select HAVE_CLK
5cfc8ee0 678 select ARCH_USES_GETTIMEOFFSET
20676c15 679 select HAVE_S3C2410_I2C if I2C
1da177e4
LT
680 help
681 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
682 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
f6c8965a 683 the Samsung SMDK2410 development board (and derivatives).
1da177e4 684
63b1f51b
BD
685 Note, the S3C2416 and the S3C2450 are so close that they even share
686 the same SoC ID code. This means that there is no seperate machine
687 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
688
a08ab637
BD
689config ARCH_S3C64XX
690 bool "Samsung S3C64XX"
89f1fa08 691 select PLAT_SAMSUNG
89f0ce72 692 select CPU_V6
89f0ce72 693 select ARM_VIC
a08ab637 694 select HAVE_CLK
89f0ce72 695 select NO_IOPORT
5cfc8ee0 696 select ARCH_USES_GETTIMEOFFSET
89c52ed4 697 select ARCH_HAS_CPUFREQ
89f0ce72
BD
698 select ARCH_REQUIRE_GPIOLIB
699 select SAMSUNG_CLKSRC
700 select SAMSUNG_IRQ_VIC_TIMER
701 select SAMSUNG_IRQ_UART
702 select S3C_GPIO_TRACK
703 select S3C_GPIO_PULL_UPDOWN
704 select S3C_GPIO_CFG_S3C24XX
705 select S3C_GPIO_CFG_S3C64XX
706 select S3C_DEV_NAND
707 select USB_ARCH_HAS_OHCI
708 select SAMSUNG_GPIOLIB_4BIT
20676c15 709 select HAVE_S3C2410_I2C if I2C
c39d8d55 710 select HAVE_S3C2410_WATCHDOG if WATCHDOG
a08ab637
BD
711 help
712 Samsung S3C64XX series based systems
713
49b7a491
KK
714config ARCH_S5P64X0
715 bool "Samsung S5P6440 S5P6450"
c4ffccdd
KK
716 select CPU_V6
717 select GENERIC_GPIO
718 select HAVE_CLK
c39d8d55 719 select HAVE_S3C2410_WATCHDOG if WATCHDOG
925c68cd 720 select ARCH_USES_GETTIMEOFFSET
20676c15 721 select HAVE_S3C2410_I2C if I2C
754961a8 722 select HAVE_S3C_RTC if RTC_CLASS
c4ffccdd 723 help
49b7a491
KK
724 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
725 SMDK6450.
c4ffccdd 726
550db7f1
KK
727config ARCH_S5P6442
728 bool "Samsung S5P6442"
729 select CPU_V6
730 select GENERIC_GPIO
731 select HAVE_CLK
925c68cd 732 select ARCH_USES_GETTIMEOFFSET
c39d8d55 733 select HAVE_S3C2410_WATCHDOG if WATCHDOG
550db7f1
KK
734 help
735 Samsung S5P6442 CPU based systems
736
acc84707
MS
737config ARCH_S5PC100
738 bool "Samsung S5PC100"
5a7652f2
BM
739 select GENERIC_GPIO
740 select HAVE_CLK
741 select CPU_V7
d6d502fa 742 select ARM_L1_CACHE_SHIFT_6
925c68cd 743 select ARCH_USES_GETTIMEOFFSET
20676c15 744 select HAVE_S3C2410_I2C if I2C
754961a8 745 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 746 select HAVE_S3C2410_WATCHDOG if WATCHDOG
5a7652f2 747 help
acc84707 748 Samsung S5PC100 series based systems
5a7652f2 749
170f4e42
KK
750config ARCH_S5PV210
751 bool "Samsung S5PV210/S5PC110"
752 select CPU_V7
eecb6a84 753 select ARCH_SPARSEMEM_ENABLE
170f4e42
KK
754 select GENERIC_GPIO
755 select HAVE_CLK
756 select ARM_L1_CACHE_SHIFT_6
d8144aea 757 select ARCH_HAS_CPUFREQ
925c68cd 758 select ARCH_USES_GETTIMEOFFSET
20676c15 759 select HAVE_S3C2410_I2C if I2C
754961a8 760 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 761 select HAVE_S3C2410_WATCHDOG if WATCHDOG
170f4e42
KK
762 help
763 Samsung S5PV210/S5PC110 series based systems
764
cc0e72b8
CY
765config ARCH_S5PV310
766 bool "Samsung S5PV310/S5PC210"
767 select CPU_V7
f567fa6f 768 select ARCH_SPARSEMEM_ENABLE
cc0e72b8
CY
769 select GENERIC_GPIO
770 select HAVE_CLK
b333fb16 771 select ARCH_HAS_CPUFREQ
cc0e72b8 772 select GENERIC_CLOCKEVENTS
754961a8 773 select HAVE_S3C_RTC if RTC_CLASS
20676c15 774 select HAVE_S3C2410_I2C if I2C
c39d8d55 775 select HAVE_S3C2410_WATCHDOG if WATCHDOG
cc0e72b8
CY
776 help
777 Samsung S5PV310 series based systems
778
1da177e4
LT
779config ARCH_SHARK
780 bool "Shark"
c750815e 781 select CPU_SA110
f7e68bbf
RK
782 select ISA
783 select ISA_DMA
3bca103a 784 select ZONE_DMA
f7e68bbf 785 select PCI
5cfc8ee0 786 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
787 help
788 Support for the StrongARM based Digital DNARD machine, also known
789 as "Shark" (<http://www.shark-linux.de/shark.html>).
1da177e4 790
83ef3338
HK
791config ARCH_TCC_926
792 bool "Telechips TCC ARM926-based systems"
793 select CPU_ARM926T
794 select HAVE_CLK
6d803ba7 795 select CLKDEV_LOOKUP
83ef3338
HK
796 select GENERIC_CLOCKEVENTS
797 help
798 Support for Telechips TCC ARM926-based systems.
799
1da177e4
LT
800config ARCH_LH7A40X
801 bool "Sharp LH7A40X"
c750815e 802 select CPU_ARM922T
4ba3f7c5 803 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
5cfc8ee0 804 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
805 help
806 Say Y here for systems based on one of the Sharp LH7A40X
807 System on a Chip processors. These CPUs include an ARM922T
808 core with a wide array of integrated devices for
809 hand-held and low-power applications.
810
d98aac75
LW
811config ARCH_U300
812 bool "ST-Ericsson U300 Series"
813 depends on MMU
814 select CPU_ARM926T
5c21b7ca 815 select HAVE_SCHED_CLOCK
bc581770 816 select HAVE_TCM
d98aac75
LW
817 select ARM_AMBA
818 select ARM_VIC
d98aac75 819 select GENERIC_CLOCKEVENTS
6d803ba7 820 select CLKDEV_LOOKUP
d98aac75
LW
821 select GENERIC_GPIO
822 help
823 Support for ST-Ericsson U300 series mobile platforms.
824
ccf50e23
RK
825config ARCH_U8500
826 bool "ST-Ericsson U8500 Series"
827 select CPU_V7
828 select ARM_AMBA
ccf50e23 829 select GENERIC_CLOCKEVENTS
6d803ba7 830 select CLKDEV_LOOKUP
94bdc0e2 831 select ARCH_REQUIRE_GPIOLIB
7c1a70e9 832 select ARCH_HAS_CPUFREQ
ccf50e23
RK
833 help
834 Support for ST-Ericsson's Ux500 architecture
835
836config ARCH_NOMADIK
837 bool "STMicroelectronics Nomadik"
838 select ARM_AMBA
839 select ARM_VIC
840 select CPU_ARM926T
6d803ba7 841 select CLKDEV_LOOKUP
ccf50e23 842 select GENERIC_CLOCKEVENTS
ccf50e23
RK
843 select ARCH_REQUIRE_GPIOLIB
844 help
845 Support for the Nomadik platform by ST-Ericsson
846
7c6337e2
KH
847config ARCH_DAVINCI
848 bool "TI DaVinci"
7c6337e2 849 select GENERIC_CLOCKEVENTS
dce1115b 850 select ARCH_REQUIRE_GPIOLIB
3bca103a 851 select ZONE_DMA
9232fcc9 852 select HAVE_IDE
6d803ba7 853 select CLKDEV_LOOKUP
20e9969b 854 select GENERIC_ALLOCATOR
ae88e05a 855 select ARCH_HAS_HOLES_MEMORYMODEL
7c6337e2
KH
856 help
857 Support for TI's DaVinci platform.
858
3b938be6
RK
859config ARCH_OMAP
860 bool "TI OMAP"
9483a578 861 select HAVE_CLK
7444a72e 862 select ARCH_REQUIRE_GPIOLIB
89c52ed4 863 select ARCH_HAS_CPUFREQ
06cad098 864 select GENERIC_CLOCKEVENTS
dc548fbb 865 select HAVE_SCHED_CLOCK
9af915da 866 select ARCH_HAS_HOLES_MEMORYMODEL
3b938be6 867 help
6e457bb0 868 Support for TI's OMAP platform (OMAP1/2/3/4).
3b938be6 869
cee37e50
VK
870config PLAT_SPEAR
871 bool "ST SPEAr"
872 select ARM_AMBA
873 select ARCH_REQUIRE_GPIOLIB
6d803ba7 874 select CLKDEV_LOOKUP
cee37e50 875 select GENERIC_CLOCKEVENTS
cee37e50
VK
876 select HAVE_CLK
877 help
878 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
879
1da177e4
LT
880endchoice
881
ccf50e23
RK
882#
883# This is sorted alphabetically by mach-* pathname. However, plat-*
884# Kconfigs may be included either alphabetically (according to the
885# plat- suffix) or along side the corresponding mach-* source.
886#
95b8f20f
RK
887source "arch/arm/mach-aaec2000/Kconfig"
888
889source "arch/arm/mach-at91/Kconfig"
890
891source "arch/arm/mach-bcmring/Kconfig"
892
1da177e4
LT
893source "arch/arm/mach-clps711x/Kconfig"
894
d94f944e
AV
895source "arch/arm/mach-cns3xxx/Kconfig"
896
95b8f20f
RK
897source "arch/arm/mach-davinci/Kconfig"
898
899source "arch/arm/mach-dove/Kconfig"
900
e7736d47
LB
901source "arch/arm/mach-ep93xx/Kconfig"
902
1da177e4
LT
903source "arch/arm/mach-footbridge/Kconfig"
904
59d3a193
PZ
905source "arch/arm/mach-gemini/Kconfig"
906
95b8f20f
RK
907source "arch/arm/mach-h720x/Kconfig"
908
1da177e4
LT
909source "arch/arm/mach-integrator/Kconfig"
910
3f7e5815
LB
911source "arch/arm/mach-iop32x/Kconfig"
912
913source "arch/arm/mach-iop33x/Kconfig"
1da177e4 914
285f5fa7
DW
915source "arch/arm/mach-iop13xx/Kconfig"
916
1da177e4
LT
917source "arch/arm/mach-ixp4xx/Kconfig"
918
919source "arch/arm/mach-ixp2000/Kconfig"
920
c4713074
LB
921source "arch/arm/mach-ixp23xx/Kconfig"
922
95b8f20f
RK
923source "arch/arm/mach-kirkwood/Kconfig"
924
925source "arch/arm/mach-ks8695/Kconfig"
926
927source "arch/arm/mach-lh7a40x/Kconfig"
928
777f9beb
LB
929source "arch/arm/mach-loki/Kconfig"
930
40805949
KW
931source "arch/arm/mach-lpc32xx/Kconfig"
932
95b8f20f
RK
933source "arch/arm/mach-msm/Kconfig"
934
794d15b2
SS
935source "arch/arm/mach-mv78xx0/Kconfig"
936
95b8f20f 937source "arch/arm/plat-mxc/Kconfig"
1da177e4 938
1d3f33d5
SG
939source "arch/arm/mach-mxs/Kconfig"
940
95b8f20f 941source "arch/arm/mach-netx/Kconfig"
49cbe786 942
95b8f20f
RK
943source "arch/arm/mach-nomadik/Kconfig"
944source "arch/arm/plat-nomadik/Kconfig"
945
946source "arch/arm/mach-ns9xxx/Kconfig"
1da177e4 947
186f93ea 948source "arch/arm/mach-nuc93x/Kconfig"
1da177e4 949
d48af15e
TL
950source "arch/arm/plat-omap/Kconfig"
951
952source "arch/arm/mach-omap1/Kconfig"
1da177e4 953
1dbae815
TL
954source "arch/arm/mach-omap2/Kconfig"
955
9dd0b194 956source "arch/arm/mach-orion5x/Kconfig"
585cf175 957
95b8f20f
RK
958source "arch/arm/mach-pxa/Kconfig"
959source "arch/arm/plat-pxa/Kconfig"
585cf175 960
95b8f20f
RK
961source "arch/arm/mach-mmp/Kconfig"
962
963source "arch/arm/mach-realview/Kconfig"
964
965source "arch/arm/mach-sa1100/Kconfig"
edabd38e 966
cf383678 967source "arch/arm/plat-samsung/Kconfig"
a21765a7 968source "arch/arm/plat-s3c24xx/Kconfig"
c4ffccdd 969source "arch/arm/plat-s5p/Kconfig"
a21765a7 970
cee37e50 971source "arch/arm/plat-spear/Kconfig"
a21765a7 972
83ef3338
HK
973source "arch/arm/plat-tcc/Kconfig"
974
a21765a7
BD
975if ARCH_S3C2410
976source "arch/arm/mach-s3c2400/Kconfig"
1da177e4 977source "arch/arm/mach-s3c2410/Kconfig"
a21765a7 978source "arch/arm/mach-s3c2412/Kconfig"
f1290a49 979source "arch/arm/mach-s3c2416/Kconfig"
a21765a7 980source "arch/arm/mach-s3c2440/Kconfig"
e4d06e39 981source "arch/arm/mach-s3c2443/Kconfig"
a21765a7 982endif
1da177e4 983
a08ab637 984if ARCH_S3C64XX
431107ea 985source "arch/arm/mach-s3c64xx/Kconfig"
a08ab637
BD
986endif
987
49b7a491 988source "arch/arm/mach-s5p64x0/Kconfig"
c4ffccdd 989
550db7f1 990source "arch/arm/mach-s5p6442/Kconfig"
7bd0f2f5 991
5a7652f2 992source "arch/arm/mach-s5pc100/Kconfig"
5a7652f2 993
170f4e42
KK
994source "arch/arm/mach-s5pv210/Kconfig"
995
cc0e72b8
CY
996source "arch/arm/mach-s5pv310/Kconfig"
997
882d01f9 998source "arch/arm/mach-shmobile/Kconfig"
52c543f9 999
882d01f9 1000source "arch/arm/plat-stmp3xxx/Kconfig"
9e73c84c 1001
c5f80065
EG
1002source "arch/arm/mach-tegra/Kconfig"
1003
95b8f20f 1004source "arch/arm/mach-u300/Kconfig"
1da177e4 1005
95b8f20f 1006source "arch/arm/mach-ux500/Kconfig"
1da177e4
LT
1007
1008source "arch/arm/mach-versatile/Kconfig"
1009
ceade897 1010source "arch/arm/mach-vexpress/Kconfig"
420c34e4 1011source "arch/arm/plat-versatile/Kconfig"
ceade897 1012
7ec80ddf 1013source "arch/arm/mach-w90x900/Kconfig"
1014
1da177e4
LT
1015# Definitions to make life easier
1016config ARCH_ACORN
1017 bool
1018
7ae1f7ec
LB
1019config PLAT_IOP
1020 bool
469d3044 1021 select GENERIC_CLOCKEVENTS
08f26b1e 1022 select HAVE_SCHED_CLOCK
7ae1f7ec 1023
69b02f6a
LB
1024config PLAT_ORION
1025 bool
f06a1624 1026 select HAVE_SCHED_CLOCK
69b02f6a 1027
bd5ce433
EM
1028config PLAT_PXA
1029 bool
1030
f4b8b319
RK
1031config PLAT_VERSATILE
1032 bool
1033
e3887714
RK
1034config ARM_TIMER_SP804
1035 bool
1036
1da177e4
LT
1037source arch/arm/mm/Kconfig
1038
afe4b25e
LB
1039config IWMMXT
1040 bool "Enable iWMMXt support"
ef6c8445
HZ
1041 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1042 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
afe4b25e
LB
1043 help
1044 Enable support for iWMMXt context switching at run time if
1045 running on a CPU that supports it.
1046
1da177e4
LT
1047# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1048config XSCALE_PMU
1049 bool
1050 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1051 default y
1052
0f4f0672 1053config CPU_HAS_PMU
8954bb0d
WD
1054 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1055 (!ARCH_OMAP3 || OMAP3_EMU)
0f4f0672
JI
1056 default y
1057 bool
1058
52108641 1059config MULTI_IRQ_HANDLER
1060 bool
1061 help
1062 Allow each machine to specify it's own IRQ handler at run time.
1063
3b93e7b0
HC
1064if !MMU
1065source "arch/arm/Kconfig-nommu"
1066endif
1067
9cba3ccc
CM
1068config ARM_ERRATA_411920
1069 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
81d11955 1070 depends on CPU_V6
9cba3ccc
CM
1071 help
1072 Invalidation of the Instruction Cache operation can
1073 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1074 It does not affect the MPCore. This option enables the ARM Ltd.
1075 recommended workaround.
1076
7ce236fc
CM
1077config ARM_ERRATA_430973
1078 bool "ARM errata: Stale prediction on replaced interworking branch"
1079 depends on CPU_V7
1080 help
1081 This option enables the workaround for the 430973 Cortex-A8
1082 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1083 interworking branch is replaced with another code sequence at the
1084 same virtual address, whether due to self-modifying code or virtual
1085 to physical address re-mapping, Cortex-A8 does not recover from the
1086 stale interworking branch prediction. This results in Cortex-A8
1087 executing the new code sequence in the incorrect ARM or Thumb state.
1088 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1089 and also flushes the branch target cache at every context switch.
1090 Note that setting specific bits in the ACTLR register may not be
1091 available in non-secure mode.
1092
855c551f
CM
1093config ARM_ERRATA_458693
1094 bool "ARM errata: Processor deadlock when a false hazard is created"
1095 depends on CPU_V7
1096 help
1097 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1098 erratum. For very specific sequences of memory operations, it is
1099 possible for a hazard condition intended for a cache line to instead
1100 be incorrectly associated with a different cache line. This false
1101 hazard might then cause a processor deadlock. The workaround enables
1102 the L1 caching of the NEON accesses and disables the PLD instruction
1103 in the ACTLR register. Note that setting specific bits in the ACTLR
1104 register may not be available in non-secure mode.
1105
0516e464
CM
1106config ARM_ERRATA_460075
1107 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1108 depends on CPU_V7
1109 help
1110 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1111 erratum. Any asynchronous access to the L2 cache may encounter a
1112 situation in which recent store transactions to the L2 cache are lost
1113 and overwritten with stale memory contents from external memory. The
1114 workaround disables the write-allocate mode for the L2 cache via the
1115 ACTLR register. Note that setting specific bits in the ACTLR register
1116 may not be available in non-secure mode.
1117
9f05027c
WD
1118config ARM_ERRATA_742230
1119 bool "ARM errata: DMB operation may be faulty"
1120 depends on CPU_V7 && SMP
1121 help
1122 This option enables the workaround for the 742230 Cortex-A9
1123 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1124 between two write operations may not ensure the correct visibility
1125 ordering of the two writes. This workaround sets a specific bit in
1126 the diagnostic register of the Cortex-A9 which causes the DMB
1127 instruction to behave as a DSB, ensuring the correct behaviour of
1128 the two writes.
1129
a672e99b
WD
1130config ARM_ERRATA_742231
1131 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1132 depends on CPU_V7 && SMP
1133 help
1134 This option enables the workaround for the 742231 Cortex-A9
1135 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1136 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1137 accessing some data located in the same cache line, may get corrupted
1138 data due to bad handling of the address hazard when the line gets
1139 replaced from one of the CPUs at the same time as another CPU is
1140 accessing it. This workaround sets specific bits in the diagnostic
1141 register of the Cortex-A9 which reduces the linefill issuing
1142 capabilities of the processor.
1143
9e65582a
SS
1144config PL310_ERRATA_588369
1145 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1146 depends on CACHE_L2X0 && ARCH_OMAP4
1147 help
1148 The PL310 L2 cache controller implements three types of Clean &
1149 Invalidate maintenance operations: by Physical Address
1150 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1151 They are architecturally defined to behave as the execution of a
1152 clean operation followed immediately by an invalidate operation,
1153 both performing to the same memory location. This functionality
1154 is not correctly implemented in PL310 as clean lines are not
1155 invalidated as a result of these operations. Note that this errata
1156 uses Texas Instrument's secure monitor api.
cdf357f1
WD
1157
1158config ARM_ERRATA_720789
1159 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1160 depends on CPU_V7 && SMP
1161 help
1162 This option enables the workaround for the 720789 Cortex-A9 (prior to
1163 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1164 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1165 As a consequence of this erratum, some TLB entries which should be
1166 invalidated are not, resulting in an incoherency in the system page
1167 tables. The workaround changes the TLB flushing routines to invalidate
1168 entries regardless of the ASID.
475d92fc
WD
1169
1170config ARM_ERRATA_743622
1171 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1172 depends on CPU_V7
1173 help
1174 This option enables the workaround for the 743622 Cortex-A9
1175 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1176 optimisation in the Cortex-A9 Store Buffer may lead to data
1177 corruption. This workaround sets a specific bit in the diagnostic
1178 register of the Cortex-A9 which disables the Store Buffer
1179 optimisation, preventing the defect from occurring. This has no
1180 visible impact on the overall performance or power consumption of the
1181 processor.
1182
1da177e4
LT
1183endmenu
1184
1185source "arch/arm/common/Kconfig"
1186
1da177e4
LT
1187menu "Bus support"
1188
1189config ARM_AMBA
1190 bool
1191
1192config ISA
1193 bool
1da177e4
LT
1194 help
1195 Find out whether you have ISA slots on your motherboard. ISA is the
1196 name of a bus system, i.e. the way the CPU talks to the other stuff
1197 inside your box. Other bus systems are PCI, EISA, MicroChannel
1198 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1199 newer boards don't support it. If you have ISA, say Y, otherwise N.
1200
065909b9 1201# Select ISA DMA controller support
1da177e4
LT
1202config ISA_DMA
1203 bool
065909b9 1204 select ISA_DMA_API
1da177e4 1205
065909b9 1206# Select ISA DMA interface
5cae841b
AV
1207config ISA_DMA_API
1208 bool
5cae841b 1209
1da177e4 1210config PCI
0b05da72 1211 bool "PCI support" if MIGHT_HAVE_PCI
1da177e4
LT
1212 help
1213 Find out whether you have a PCI motherboard. PCI is the name of a
1214 bus system, i.e. the way the CPU talks to the other stuff inside
1215 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1216 VESA. If you have PCI, say Y, otherwise N.
1217
52882173
AV
1218config PCI_DOMAINS
1219 bool
1220 depends on PCI
1221
b080ac8a
MRJ
1222config PCI_NANOENGINE
1223 bool "BSE nanoEngine PCI support"
1224 depends on SA1100_NANOENGINE
1225 help
1226 Enable PCI on the BSE nanoEngine board.
1227
36e23590
MW
1228config PCI_SYSCALL
1229 def_bool PCI
1230
1da177e4
LT
1231# Select the host bridge type
1232config PCI_HOST_VIA82C505
1233 bool
1234 depends on PCI && ARCH_SHARK
1235 default y
1236
a0113a99
MR
1237config PCI_HOST_ITE8152
1238 bool
1239 depends on PCI && MACH_ARMCORE
1240 default y
1241 select DMABOUNCE
1242
1da177e4
LT
1243source "drivers/pci/Kconfig"
1244
1245source "drivers/pcmcia/Kconfig"
1246
1247endmenu
1248
1249menu "Kernel Features"
1250
0567a0c0
KH
1251source "kernel/time/Kconfig"
1252
1da177e4
LT
1253config SMP
1254 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
971acb9b 1255 depends on EXPERIMENTAL
bc28248e 1256 depends on GENERIC_CLOCKEVENTS
971acb9b 1257 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
89c3dedf
DW
1258 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1259 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
e9d728f5 1260 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
f6dd9fa5 1261 select USE_GENERIC_SMP_HELPERS
89c3dedf 1262 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1da177e4
LT
1263 help
1264 This enables support for systems with more than one CPU. If you have
1265 a system with only one CPU, like most personal computers, say N. If
1266 you have a system with more than one CPU, say Y.
1267
1268 If you say N here, the kernel will run on single and multiprocessor
1269 machines, but will use only one CPU of a multiprocessor machine. If
1270 you say Y here, the kernel will run on many, but not all, single
1271 processor machines. On a single processor machine, the kernel will
1272 run faster if you say N here.
1273
03502faa 1274 See also <file:Documentation/i386/IO-APIC.txt>,
1da177e4 1275 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
50a23e6e 1276 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1da177e4
LT
1277
1278 If you don't know what to do here, say N.
1279
f00ec48f
RK
1280config SMP_ON_UP
1281 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1282 depends on EXPERIMENTAL
4d2692a7 1283 depends on SMP && !XIP_KERNEL
f00ec48f
RK
1284 default y
1285 help
1286 SMP kernels contain instructions which fail on non-SMP processors.
1287 Enabling this option allows the kernel to modify itself to make
1288 these instructions safe. Disabling it allows about 1K of space
1289 savings.
1290
1291 If you don't know what to do here, say Y.
1292
a8cbcd92
RK
1293config HAVE_ARM_SCU
1294 bool
1295 depends on SMP
1296 help
1297 This option enables support for the ARM system coherency unit
1298
f32f4ce2
RK
1299config HAVE_ARM_TWD
1300 bool
1301 depends on SMP
15095bb0 1302 select TICK_ONESHOT
f32f4ce2
RK
1303 help
1304 This options enables support for the ARM timer and watchdog unit
1305
8d5796d2
LB
1306choice
1307 prompt "Memory split"
1308 default VMSPLIT_3G
1309 help
1310 Select the desired split between kernel and user memory.
1311
1312 If you are not absolutely sure what you are doing, leave this
1313 option alone!
1314
1315 config VMSPLIT_3G
1316 bool "3G/1G user/kernel split"
1317 config VMSPLIT_2G
1318 bool "2G/2G user/kernel split"
1319 config VMSPLIT_1G
1320 bool "1G/3G user/kernel split"
1321endchoice
1322
1323config PAGE_OFFSET
1324 hex
1325 default 0x40000000 if VMSPLIT_1G
1326 default 0x80000000 if VMSPLIT_2G
1327 default 0xC0000000
1328
1da177e4
LT
1329config NR_CPUS
1330 int "Maximum number of CPUs (2-32)"
1331 range 2 32
1332 depends on SMP
1333 default "4"
1334
a054a811
RK
1335config HOTPLUG_CPU
1336 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1337 depends on SMP && HOTPLUG && EXPERIMENTAL
176bfc44 1338 depends on !ARCH_MSM
a054a811
RK
1339 help
1340 Say Y here to experiment with turning CPUs off and on. CPUs
1341 can be controlled through /sys/devices/system/cpu.
1342
37ee16ae
RK
1343config LOCAL_TIMERS
1344 bool "Use local timer interrupts"
971acb9b 1345 depends on SMP
37ee16ae 1346 default y
89c3dedf 1347 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
37ee16ae
RK
1348 help
1349 Enable support for local timers on SMP platforms, rather then the
1350 legacy IPI broadcast method. Local timers allows the system
1351 accounting to be spread across the timer interval, preventing a
1352 "thundering herd" at every timer tick.
1353
d45a398f 1354source kernel/Kconfig.preempt
1da177e4 1355
f8065813
RK
1356config HZ
1357 int
49b7a491 1358 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
2192482e 1359 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
bfe65704 1360 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
5248c657 1361 default AT91_TIMER_HZ if ARCH_AT91
5da3e714 1362 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
f8065813
RK
1363 default 100
1364
16c79651 1365config THUMB2_KERNEL
4a50bfe3 1366 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
6e6fc998 1367 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
16c79651
CM
1368 select AEABI
1369 select ARM_ASM_UNIFIED
1370 help
1371 By enabling this option, the kernel will be compiled in
1372 Thumb-2 mode. A compiler/assembler that understand the unified
1373 ARM-Thumb syntax is needed.
1374
1375 If unsure, say N.
1376
0becb088
CM
1377config ARM_ASM_UNIFIED
1378 bool
1379
704bdda0
NP
1380config AEABI
1381 bool "Use the ARM EABI to compile the kernel"
1382 help
1383 This option allows for the kernel to be compiled using the latest
1384 ARM ABI (aka EABI). This is only useful if you are using a user
1385 space environment that is also compiled with EABI.
1386
1387 Since there are major incompatibilities between the legacy ABI and
1388 EABI, especially with regard to structure member alignment, this
1389 option also changes the kernel syscall calling convention to
1390 disambiguate both ABIs and allow for backward compatibility support
1391 (selected with CONFIG_OABI_COMPAT).
1392
1393 To use this you need GCC version 4.0.0 or later.
1394
6c90c872 1395config OABI_COMPAT
a73a3ff1 1396 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
61c484d4 1397 depends on AEABI && EXPERIMENTAL
6c90c872
NP
1398 default y
1399 help
1400 This option preserves the old syscall interface along with the
1401 new (ARM EABI) one. It also provides a compatibility layer to
1402 intercept syscalls that have structure arguments which layout
1403 in memory differs between the legacy ABI and the new ARM EABI
1404 (only for non "thumb" binaries). This option adds a tiny
1405 overhead to all syscalls and produces a slightly larger kernel.
1406 If you know you'll be using only pure EABI user space then you
1407 can say N here. If this option is not selected and you attempt
1408 to execute a legacy ABI binary then the result will be
1409 UNPREDICTABLE (in fact it can be predicted that it won't work
1410 at all). If in doubt say Y.
1411
eb33575c 1412config ARCH_HAS_HOLES_MEMORYMODEL
e80d6a24 1413 bool
e80d6a24 1414
05944d74
RK
1415config ARCH_SPARSEMEM_ENABLE
1416 bool
1417
07a2f737
RK
1418config ARCH_SPARSEMEM_DEFAULT
1419 def_bool ARCH_SPARSEMEM_ENABLE
1420
05944d74 1421config ARCH_SELECT_MEMORY_MODEL
be370302 1422 def_bool ARCH_SPARSEMEM_ENABLE
c80d79d7 1423
053a96ca
NP
1424config HIGHMEM
1425 bool "High Memory Support (EXPERIMENTAL)"
1426 depends on MMU && EXPERIMENTAL
1427 help
1428 The address space of ARM processors is only 4 Gigabytes large
1429 and it has to accommodate user address space, kernel address
1430 space as well as some memory mapped IO. That means that, if you
1431 have a large amount of physical memory and/or IO, not all of the
1432 memory can be "permanently mapped" by the kernel. The physical
1433 memory that is not permanently mapped is called "high memory".
1434
1435 Depending on the selected kernel/user memory split, minimum
1436 vmalloc space and actual amount of RAM, you may not need this
1437 option which should result in a slightly faster kernel.
1438
1439 If unsure, say n.
1440
65cec8e3
RK
1441config HIGHPTE
1442 bool "Allocate 2nd-level pagetables from highmem"
1443 depends on HIGHMEM
1444 depends on !OUTER_CACHE
1445
1b8873a0
JI
1446config HW_PERF_EVENTS
1447 bool "Enable hardware performance counter support for perf events"
fe166148 1448 depends on PERF_EVENTS && CPU_HAS_PMU
1b8873a0
JI
1449 default y
1450 help
1451 Enable hardware performance counter support for perf events. If
1452 disabled, perf events will use software events only.
1453
3f22ab27
DH
1454source "mm/Kconfig"
1455
c1b2d970
MD
1456config FORCE_MAX_ZONEORDER
1457 int "Maximum zone order" if ARCH_SHMOBILE
1458 range 11 64 if ARCH_SHMOBILE
1459 default "9" if SA1111
1460 default "11"
1461 help
1462 The kernel memory allocator divides physically contiguous memory
1463 blocks into "zones", where each zone is a power of two number of
1464 pages. This option selects the largest power of two that the kernel
1465 keeps in the memory allocator. If you need to allocate very large
1466 blocks of physically contiguous memory, then you may need to
1467 increase this value.
1468
1469 This config option is actually maximum order plus one. For example,
1470 a value of 11 means that the largest free memory block is 2^10 pages.
1471
1da177e4
LT
1472config LEDS
1473 bool "Timer and CPU usage LEDs"
e055d5bf 1474 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
8c8fdbc9 1475 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1da177e4
LT
1476 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1477 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
73a59c1c 1478 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
25329671 1479 ARCH_AT91 || ARCH_DAVINCI || \
ff3042fb 1480 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1da177e4
LT
1481 help
1482 If you say Y here, the LEDs on your machine will be used
1483 to provide useful information about your current system status.
1484
1485 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1486 be able to select which LEDs are active using the options below. If
1487 you are compiling a kernel for the EBSA-110 or the LART however, the
1488 red LED will simply flash regularly to indicate that the system is
1489 still functional. It is safe to say Y here if you have a CATS
1490 system, but the driver will do nothing.
1491
1492config LEDS_TIMER
1493 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
eebdf7d7
DB
1494 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1495 || MACH_OMAP_PERSEUS2
1da177e4 1496 depends on LEDS
0567a0c0 1497 depends on !GENERIC_CLOCKEVENTS
1da177e4
LT
1498 default y if ARCH_EBSA110
1499 help
1500 If you say Y here, one of the system LEDs (the green one on the
1501 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1502 will flash regularly to indicate that the system is still
1503 operational. This is mainly useful to kernel hackers who are
1504 debugging unstable kernels.
1505
1506 The LART uses the same LED for both Timer LED and CPU usage LED
1507 functions. You may choose to use both, but the Timer LED function
1508 will overrule the CPU usage LED.
1509
1510config LEDS_CPU
1511 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
eebdf7d7
DB
1512 !ARCH_OMAP) \
1513 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1514 || MACH_OMAP_PERSEUS2
1da177e4
LT
1515 depends on LEDS
1516 help
1517 If you say Y here, the red LED will be used to give a good real
1518 time indication of CPU usage, by lighting whenever the idle task
1519 is not currently executing.
1520
1521 The LART uses the same LED for both Timer LED and CPU usage LED
1522 functions. You may choose to use both, but the Timer LED function
1523 will overrule the CPU usage LED.
1524
1525config ALIGNMENT_TRAP
1526 bool
f12d0d7c 1527 depends on CPU_CP15_MMU
1da177e4 1528 default y if !ARCH_EBSA110
e119bfff 1529 select HAVE_PROC_CPU if PROC_FS
1da177e4 1530 help
84eb8d06 1531 ARM processors cannot fetch/store information which is not
1da177e4
LT
1532 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1533 address divisible by 4. On 32-bit ARM processors, these non-aligned
1534 fetch/store instructions will be emulated in software if you say
1535 here, which has a severe performance impact. This is necessary for
1536 correct operation of some network protocols. With an IP-only
1537 configuration it is safe to say N, otherwise say Y.
1538
39ec58f3
LB
1539config UACCESS_WITH_MEMCPY
1540 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1541 depends on MMU && EXPERIMENTAL
1542 default y if CPU_FEROCEON
1543 help
1544 Implement faster copy_to_user and clear_user methods for CPU
1545 cores where a 8-word STM instruction give significantly higher
1546 memory write throughput than a sequence of individual 32bit stores.
1547
1548 A possible side effect is a slight increase in scheduling latency
1549 between threads sharing the same address space if they invoke
1550 such copy operations with large buffers.
1551
1552 However, if the CPU data cache is using a write-allocate mode,
1553 this option is unlikely to provide any performance gain.
1554
70c70d97
NP
1555config SECCOMP
1556 bool
1557 prompt "Enable seccomp to safely compute untrusted bytecode"
1558 ---help---
1559 This kernel feature is useful for number crunching applications
1560 that may need to compute untrusted bytecode during their
1561 execution. By using pipes or other transports made available to
1562 the process as file descriptors supporting the read/write
1563 syscalls, it's possible to isolate those applications in
1564 their own address space using seccomp. Once seccomp is
1565 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1566 and the task is only allowed to execute a few safe syscalls
1567 defined by each seccomp mode.
1568
c743f380
NP
1569config CC_STACKPROTECTOR
1570 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
4a50bfe3 1571 depends on EXPERIMENTAL
c743f380
NP
1572 help
1573 This option turns on the -fstack-protector GCC feature. This
1574 feature puts, at the beginning of functions, a canary value on
1575 the stack just before the return address, and validates
1576 the value just before actually returning. Stack based buffer
1577 overflows (that need to overwrite this return address) now also
1578 overwrite the canary, which gets detected and the attack is then
1579 neutralized via a kernel panic.
1580 This feature requires gcc version 4.2 or above.
1581
73a65b3f
UKK
1582config DEPRECATED_PARAM_STRUCT
1583 bool "Provide old way to pass kernel parameters"
1584 help
1585 This was deprecated in 2001 and announced to live on for 5 years.
1586 Some old boot loaders still use this way.
1587
1da177e4
LT
1588endmenu
1589
1590menu "Boot options"
1591
1592# Compressed boot loader in ROM. Yes, we really want to ask about
1593# TEXT and BSS so we preserve their values in the config files.
1594config ZBOOT_ROM_TEXT
1595 hex "Compressed ROM boot loader base address"
1596 default "0"
1597 help
1598 The physical address at which the ROM-able zImage is to be
1599 placed in the target. Platforms which normally make use of
1600 ROM-able zImage formats normally set this to a suitable
1601 value in their defconfig file.
1602
1603 If ZBOOT_ROM is not enabled, this has no effect.
1604
1605config ZBOOT_ROM_BSS
1606 hex "Compressed ROM boot loader BSS address"
1607 default "0"
1608 help
f8c440b2
DF
1609 The base address of an area of read/write memory in the target
1610 for the ROM-able zImage which must be available while the
1611 decompressor is running. It must be large enough to hold the
1612 entire decompressed kernel plus an additional 128 KiB.
1613 Platforms which normally make use of ROM-able zImage formats
1614 normally set this to a suitable value in their defconfig file.
1da177e4
LT
1615
1616 If ZBOOT_ROM is not enabled, this has no effect.
1617
1618config ZBOOT_ROM
1619 bool "Compressed boot loader in ROM/flash"
1620 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1621 help
1622 Say Y here if you intend to execute your compressed kernel image
1623 (zImage) directly from ROM or flash. If unsure, say N.
1624
1625config CMDLINE
1626 string "Default kernel command string"
1627 default ""
1628 help
1629 On some architectures (EBSA110 and CATS), there is currently no way
1630 for the boot loader to pass arguments to the kernel. For these
1631 architectures, you should supply some command-line options at build
1632 time by entering them here. As a minimum, you should specify the
1633 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1634
92d2040d
AH
1635config CMDLINE_FORCE
1636 bool "Always use the default kernel command string"
1637 depends on CMDLINE != ""
1638 help
1639 Always use the default kernel command string, even if the boot
1640 loader passes other arguments to the kernel.
1641 This is useful if you cannot or don't want to change the
1642 command-line options your boot loader passes to the kernel.
1643
1644 If unsure, say N.
1645
1da177e4
LT
1646config XIP_KERNEL
1647 bool "Kernel Execute-In-Place from ROM"
1648 depends on !ZBOOT_ROM
1649 help
1650 Execute-In-Place allows the kernel to run from non-volatile storage
1651 directly addressable by the CPU, such as NOR flash. This saves RAM
1652 space since the text section of the kernel is not loaded from flash
1653 to RAM. Read-write sections, such as the data section and stack,
1654 are still copied to RAM. The XIP kernel is not compressed since
1655 it has to run directly from flash, so it will take more space to
1656 store it. The flash address used to link the kernel object files,
1657 and for storing it, is configuration dependent. Therefore, if you
1658 say Y here, you must know the proper physical address where to
1659 store the kernel image depending on your own flash memory usage.
1660
1661 Also note that the make target becomes "make xipImage" rather than
1662 "make zImage" or "make Image". The final kernel binary to put in
1663 ROM memory will be arch/arm/boot/xipImage.
1664
1665 If unsure, say N.
1666
1667config XIP_PHYS_ADDR
1668 hex "XIP Kernel Physical Location"
1669 depends on XIP_KERNEL
1670 default "0x00080000"
1671 help
1672 This is the physical address in your flash memory the kernel will
1673 be linked for and stored to. This address is dependent on your
1674 own flash usage.
1675
c587e4a6
RP
1676config KEXEC
1677 bool "Kexec system call (EXPERIMENTAL)"
1678 depends on EXPERIMENTAL
1679 help
1680 kexec is a system call that implements the ability to shutdown your
1681 current kernel, and to start another kernel. It is like a reboot
01dd2fbf 1682 but it is independent of the system firmware. And like a reboot
c587e4a6
RP
1683 you can start any kernel with it, not just Linux.
1684
1685 It is an ongoing process to be certain the hardware in a machine
1686 is properly shutdown, so do not be surprised if this code does not
1687 initially work for you. It may help to enable device hotplugging
1688 support.
1689
4cd9d6f7
RP
1690config ATAGS_PROC
1691 bool "Export atags in procfs"
b98d7291
UL
1692 depends on KEXEC
1693 default y
4cd9d6f7
RP
1694 help
1695 Should the atags used to boot the kernel be exported in an "atags"
1696 file in procfs. Useful with kexec.
1697
cb5d39b3
MW
1698config CRASH_DUMP
1699 bool "Build kdump crash kernel (EXPERIMENTAL)"
1700 depends on EXPERIMENTAL
1701 help
1702 Generate crash dump after being started by kexec. This should
1703 be normally only set in special crash dump kernels which are
1704 loaded in the main kernel with kexec-tools into a specially
1705 reserved region and then later executed after a crash by
1706 kdump/kexec. The crash dump kernel must be compiled to a
1707 memory address not used by the main kernel
1708
1709 For more details see Documentation/kdump/kdump.txt
1710
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EM
1711config AUTO_ZRELADDR
1712 bool "Auto calculation of the decompressed kernel image address"
1713 depends on !ZBOOT_ROM && !ARCH_U300
1714 help
1715 ZRELADDR is the physical address where the decompressed kernel
1716 image will be placed. If AUTO_ZRELADDR is selected, the address
1717 will be determined at run-time by masking the current IP with
1718 0xf8000000. This assumes the zImage being placed in the first 128MB
1719 from start of memory.
1720
1da177e4
LT
1721endmenu
1722
ac9d7efc 1723menu "CPU Power Management"
1da177e4 1724
89c52ed4 1725if ARCH_HAS_CPUFREQ
1da177e4
LT
1726
1727source "drivers/cpufreq/Kconfig"
1728
64f102b6
YS
1729config CPU_FREQ_IMX
1730 tristate "CPUfreq driver for i.MX CPUs"
1731 depends on ARCH_MXC && CPU_FREQ
1732 help
1733 This enables the CPUfreq driver for i.MX CPUs.
1734
1da177e4
LT
1735config CPU_FREQ_SA1100
1736 bool
1da177e4
LT
1737
1738config CPU_FREQ_SA1110
1739 bool
1da177e4
LT
1740
1741config CPU_FREQ_INTEGRATOR
1742 tristate "CPUfreq driver for ARM Integrator CPUs"
1743 depends on ARCH_INTEGRATOR && CPU_FREQ
1744 default y
1745 help
1746 This enables the CPUfreq driver for ARM Integrator CPUs.
1747
1748 For details, take a look at <file:Documentation/cpu-freq>.
1749
1750 If in doubt, say Y.
1751
9e2697ff
RK
1752config CPU_FREQ_PXA
1753 bool
1754 depends on CPU_FREQ && ARCH_PXA && PXA25x
1755 default y
1756 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1757
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MB
1758config CPU_FREQ_S3C64XX
1759 bool "CPUfreq support for Samsung S3C64XX CPUs"
1760 depends on CPU_FREQ && CPU_S3C6410
1761
9d56c02a
BD
1762config CPU_FREQ_S3C
1763 bool
1764 help
1765 Internal configuration node for common cpufreq on Samsung SoC
1766
1767config CPU_FREQ_S3C24XX
4a50bfe3 1768 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
9d56c02a
BD
1769 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1770 select CPU_FREQ_S3C
1771 help
1772 This enables the CPUfreq driver for the Samsung S3C24XX family
1773 of CPUs.
1774
1775 For details, take a look at <file:Documentation/cpu-freq>.
1776
1777 If in doubt, say N.
1778
1779config CPU_FREQ_S3C24XX_PLL
4a50bfe3 1780 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
9d56c02a
BD
1781 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1782 help
1783 Compile in support for changing the PLL frequency from the
1784 S3C24XX series CPUfreq driver. The PLL takes time to settle
1785 after a frequency change, so by default it is not enabled.
1786
1787 This also means that the PLL tables for the selected CPU(s) will
1788 be built which may increase the size of the kernel image.
1789
1790config CPU_FREQ_S3C24XX_DEBUG
1791 bool "Debug CPUfreq Samsung driver core"
1792 depends on CPU_FREQ_S3C24XX
1793 help
1794 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1795
1796config CPU_FREQ_S3C24XX_IODEBUG
1797 bool "Debug CPUfreq Samsung driver IO timing"
1798 depends on CPU_FREQ_S3C24XX
1799 help
1800 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1801
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BD
1802config CPU_FREQ_S3C24XX_DEBUGFS
1803 bool "Export debugfs for CPUFreq"
1804 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1805 help
1806 Export status information via debugfs.
1807
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LT
1808endif
1809
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RK
1810source "drivers/cpuidle/Kconfig"
1811
1812endmenu
1813
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LT
1814menu "Floating point emulation"
1815
1816comment "At least one emulation must be selected"
1817
1818config FPE_NWFPE
1819 bool "NWFPE math emulation"
593c252a 1820 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1da177e4
LT
1821 ---help---
1822 Say Y to include the NWFPE floating point emulator in the kernel.
1823 This is necessary to run most binaries. Linux does not currently
1824 support floating point hardware so you need to say Y here even if
1825 your machine has an FPA or floating point co-processor podule.
1826
1827 You may say N here if you are going to load the Acorn FPEmulator
1828 early in the bootup.
1829
1830config FPE_NWFPE_XP
1831 bool "Support extended precision"
bedf142b 1832 depends on FPE_NWFPE
1da177e4
LT
1833 help
1834 Say Y to include 80-bit support in the kernel floating-point
1835 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1836 Note that gcc does not generate 80-bit operations by default,
1837 so in most cases this option only enlarges the size of the
1838 floating point emulator without any good reason.
1839
1840 You almost surely want to say N here.
1841
1842config FPE_FASTFPE
1843 bool "FastFPE math emulation (EXPERIMENTAL)"
8993a44c 1844 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1da177e4
LT
1845 ---help---
1846 Say Y here to include the FAST floating point emulator in the kernel.
1847 This is an experimental much faster emulator which now also has full
1848 precision for the mantissa. It does not support any exceptions.
1849 It is very simple, and approximately 3-6 times faster than NWFPE.
1850
1851 It should be sufficient for most programs. It may be not suitable
1852 for scientific calculations, but you have to check this for yourself.
1853 If you do not feel you need a faster FP emulation you should better
1854 choose NWFPE.
1855
1856config VFP
1857 bool "VFP-format floating point maths"
c00d4ffd 1858 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1da177e4
LT
1859 help
1860 Say Y to include VFP support code in the kernel. This is needed
1861 if your hardware includes a VFP unit.
1862
1863 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1864 release notes and additional status information.
1865
1866 Say N if your target does not have VFP hardware.
1867
25ebee02
CM
1868config VFPv3
1869 bool
1870 depends on VFP
1871 default y if CPU_V7
1872
b5872db4
CM
1873config NEON
1874 bool "Advanced SIMD (NEON) Extension support"
1875 depends on VFPv3 && CPU_V7
1876 help
1877 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1878 Extension.
1879
1da177e4
LT
1880endmenu
1881
1882menu "Userspace binary formats"
1883
1884source "fs/Kconfig.binfmt"
1885
1886config ARTHUR
1887 tristate "RISC OS personality"
704bdda0 1888 depends on !AEABI
1da177e4
LT
1889 help
1890 Say Y here to include the kernel code necessary if you want to run
1891 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1892 experimental; if this sounds frightening, say N and sleep in peace.
1893 You can also say M here to compile this support as a module (which
1894 will be called arthur).
1895
1896endmenu
1897
1898menu "Power management options"
1899
eceab4ac 1900source "kernel/power/Kconfig"
1da177e4 1901
f4cb5700
JB
1902config ARCH_SUSPEND_POSSIBLE
1903 def_bool y
1904
1da177e4
LT
1905endmenu
1906
d5950b43
SR
1907source "net/Kconfig"
1908
ac25150f 1909source "drivers/Kconfig"
1da177e4
LT
1910
1911source "fs/Kconfig"
1912
1da177e4
LT
1913source "arch/arm/Kconfig.debug"
1914
1915source "security/Kconfig"
1916
1917source "crypto/Kconfig"
1918
1919source "lib/Kconfig"