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Commit | Line | Data |
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1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
24056f52 | 5 | select HAVE_DMA_API_DEBUG |
2064c946 | 6 | select HAVE_IDE |
2778f620 | 7 | select HAVE_MEMBLOCK |
12b824fb | 8 | select RTC_LIB |
75e7153a | 9 | select SYS_SUPPORTS_APM_EMULATION |
d4c7b1f9 | 10 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
fe166148 | 11 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 12 | select HAVE_ARCH_KGDB |
ed7c84d5 | 13 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
9edddaa2 | 14 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 15 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 19 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
20 | select HAVE_KERNEL_GZIP |
21 | select HAVE_KERNEL_LZO | |
6e8699f7 | 22 | select HAVE_KERNEL_LZMA |
e360adbe | 23 | select HAVE_IRQ_WORK |
7ada189f JI |
24 | select HAVE_PERF_EVENTS |
25 | select PERF_USE_VMALLOC | |
e513f8bf | 26 | select HAVE_REGS_AND_STACK_ACCESS_API |
19852e59 | 27 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
ed60453f | 28 | select HAVE_C_RECORDMCOUNT |
e2a93ecc LB |
29 | select HAVE_GENERIC_HARDIRQS |
30 | select HAVE_SPARSE_IRQ | |
1da177e4 LT |
31 | help |
32 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 33 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 34 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 35 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
36 | Europe. There is an ARM Linux project with a web page at |
37 | <http://www.arm.linux.org.uk/>. | |
38 | ||
1a189b97 RK |
39 | config HAVE_PWM |
40 | bool | |
41 | ||
0b05da72 HUK |
42 | config MIGHT_HAVE_PCI |
43 | bool | |
44 | ||
75e7153a RB |
45 | config SYS_SUPPORTS_APM_EMULATION |
46 | bool | |
47 | ||
112f38a4 RK |
48 | config HAVE_SCHED_CLOCK |
49 | bool | |
50 | ||
0a938b97 DB |
51 | config GENERIC_GPIO |
52 | bool | |
0a938b97 | 53 | |
5cfc8ee0 JS |
54 | config ARCH_USES_GETTIMEOFFSET |
55 | bool | |
56 | default n | |
746140c7 | 57 | |
0567a0c0 KH |
58 | config GENERIC_CLOCKEVENTS |
59 | bool | |
0567a0c0 | 60 | |
a8655e83 CM |
61 | config GENERIC_CLOCKEVENTS_BROADCAST |
62 | bool | |
63 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 64 | default y if SMP |
a8655e83 | 65 | |
bc581770 LW |
66 | config HAVE_TCM |
67 | bool | |
68 | select GENERIC_ALLOCATOR | |
69 | ||
e119bfff RK |
70 | config HAVE_PROC_CPU |
71 | bool | |
72 | ||
5ea81769 AV |
73 | config NO_IOPORT |
74 | bool | |
5ea81769 | 75 | |
1da177e4 LT |
76 | config EISA |
77 | bool | |
78 | ---help--- | |
79 | The Extended Industry Standard Architecture (EISA) bus was | |
80 | developed as an open alternative to the IBM MicroChannel bus. | |
81 | ||
82 | The EISA bus provided some of the features of the IBM MicroChannel | |
83 | bus while maintaining backward compatibility with cards made for | |
84 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
85 | 1995 when it was made obsolete by the PCI bus. | |
86 | ||
87 | Say Y here if you are building a kernel for an EISA-based machine. | |
88 | ||
89 | Otherwise, say N. | |
90 | ||
91 | config SBUS | |
92 | bool | |
93 | ||
94 | config MCA | |
95 | bool | |
96 | help | |
97 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
98 | laptops. It is a bus system similar to PCI or ISA. See | |
99 | <file:Documentation/mca.txt> (and especially the web page given | |
100 | there) before attempting to build an MCA bus kernel. | |
101 | ||
f16fb1ec RK |
102 | config STACKTRACE_SUPPORT |
103 | bool | |
104 | default y | |
105 | ||
f76e9154 NP |
106 | config HAVE_LATENCYTOP_SUPPORT |
107 | bool | |
108 | depends on !SMP | |
109 | default y | |
110 | ||
f16fb1ec RK |
111 | config LOCKDEP_SUPPORT |
112 | bool | |
113 | default y | |
114 | ||
7ad1bcb2 RK |
115 | config TRACE_IRQFLAGS_SUPPORT |
116 | bool | |
117 | default y | |
118 | ||
4a2581a0 TG |
119 | config HARDIRQS_SW_RESEND |
120 | bool | |
121 | default y | |
122 | ||
123 | config GENERIC_IRQ_PROBE | |
124 | bool | |
125 | default y | |
126 | ||
95c354fe NP |
127 | config GENERIC_LOCKBREAK |
128 | bool | |
129 | default y | |
130 | depends on SMP && PREEMPT | |
131 | ||
1da177e4 LT |
132 | config RWSEM_GENERIC_SPINLOCK |
133 | bool | |
134 | default y | |
135 | ||
136 | config RWSEM_XCHGADD_ALGORITHM | |
137 | bool | |
138 | ||
f0d1b0b3 DH |
139 | config ARCH_HAS_ILOG2_U32 |
140 | bool | |
f0d1b0b3 DH |
141 | |
142 | config ARCH_HAS_ILOG2_U64 | |
143 | bool | |
f0d1b0b3 | 144 | |
89c52ed4 BD |
145 | config ARCH_HAS_CPUFREQ |
146 | bool | |
147 | help | |
148 | Internal node to signify that the ARCH has CPUFREQ support | |
149 | and that the relevant menu configurations are displayed for | |
150 | it. | |
151 | ||
c7b0aff4 KH |
152 | config ARCH_HAS_CPU_IDLE_WAIT |
153 | def_bool y | |
154 | ||
b89c3b16 AM |
155 | config GENERIC_HWEIGHT |
156 | bool | |
157 | default y | |
158 | ||
1da177e4 LT |
159 | config GENERIC_CALIBRATE_DELAY |
160 | bool | |
161 | default y | |
162 | ||
a08b6b79 AV |
163 | config ARCH_MAY_HAVE_PC_FDC |
164 | bool | |
165 | ||
5ac6da66 CL |
166 | config ZONE_DMA |
167 | bool | |
5ac6da66 | 168 | |
ccd7ab7f FT |
169 | config NEED_DMA_MAP_STATE |
170 | def_bool y | |
171 | ||
1da177e4 LT |
172 | config GENERIC_ISA_DMA |
173 | bool | |
174 | ||
1da177e4 LT |
175 | config FIQ |
176 | bool | |
177 | ||
034d2f5a AV |
178 | config ARCH_MTD_XIP |
179 | bool | |
180 | ||
d6d502fa KK |
181 | config ARM_L1_CACHE_SHIFT_6 |
182 | bool | |
183 | help | |
184 | Setting ARM L1 cache line size to 64 Bytes. | |
185 | ||
c760fc19 HC |
186 | config VECTORS_BASE |
187 | hex | |
6afd6fae | 188 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
189 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
190 | default 0x00000000 | |
191 | help | |
192 | The base address of exception vectors. | |
193 | ||
dc21af99 RK |
194 | config ARM_PATCH_PHYS_VIRT |
195 | bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" | |
196 | depends on EXPERIMENTAL | |
197 | depends on !XIP_KERNEL && !THUMB2_KERNEL && MMU | |
dc21af99 RK |
198 | depends on !ARCH_REALVIEW || !SPARSEMEM |
199 | help | |
200 | Patch phys-to-virt translation functions at runtime according to | |
201 | the position of the kernel in system memory. | |
202 | ||
203 | This can only be used with non-XIP, non-Thumb2, MMU kernels where | |
204 | the base of physical memory is at a 16MB boundary. | |
205 | ||
cada3c08 RK |
206 | config ARM_PATCH_PHYS_VIRT_16BIT |
207 | def_bool y | |
208 | depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM | |
209 | ||
1da177e4 LT |
210 | source "init/Kconfig" |
211 | ||
dc52ddc0 MH |
212 | source "kernel/Kconfig.freezer" |
213 | ||
1da177e4 LT |
214 | menu "System Type" |
215 | ||
3c427975 HC |
216 | config MMU |
217 | bool "MMU-based Paged Memory Management Support" | |
218 | default y | |
219 | help | |
220 | Select if you want MMU-based virtualised addressing space | |
221 | support by paged memory management. If unsure, say 'Y'. | |
222 | ||
ccf50e23 RK |
223 | # |
224 | # The "ARM system type" choice list is ordered alphabetically by option | |
225 | # text. Please add new entries in the option alphabetic order. | |
226 | # | |
1da177e4 LT |
227 | choice |
228 | prompt "ARM system type" | |
6a0e2430 | 229 | default ARCH_VERSATILE |
1da177e4 | 230 | |
4af6fee1 DS |
231 | config ARCH_AAEC2000 |
232 | bool "Agilent AAEC-2000 based" | |
c750815e | 233 | select CPU_ARM920T |
4af6fee1 | 234 | select ARM_AMBA |
9483a578 | 235 | select HAVE_CLK |
5cfc8ee0 | 236 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
237 | help |
238 | This enables support for systems based on the Agilent AAEC-2000 | |
239 | ||
240 | config ARCH_INTEGRATOR | |
241 | bool "ARM Ltd. Integrator family" | |
242 | select ARM_AMBA | |
89c52ed4 | 243 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 244 | select CLKDEV_LOOKUP |
c5a0adb5 | 245 | select ICST |
13edd86d | 246 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 247 | select PLAT_VERSATILE |
4af6fee1 DS |
248 | help |
249 | Support for ARM's Integrator platform. | |
250 | ||
251 | config ARCH_REALVIEW | |
252 | bool "ARM Ltd. RealView family" | |
253 | select ARM_AMBA | |
6d803ba7 | 254 | select CLKDEV_LOOKUP |
1da0c89c | 255 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 256 | select ICST |
ae30ceac | 257 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 258 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 259 | select PLAT_VERSATILE |
e3887714 | 260 | select ARM_TIMER_SP804 |
b56ba8aa | 261 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
262 | help |
263 | This enables support for ARM Ltd RealView boards. | |
264 | ||
265 | config ARCH_VERSATILE | |
266 | bool "ARM Ltd. Versatile family" | |
267 | select ARM_AMBA | |
268 | select ARM_VIC | |
6d803ba7 | 269 | select CLKDEV_LOOKUP |
1da0c89c | 270 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 271 | select ICST |
89df1272 | 272 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 273 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 274 | select PLAT_VERSATILE |
e3887714 | 275 | select ARM_TIMER_SP804 |
4af6fee1 DS |
276 | help |
277 | This enables support for ARM Ltd Versatile board. | |
278 | ||
ceade897 RK |
279 | config ARCH_VEXPRESS |
280 | bool "ARM Ltd. Versatile Express family" | |
281 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
282 | select ARM_AMBA | |
283 | select ARM_TIMER_SP804 | |
6d803ba7 | 284 | select CLKDEV_LOOKUP |
ceade897 | 285 | select GENERIC_CLOCKEVENTS |
ceade897 | 286 | select HAVE_CLK |
0af85dda | 287 | select HAVE_SCHED_CLOCK |
ceade897 RK |
288 | select ICST |
289 | select PLAT_VERSATILE | |
290 | help | |
291 | This enables support for the ARM Ltd Versatile Express boards. | |
292 | ||
8fc5ffa0 AV |
293 | config ARCH_AT91 |
294 | bool "Atmel AT91" | |
f373e8c0 | 295 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 296 | select HAVE_CLK |
4af6fee1 | 297 | help |
2b3b3516 AV |
298 | This enables support for systems based on the Atmel AT91RM9200, |
299 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 300 | |
ccf50e23 RK |
301 | config ARCH_BCMRING |
302 | bool "Broadcom BCMRING" | |
303 | depends on MMU | |
304 | select CPU_V6 | |
305 | select ARM_AMBA | |
6d803ba7 | 306 | select CLKDEV_LOOKUP |
ccf50e23 RK |
307 | select GENERIC_CLOCKEVENTS |
308 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
309 | help | |
310 | Support for Broadcom's BCMRing platform. | |
311 | ||
1da177e4 | 312 | config ARCH_CLPS711X |
4af6fee1 | 313 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 314 | select CPU_ARM720T |
5cfc8ee0 | 315 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
316 | help |
317 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 318 | |
d94f944e AV |
319 | config ARCH_CNS3XXX |
320 | bool "Cavium Networks CNS3XXX family" | |
321 | select CPU_V6 | |
d94f944e AV |
322 | select GENERIC_CLOCKEVENTS |
323 | select ARM_GIC | |
0b05da72 | 324 | select MIGHT_HAVE_PCI |
5f32f7a0 | 325 | select PCI_DOMAINS if PCI |
d94f944e AV |
326 | help |
327 | Support for Cavium Networks CNS3XXX platform. | |
328 | ||
788c9700 RK |
329 | config ARCH_GEMINI |
330 | bool "Cortina Systems Gemini" | |
331 | select CPU_FA526 | |
788c9700 | 332 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 333 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
334 | help |
335 | Support for the Cortina Systems Gemini family SoCs | |
336 | ||
1da177e4 LT |
337 | config ARCH_EBSA110 |
338 | bool "EBSA-110" | |
c750815e | 339 | select CPU_SA110 |
f7e68bbf | 340 | select ISA |
c5eb2a2b | 341 | select NO_IOPORT |
5cfc8ee0 | 342 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
343 | help |
344 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 345 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
346 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
347 | parallel port. | |
348 | ||
e7736d47 LB |
349 | config ARCH_EP93XX |
350 | bool "EP93xx-based" | |
c750815e | 351 | select CPU_ARM920T |
e7736d47 LB |
352 | select ARM_AMBA |
353 | select ARM_VIC | |
6d803ba7 | 354 | select CLKDEV_LOOKUP |
7444a72e | 355 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 356 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 357 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
358 | help |
359 | This enables support for the Cirrus EP93xx series of CPUs. | |
360 | ||
1da177e4 LT |
361 | config ARCH_FOOTBRIDGE |
362 | bool "FootBridge" | |
c750815e | 363 | select CPU_SA110 |
1da177e4 | 364 | select FOOTBRIDGE |
5cfc8ee0 | 365 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
366 | help |
367 | Support for systems based on the DC21285 companion chip | |
368 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 369 | |
788c9700 RK |
370 | config ARCH_MXC |
371 | bool "Freescale MXC/iMX-based" | |
788c9700 | 372 | select GENERIC_CLOCKEVENTS |
788c9700 | 373 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 374 | select CLKDEV_LOOKUP |
788c9700 RK |
375 | help |
376 | Support for Freescale MXC/iMX-based family of processors | |
377 | ||
1d3f33d5 SG |
378 | config ARCH_MXS |
379 | bool "Freescale MXS-based" | |
380 | select GENERIC_CLOCKEVENTS | |
381 | select ARCH_REQUIRE_GPIOLIB | |
b9214b97 | 382 | select CLKDEV_LOOKUP |
1d3f33d5 SG |
383 | help |
384 | Support for Freescale MXS-based family of processors | |
385 | ||
7bd0f2f5 | 386 | config ARCH_STMP3XXX |
387 | bool "Freescale STMP3xxx" | |
388 | select CPU_ARM926T | |
6d803ba7 | 389 | select CLKDEV_LOOKUP |
7bd0f2f5 | 390 | select ARCH_REQUIRE_GPIOLIB |
7bd0f2f5 | 391 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 392 | select USB_ARCH_HAS_EHCI |
393 | help | |
394 | Support for systems based on the Freescale 3xxx CPUs. | |
395 | ||
4af6fee1 DS |
396 | config ARCH_NETX |
397 | bool "Hilscher NetX based" | |
c750815e | 398 | select CPU_ARM926T |
4af6fee1 | 399 | select ARM_VIC |
2fcfe6b8 | 400 | select GENERIC_CLOCKEVENTS |
f999b8bd | 401 | help |
4af6fee1 DS |
402 | This enables support for systems based on the Hilscher NetX Soc |
403 | ||
404 | config ARCH_H720X | |
405 | bool "Hynix HMS720x-based" | |
c750815e | 406 | select CPU_ARM720T |
4af6fee1 | 407 | select ISA_DMA_API |
5cfc8ee0 | 408 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
409 | help |
410 | This enables support for systems based on the Hynix HMS720x | |
411 | ||
3b938be6 RK |
412 | config ARCH_IOP13XX |
413 | bool "IOP13xx-based" | |
414 | depends on MMU | |
c750815e | 415 | select CPU_XSC3 |
3b938be6 RK |
416 | select PLAT_IOP |
417 | select PCI | |
418 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 419 | select VMSPLIT_1G |
3b938be6 RK |
420 | help |
421 | Support for Intel's IOP13XX (XScale) family of processors. | |
422 | ||
3f7e5815 LB |
423 | config ARCH_IOP32X |
424 | bool "IOP32x-based" | |
a4f7e763 | 425 | depends on MMU |
c750815e | 426 | select CPU_XSCALE |
7ae1f7ec | 427 | select PLAT_IOP |
f7e68bbf | 428 | select PCI |
bb2b180c | 429 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 430 | help |
3f7e5815 LB |
431 | Support for Intel's 80219 and IOP32X (XScale) family of |
432 | processors. | |
433 | ||
434 | config ARCH_IOP33X | |
435 | bool "IOP33x-based" | |
436 | depends on MMU | |
c750815e | 437 | select CPU_XSCALE |
7ae1f7ec | 438 | select PLAT_IOP |
3f7e5815 | 439 | select PCI |
bb2b180c | 440 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
441 | help |
442 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 443 | |
3b938be6 RK |
444 | config ARCH_IXP23XX |
445 | bool "IXP23XX-based" | |
a4f7e763 | 446 | depends on MMU |
c750815e | 447 | select CPU_XSC3 |
3b938be6 | 448 | select PCI |
5cfc8ee0 | 449 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 450 | help |
3b938be6 | 451 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
452 | |
453 | config ARCH_IXP2000 | |
454 | bool "IXP2400/2800-based" | |
a4f7e763 | 455 | depends on MMU |
c750815e | 456 | select CPU_XSCALE |
f7e68bbf | 457 | select PCI |
5cfc8ee0 | 458 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
459 | help |
460 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 461 | |
3b938be6 RK |
462 | config ARCH_IXP4XX |
463 | bool "IXP4xx-based" | |
a4f7e763 | 464 | depends on MMU |
c750815e | 465 | select CPU_XSCALE |
8858e9af | 466 | select GENERIC_GPIO |
3b938be6 | 467 | select GENERIC_CLOCKEVENTS |
5b0d495c | 468 | select HAVE_SCHED_CLOCK |
0b05da72 | 469 | select MIGHT_HAVE_PCI |
485bdde7 | 470 | select DMABOUNCE if PCI |
c4713074 | 471 | help |
3b938be6 | 472 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 473 | |
edabd38e SB |
474 | config ARCH_DOVE |
475 | bool "Marvell Dove" | |
476 | select PCI | |
edabd38e | 477 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
478 | select GENERIC_CLOCKEVENTS |
479 | select PLAT_ORION | |
480 | help | |
481 | Support for the Marvell Dove SoC 88AP510 | |
482 | ||
651c74c7 SB |
483 | config ARCH_KIRKWOOD |
484 | bool "Marvell Kirkwood" | |
c750815e | 485 | select CPU_FEROCEON |
651c74c7 | 486 | select PCI |
a8865655 | 487 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
488 | select GENERIC_CLOCKEVENTS |
489 | select PLAT_ORION | |
490 | help | |
491 | Support for the following Marvell Kirkwood series SoCs: | |
492 | 88F6180, 88F6192 and 88F6281. | |
493 | ||
777f9beb LB |
494 | config ARCH_LOKI |
495 | bool "Marvell Loki (88RC8480)" | |
c750815e | 496 | select CPU_FEROCEON |
777f9beb LB |
497 | select GENERIC_CLOCKEVENTS |
498 | select PLAT_ORION | |
499 | help | |
500 | Support for the Marvell Loki (88RC8480) SoC. | |
501 | ||
40805949 KW |
502 | config ARCH_LPC32XX |
503 | bool "NXP LPC32XX" | |
504 | select CPU_ARM926T | |
505 | select ARCH_REQUIRE_GPIOLIB | |
506 | select HAVE_IDE | |
507 | select ARM_AMBA | |
508 | select USB_ARCH_HAS_OHCI | |
6d803ba7 | 509 | select CLKDEV_LOOKUP |
40805949 KW |
510 | select GENERIC_TIME |
511 | select GENERIC_CLOCKEVENTS | |
512 | help | |
513 | Support for the NXP LPC32XX family of processors | |
514 | ||
794d15b2 SS |
515 | config ARCH_MV78XX0 |
516 | bool "Marvell MV78xx0" | |
c750815e | 517 | select CPU_FEROCEON |
794d15b2 | 518 | select PCI |
a8865655 | 519 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
520 | select GENERIC_CLOCKEVENTS |
521 | select PLAT_ORION | |
522 | help | |
523 | Support for the following Marvell MV78xx0 series SoCs: | |
524 | MV781x0, MV782x0. | |
525 | ||
9dd0b194 | 526 | config ARCH_ORION5X |
585cf175 TP |
527 | bool "Marvell Orion" |
528 | depends on MMU | |
c750815e | 529 | select CPU_FEROCEON |
038ee083 | 530 | select PCI |
a8865655 | 531 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 532 | select GENERIC_CLOCKEVENTS |
69b02f6a | 533 | select PLAT_ORION |
585cf175 | 534 | help |
9dd0b194 | 535 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 536 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 537 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 538 | |
788c9700 | 539 | config ARCH_MMP |
2f7e8fae | 540 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 541 | depends on MMU |
788c9700 | 542 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 543 | select CLKDEV_LOOKUP |
788c9700 | 544 | select GENERIC_CLOCKEVENTS |
28bb7bc6 | 545 | select HAVE_SCHED_CLOCK |
788c9700 RK |
546 | select TICK_ONESHOT |
547 | select PLAT_PXA | |
0bd86961 | 548 | select SPARSE_IRQ |
788c9700 | 549 | help |
2f7e8fae | 550 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
551 | |
552 | config ARCH_KS8695 | |
553 | bool "Micrel/Kendin KS8695" | |
554 | select CPU_ARM922T | |
98830bc9 | 555 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 556 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
557 | help |
558 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
559 | System-on-Chip devices. | |
560 | ||
561 | config ARCH_NS9XXX | |
562 | bool "NetSilicon NS9xxx" | |
563 | select CPU_ARM926T | |
564 | select GENERIC_GPIO | |
788c9700 RK |
565 | select GENERIC_CLOCKEVENTS |
566 | select HAVE_CLK | |
567 | help | |
568 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
569 | System. | |
570 | ||
571 | <http://www.digi.com/products/microprocessors/index.jsp> | |
572 | ||
573 | config ARCH_W90X900 | |
574 | bool "Nuvoton W90X900 CPU" | |
575 | select CPU_ARM926T | |
c52d3d68 | 576 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 577 | select CLKDEV_LOOKUP |
58b5369e | 578 | select GENERIC_CLOCKEVENTS |
788c9700 | 579 | help |
a8bc4ead | 580 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
581 | At present, the w90x900 has been renamed nuc900, regarding | |
582 | the ARM series product line, you can login the following | |
583 | link address to know more. | |
584 | ||
585 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
586 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 587 | |
a62e9030 | 588 | config ARCH_NUC93X |
589 | bool "Nuvoton NUC93X CPU" | |
590 | select CPU_ARM926T | |
6d803ba7 | 591 | select CLKDEV_LOOKUP |
a62e9030 | 592 | help |
593 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
594 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
595 | ||
c5f80065 EG |
596 | config ARCH_TEGRA |
597 | bool "NVIDIA Tegra" | |
4073723a | 598 | select CLKDEV_LOOKUP |
c5f80065 EG |
599 | select GENERIC_TIME |
600 | select GENERIC_CLOCKEVENTS | |
601 | select GENERIC_GPIO | |
602 | select HAVE_CLK | |
e3f4c0ab | 603 | select HAVE_SCHED_CLOCK |
c5f80065 | 604 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 605 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
606 | help |
607 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
608 | Tegra 6xx and Tegra 2 series). | |
609 | ||
4af6fee1 DS |
610 | config ARCH_PNX4008 |
611 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 612 | select CPU_ARM926T |
6d803ba7 | 613 | select CLKDEV_LOOKUP |
5cfc8ee0 | 614 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
615 | help |
616 | This enables support for Philips PNX4008 mobile platform. | |
617 | ||
1da177e4 | 618 | config ARCH_PXA |
2c8086a5 | 619 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 620 | depends on MMU |
034d2f5a | 621 | select ARCH_MTD_XIP |
89c52ed4 | 622 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 623 | select CLKDEV_LOOKUP |
7444a72e | 624 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 625 | select GENERIC_CLOCKEVENTS |
7ce83018 | 626 | select HAVE_SCHED_CLOCK |
a88264c2 | 627 | select TICK_ONESHOT |
bd5ce433 | 628 | select PLAT_PXA |
6ac6b817 | 629 | select SPARSE_IRQ |
f999b8bd | 630 | help |
2c8086a5 | 631 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 632 | |
788c9700 RK |
633 | config ARCH_MSM |
634 | bool "Qualcomm MSM" | |
4b536b8d | 635 | select HAVE_CLK |
49cbe786 | 636 | select GENERIC_CLOCKEVENTS |
923a081c | 637 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 638 | help |
4b53eb4f DW |
639 | Support for Qualcomm MSM/QSD based systems. This runs on the |
640 | apps processor of the MSM/QSD and depends on a shared memory | |
641 | interface to the modem processor which runs the baseband | |
642 | stack and controls some vital subsystems | |
643 | (clock and power control, etc). | |
49cbe786 | 644 | |
c793c1b0 | 645 | config ARCH_SHMOBILE |
6d72ad35 PM |
646 | bool "Renesas SH-Mobile / R-Mobile" |
647 | select HAVE_CLK | |
5e93c6b4 | 648 | select CLKDEV_LOOKUP |
6d72ad35 PM |
649 | select GENERIC_CLOCKEVENTS |
650 | select NO_IOPORT | |
651 | select SPARSE_IRQ | |
60f1435c | 652 | select MULTI_IRQ_HANDLER |
c793c1b0 | 653 | help |
6d72ad35 | 654 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 655 | |
1da177e4 LT |
656 | config ARCH_RPC |
657 | bool "RiscPC" | |
658 | select ARCH_ACORN | |
659 | select FIQ | |
660 | select TIMER_ACORN | |
a08b6b79 | 661 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 662 | select HAVE_PATA_PLATFORM |
065909b9 | 663 | select ISA_DMA_API |
5ea81769 | 664 | select NO_IOPORT |
07f841b7 | 665 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 666 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
667 | help |
668 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
669 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
670 | ||
671 | config ARCH_SA1100 | |
672 | bool "SA1100-based" | |
c750815e | 673 | select CPU_SA1100 |
f7e68bbf | 674 | select ISA |
05944d74 | 675 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 676 | select ARCH_MTD_XIP |
89c52ed4 | 677 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 678 | select CPU_FREQ |
3e238be2 | 679 | select GENERIC_CLOCKEVENTS |
9483a578 | 680 | select HAVE_CLK |
5094b92f | 681 | select HAVE_SCHED_CLOCK |
3e238be2 | 682 | select TICK_ONESHOT |
7444a72e | 683 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
684 | help |
685 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
686 | |
687 | config ARCH_S3C2410 | |
63b1f51b | 688 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 689 | select GENERIC_GPIO |
9d56c02a | 690 | select ARCH_HAS_CPUFREQ |
9483a578 | 691 | select HAVE_CLK |
5cfc8ee0 | 692 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 693 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
694 | help |
695 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
696 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 697 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 698 | |
63b1f51b BD |
699 | Note, the S3C2416 and the S3C2450 are so close that they even share |
700 | the same SoC ID code. This means that there is no seperate machine | |
701 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
702 | ||
a08ab637 BD |
703 | config ARCH_S3C64XX |
704 | bool "Samsung S3C64XX" | |
89f1fa08 | 705 | select PLAT_SAMSUNG |
89f0ce72 | 706 | select CPU_V6 |
89f0ce72 | 707 | select ARM_VIC |
a08ab637 | 708 | select HAVE_CLK |
89f0ce72 | 709 | select NO_IOPORT |
5cfc8ee0 | 710 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 711 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
712 | select ARCH_REQUIRE_GPIOLIB |
713 | select SAMSUNG_CLKSRC | |
714 | select SAMSUNG_IRQ_VIC_TIMER | |
715 | select SAMSUNG_IRQ_UART | |
716 | select S3C_GPIO_TRACK | |
717 | select S3C_GPIO_PULL_UPDOWN | |
718 | select S3C_GPIO_CFG_S3C24XX | |
719 | select S3C_GPIO_CFG_S3C64XX | |
720 | select S3C_DEV_NAND | |
721 | select USB_ARCH_HAS_OHCI | |
722 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 723 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 724 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
725 | help |
726 | Samsung S3C64XX series based systems | |
727 | ||
49b7a491 KK |
728 | config ARCH_S5P64X0 |
729 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
730 | select CPU_V6 |
731 | select GENERIC_GPIO | |
732 | select HAVE_CLK | |
c39d8d55 | 733 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
925c68cd | 734 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 735 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 736 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 737 | help |
49b7a491 KK |
738 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
739 | SMDK6450. | |
c4ffccdd | 740 | |
550db7f1 KK |
741 | config ARCH_S5P6442 |
742 | bool "Samsung S5P6442" | |
743 | select CPU_V6 | |
744 | select GENERIC_GPIO | |
745 | select HAVE_CLK | |
925c68cd | 746 | select ARCH_USES_GETTIMEOFFSET |
c39d8d55 | 747 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
550db7f1 KK |
748 | help |
749 | Samsung S5P6442 CPU based systems | |
750 | ||
acc84707 MS |
751 | config ARCH_S5PC100 |
752 | bool "Samsung S5PC100" | |
5a7652f2 BM |
753 | select GENERIC_GPIO |
754 | select HAVE_CLK | |
755 | select CPU_V7 | |
d6d502fa | 756 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 757 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 758 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 759 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 760 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 761 | help |
acc84707 | 762 | Samsung S5PC100 series based systems |
5a7652f2 | 763 | |
170f4e42 KK |
764 | config ARCH_S5PV210 |
765 | bool "Samsung S5PV210/S5PC110" | |
766 | select CPU_V7 | |
eecb6a84 | 767 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
768 | select GENERIC_GPIO |
769 | select HAVE_CLK | |
770 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 771 | select ARCH_HAS_CPUFREQ |
925c68cd | 772 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 773 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 774 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 775 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
776 | help |
777 | Samsung S5PV210/S5PC110 series based systems | |
778 | ||
cc0e72b8 CY |
779 | config ARCH_S5PV310 |
780 | bool "Samsung S5PV310/S5PC210" | |
781 | select CPU_V7 | |
f567fa6f | 782 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
783 | select GENERIC_GPIO |
784 | select HAVE_CLK | |
b333fb16 | 785 | select ARCH_HAS_CPUFREQ |
cc0e72b8 | 786 | select GENERIC_CLOCKEVENTS |
754961a8 | 787 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 788 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 789 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 CY |
790 | help |
791 | Samsung S5PV310 series based systems | |
792 | ||
1da177e4 LT |
793 | config ARCH_SHARK |
794 | bool "Shark" | |
c750815e | 795 | select CPU_SA110 |
f7e68bbf RK |
796 | select ISA |
797 | select ISA_DMA | |
3bca103a | 798 | select ZONE_DMA |
f7e68bbf | 799 | select PCI |
5cfc8ee0 | 800 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
801 | help |
802 | Support for the StrongARM based Digital DNARD machine, also known | |
803 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 804 | |
83ef3338 HK |
805 | config ARCH_TCC_926 |
806 | bool "Telechips TCC ARM926-based systems" | |
807 | select CPU_ARM926T | |
808 | select HAVE_CLK | |
6d803ba7 | 809 | select CLKDEV_LOOKUP |
83ef3338 HK |
810 | select GENERIC_CLOCKEVENTS |
811 | help | |
812 | Support for Telechips TCC ARM926-based systems. | |
813 | ||
1da177e4 LT |
814 | config ARCH_LH7A40X |
815 | bool "Sharp LH7A40X" | |
c750815e | 816 | select CPU_ARM922T |
4ba3f7c5 | 817 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 818 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
819 | help |
820 | Say Y here for systems based on one of the Sharp LH7A40X | |
821 | System on a Chip processors. These CPUs include an ARM922T | |
822 | core with a wide array of integrated devices for | |
823 | hand-held and low-power applications. | |
824 | ||
d98aac75 LW |
825 | config ARCH_U300 |
826 | bool "ST-Ericsson U300 Series" | |
827 | depends on MMU | |
828 | select CPU_ARM926T | |
5c21b7ca | 829 | select HAVE_SCHED_CLOCK |
bc581770 | 830 | select HAVE_TCM |
d98aac75 LW |
831 | select ARM_AMBA |
832 | select ARM_VIC | |
d98aac75 | 833 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 834 | select CLKDEV_LOOKUP |
d98aac75 LW |
835 | select GENERIC_GPIO |
836 | help | |
837 | Support for ST-Ericsson U300 series mobile platforms. | |
838 | ||
ccf50e23 RK |
839 | config ARCH_U8500 |
840 | bool "ST-Ericsson U8500 Series" | |
841 | select CPU_V7 | |
842 | select ARM_AMBA | |
ccf50e23 | 843 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 844 | select CLKDEV_LOOKUP |
94bdc0e2 | 845 | select ARCH_REQUIRE_GPIOLIB |
7c1a70e9 | 846 | select ARCH_HAS_CPUFREQ |
ccf50e23 RK |
847 | help |
848 | Support for ST-Ericsson's Ux500 architecture | |
849 | ||
850 | config ARCH_NOMADIK | |
851 | bool "STMicroelectronics Nomadik" | |
852 | select ARM_AMBA | |
853 | select ARM_VIC | |
854 | select CPU_ARM926T | |
6d803ba7 | 855 | select CLKDEV_LOOKUP |
ccf50e23 | 856 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
857 | select ARCH_REQUIRE_GPIOLIB |
858 | help | |
859 | Support for the Nomadik platform by ST-Ericsson | |
860 | ||
7c6337e2 KH |
861 | config ARCH_DAVINCI |
862 | bool "TI DaVinci" | |
7c6337e2 | 863 | select GENERIC_CLOCKEVENTS |
dce1115b | 864 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 865 | select ZONE_DMA |
9232fcc9 | 866 | select HAVE_IDE |
6d803ba7 | 867 | select CLKDEV_LOOKUP |
20e9969b | 868 | select GENERIC_ALLOCATOR |
ae88e05a | 869 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
870 | help |
871 | Support for TI's DaVinci platform. | |
872 | ||
3b938be6 RK |
873 | config ARCH_OMAP |
874 | bool "TI OMAP" | |
9483a578 | 875 | select HAVE_CLK |
7444a72e | 876 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 877 | select ARCH_HAS_CPUFREQ |
06cad098 | 878 | select GENERIC_CLOCKEVENTS |
dc548fbb | 879 | select HAVE_SCHED_CLOCK |
9af915da | 880 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 881 | help |
6e457bb0 | 882 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 883 | |
cee37e50 VK |
884 | config PLAT_SPEAR |
885 | bool "ST SPEAr" | |
886 | select ARM_AMBA | |
887 | select ARCH_REQUIRE_GPIOLIB | |
6d803ba7 | 888 | select CLKDEV_LOOKUP |
cee37e50 | 889 | select GENERIC_CLOCKEVENTS |
cee37e50 VK |
890 | select HAVE_CLK |
891 | help | |
892 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
893 | ||
1da177e4 LT |
894 | endchoice |
895 | ||
ccf50e23 RK |
896 | # |
897 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
898 | # Kconfigs may be included either alphabetically (according to the | |
899 | # plat- suffix) or along side the corresponding mach-* source. | |
900 | # | |
95b8f20f RK |
901 | source "arch/arm/mach-aaec2000/Kconfig" |
902 | ||
903 | source "arch/arm/mach-at91/Kconfig" | |
904 | ||
905 | source "arch/arm/mach-bcmring/Kconfig" | |
906 | ||
1da177e4 LT |
907 | source "arch/arm/mach-clps711x/Kconfig" |
908 | ||
d94f944e AV |
909 | source "arch/arm/mach-cns3xxx/Kconfig" |
910 | ||
95b8f20f RK |
911 | source "arch/arm/mach-davinci/Kconfig" |
912 | ||
913 | source "arch/arm/mach-dove/Kconfig" | |
914 | ||
e7736d47 LB |
915 | source "arch/arm/mach-ep93xx/Kconfig" |
916 | ||
1da177e4 LT |
917 | source "arch/arm/mach-footbridge/Kconfig" |
918 | ||
59d3a193 PZ |
919 | source "arch/arm/mach-gemini/Kconfig" |
920 | ||
95b8f20f RK |
921 | source "arch/arm/mach-h720x/Kconfig" |
922 | ||
1da177e4 LT |
923 | source "arch/arm/mach-integrator/Kconfig" |
924 | ||
3f7e5815 LB |
925 | source "arch/arm/mach-iop32x/Kconfig" |
926 | ||
927 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 928 | |
285f5fa7 DW |
929 | source "arch/arm/mach-iop13xx/Kconfig" |
930 | ||
1da177e4 LT |
931 | source "arch/arm/mach-ixp4xx/Kconfig" |
932 | ||
933 | source "arch/arm/mach-ixp2000/Kconfig" | |
934 | ||
c4713074 LB |
935 | source "arch/arm/mach-ixp23xx/Kconfig" |
936 | ||
95b8f20f RK |
937 | source "arch/arm/mach-kirkwood/Kconfig" |
938 | ||
939 | source "arch/arm/mach-ks8695/Kconfig" | |
940 | ||
941 | source "arch/arm/mach-lh7a40x/Kconfig" | |
942 | ||
777f9beb LB |
943 | source "arch/arm/mach-loki/Kconfig" |
944 | ||
40805949 KW |
945 | source "arch/arm/mach-lpc32xx/Kconfig" |
946 | ||
95b8f20f RK |
947 | source "arch/arm/mach-msm/Kconfig" |
948 | ||
794d15b2 SS |
949 | source "arch/arm/mach-mv78xx0/Kconfig" |
950 | ||
95b8f20f | 951 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 952 | |
1d3f33d5 SG |
953 | source "arch/arm/mach-mxs/Kconfig" |
954 | ||
95b8f20f | 955 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 956 | |
95b8f20f RK |
957 | source "arch/arm/mach-nomadik/Kconfig" |
958 | source "arch/arm/plat-nomadik/Kconfig" | |
959 | ||
960 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 961 | |
186f93ea | 962 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 963 | |
d48af15e TL |
964 | source "arch/arm/plat-omap/Kconfig" |
965 | ||
966 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 967 | |
1dbae815 TL |
968 | source "arch/arm/mach-omap2/Kconfig" |
969 | ||
9dd0b194 | 970 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 971 | |
95b8f20f RK |
972 | source "arch/arm/mach-pxa/Kconfig" |
973 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 974 | |
95b8f20f RK |
975 | source "arch/arm/mach-mmp/Kconfig" |
976 | ||
977 | source "arch/arm/mach-realview/Kconfig" | |
978 | ||
979 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 980 | |
cf383678 | 981 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 982 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 983 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 984 | |
cee37e50 | 985 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 986 | |
83ef3338 HK |
987 | source "arch/arm/plat-tcc/Kconfig" |
988 | ||
a21765a7 BD |
989 | if ARCH_S3C2410 |
990 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 991 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 992 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 993 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 994 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 995 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 996 | endif |
1da177e4 | 997 | |
a08ab637 | 998 | if ARCH_S3C64XX |
431107ea | 999 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
1000 | endif |
1001 | ||
49b7a491 | 1002 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 1003 | |
550db7f1 | 1004 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 1005 | |
5a7652f2 | 1006 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 1007 | |
170f4e42 KK |
1008 | source "arch/arm/mach-s5pv210/Kconfig" |
1009 | ||
cc0e72b8 CY |
1010 | source "arch/arm/mach-s5pv310/Kconfig" |
1011 | ||
882d01f9 | 1012 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 1013 | |
882d01f9 | 1014 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 1015 | |
c5f80065 EG |
1016 | source "arch/arm/mach-tegra/Kconfig" |
1017 | ||
95b8f20f | 1018 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1019 | |
95b8f20f | 1020 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1021 | |
1022 | source "arch/arm/mach-versatile/Kconfig" | |
1023 | ||
ceade897 RK |
1024 | source "arch/arm/mach-vexpress/Kconfig" |
1025 | ||
7ec80ddf | 1026 | source "arch/arm/mach-w90x900/Kconfig" |
1027 | ||
1da177e4 LT |
1028 | # Definitions to make life easier |
1029 | config ARCH_ACORN | |
1030 | bool | |
1031 | ||
7ae1f7ec LB |
1032 | config PLAT_IOP |
1033 | bool | |
469d3044 | 1034 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1035 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1036 | |
69b02f6a LB |
1037 | config PLAT_ORION |
1038 | bool | |
f06a1624 | 1039 | select HAVE_SCHED_CLOCK |
69b02f6a | 1040 | |
bd5ce433 EM |
1041 | config PLAT_PXA |
1042 | bool | |
1043 | ||
f4b8b319 RK |
1044 | config PLAT_VERSATILE |
1045 | bool | |
1046 | ||
e3887714 RK |
1047 | config ARM_TIMER_SP804 |
1048 | bool | |
1049 | ||
1da177e4 LT |
1050 | source arch/arm/mm/Kconfig |
1051 | ||
afe4b25e LB |
1052 | config IWMMXT |
1053 | bool "Enable iWMMXt support" | |
ef6c8445 HZ |
1054 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1055 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | |
afe4b25e LB |
1056 | help |
1057 | Enable support for iWMMXt context switching at run time if | |
1058 | running on a CPU that supports it. | |
1059 | ||
1da177e4 LT |
1060 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1061 | config XSCALE_PMU | |
1062 | bool | |
1063 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1064 | default y | |
1065 | ||
0f4f0672 | 1066 | config CPU_HAS_PMU |
8954bb0d WD |
1067 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
1068 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
1069 | default y |
1070 | bool | |
1071 | ||
52108641 | 1072 | config MULTI_IRQ_HANDLER |
1073 | bool | |
1074 | help | |
1075 | Allow each machine to specify it's own IRQ handler at run time. | |
1076 | ||
3b93e7b0 HC |
1077 | if !MMU |
1078 | source "arch/arm/Kconfig-nommu" | |
1079 | endif | |
1080 | ||
9cba3ccc CM |
1081 | config ARM_ERRATA_411920 |
1082 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
81d11955 | 1083 | depends on CPU_V6 |
9cba3ccc CM |
1084 | help |
1085 | Invalidation of the Instruction Cache operation can | |
1086 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1087 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1088 | recommended workaround. | |
1089 | ||
7ce236fc CM |
1090 | config ARM_ERRATA_430973 |
1091 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1092 | depends on CPU_V7 | |
1093 | help | |
1094 | This option enables the workaround for the 430973 Cortex-A8 | |
1095 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1096 | interworking branch is replaced with another code sequence at the | |
1097 | same virtual address, whether due to self-modifying code or virtual | |
1098 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1099 | stale interworking branch prediction. This results in Cortex-A8 | |
1100 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1101 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1102 | and also flushes the branch target cache at every context switch. | |
1103 | Note that setting specific bits in the ACTLR register may not be | |
1104 | available in non-secure mode. | |
1105 | ||
855c551f CM |
1106 | config ARM_ERRATA_458693 |
1107 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1108 | depends on CPU_V7 | |
1109 | help | |
1110 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1111 | erratum. For very specific sequences of memory operations, it is | |
1112 | possible for a hazard condition intended for a cache line to instead | |
1113 | be incorrectly associated with a different cache line. This false | |
1114 | hazard might then cause a processor deadlock. The workaround enables | |
1115 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1116 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1117 | register may not be available in non-secure mode. | |
1118 | ||
0516e464 CM |
1119 | config ARM_ERRATA_460075 |
1120 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1121 | depends on CPU_V7 | |
1122 | help | |
1123 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1124 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1125 | situation in which recent store transactions to the L2 cache are lost | |
1126 | and overwritten with stale memory contents from external memory. The | |
1127 | workaround disables the write-allocate mode for the L2 cache via the | |
1128 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1129 | may not be available in non-secure mode. | |
1130 | ||
9f05027c WD |
1131 | config ARM_ERRATA_742230 |
1132 | bool "ARM errata: DMB operation may be faulty" | |
1133 | depends on CPU_V7 && SMP | |
1134 | help | |
1135 | This option enables the workaround for the 742230 Cortex-A9 | |
1136 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1137 | between two write operations may not ensure the correct visibility | |
1138 | ordering of the two writes. This workaround sets a specific bit in | |
1139 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1140 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1141 | the two writes. | |
1142 | ||
a672e99b WD |
1143 | config ARM_ERRATA_742231 |
1144 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1145 | depends on CPU_V7 && SMP | |
1146 | help | |
1147 | This option enables the workaround for the 742231 Cortex-A9 | |
1148 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1149 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1150 | accessing some data located in the same cache line, may get corrupted | |
1151 | data due to bad handling of the address hazard when the line gets | |
1152 | replaced from one of the CPUs at the same time as another CPU is | |
1153 | accessing it. This workaround sets specific bits in the diagnostic | |
1154 | register of the Cortex-A9 which reduces the linefill issuing | |
1155 | capabilities of the processor. | |
1156 | ||
9e65582a SS |
1157 | config PL310_ERRATA_588369 |
1158 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
1159 | depends on CACHE_L2X0 && ARCH_OMAP4 | |
1160 | help | |
1161 | The PL310 L2 cache controller implements three types of Clean & | |
1162 | Invalidate maintenance operations: by Physical Address | |
1163 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1164 | They are architecturally defined to behave as the execution of a | |
1165 | clean operation followed immediately by an invalidate operation, | |
1166 | both performing to the same memory location. This functionality | |
1167 | is not correctly implemented in PL310 as clean lines are not | |
1168 | invalidated as a result of these operations. Note that this errata | |
1169 | uses Texas Instrument's secure monitor api. | |
cdf357f1 WD |
1170 | |
1171 | config ARM_ERRATA_720789 | |
1172 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1173 | depends on CPU_V7 && SMP | |
1174 | help | |
1175 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1176 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1177 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1178 | As a consequence of this erratum, some TLB entries which should be | |
1179 | invalidated are not, resulting in an incoherency in the system page | |
1180 | tables. The workaround changes the TLB flushing routines to invalidate | |
1181 | entries regardless of the ASID. | |
475d92fc WD |
1182 | |
1183 | config ARM_ERRATA_743622 | |
1184 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1185 | depends on CPU_V7 | |
1186 | help | |
1187 | This option enables the workaround for the 743622 Cortex-A9 | |
1188 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1189 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1190 | corruption. This workaround sets a specific bit in the diagnostic | |
1191 | register of the Cortex-A9 which disables the Store Buffer | |
1192 | optimisation, preventing the defect from occurring. This has no | |
1193 | visible impact on the overall performance or power consumption of the | |
1194 | processor. | |
1195 | ||
1da177e4 LT |
1196 | endmenu |
1197 | ||
1198 | source "arch/arm/common/Kconfig" | |
1199 | ||
1da177e4 LT |
1200 | menu "Bus support" |
1201 | ||
1202 | config ARM_AMBA | |
1203 | bool | |
1204 | ||
1205 | config ISA | |
1206 | bool | |
1da177e4 LT |
1207 | help |
1208 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1209 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1210 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1211 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1212 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1213 | ||
065909b9 | 1214 | # Select ISA DMA controller support |
1da177e4 LT |
1215 | config ISA_DMA |
1216 | bool | |
065909b9 | 1217 | select ISA_DMA_API |
1da177e4 | 1218 | |
065909b9 | 1219 | # Select ISA DMA interface |
5cae841b AV |
1220 | config ISA_DMA_API |
1221 | bool | |
5cae841b | 1222 | |
1da177e4 | 1223 | config PCI |
0b05da72 | 1224 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1225 | help |
1226 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1227 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1228 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1229 | VESA. If you have PCI, say Y, otherwise N. | |
1230 | ||
52882173 AV |
1231 | config PCI_DOMAINS |
1232 | bool | |
1233 | depends on PCI | |
1234 | ||
b080ac8a MRJ |
1235 | config PCI_NANOENGINE |
1236 | bool "BSE nanoEngine PCI support" | |
1237 | depends on SA1100_NANOENGINE | |
1238 | help | |
1239 | Enable PCI on the BSE nanoEngine board. | |
1240 | ||
36e23590 MW |
1241 | config PCI_SYSCALL |
1242 | def_bool PCI | |
1243 | ||
1da177e4 LT |
1244 | # Select the host bridge type |
1245 | config PCI_HOST_VIA82C505 | |
1246 | bool | |
1247 | depends on PCI && ARCH_SHARK | |
1248 | default y | |
1249 | ||
a0113a99 MR |
1250 | config PCI_HOST_ITE8152 |
1251 | bool | |
1252 | depends on PCI && MACH_ARMCORE | |
1253 | default y | |
1254 | select DMABOUNCE | |
1255 | ||
1da177e4 LT |
1256 | source "drivers/pci/Kconfig" |
1257 | ||
1258 | source "drivers/pcmcia/Kconfig" | |
1259 | ||
1260 | endmenu | |
1261 | ||
1262 | menu "Kernel Features" | |
1263 | ||
0567a0c0 KH |
1264 | source "kernel/time/Kconfig" |
1265 | ||
1da177e4 LT |
1266 | config SMP |
1267 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
971acb9b | 1268 | depends on EXPERIMENTAL |
bc28248e | 1269 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1270 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf DW |
1271 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1272 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
e9d728f5 | 1273 | ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE |
f6dd9fa5 | 1274 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1275 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1276 | help |
1277 | This enables support for systems with more than one CPU. If you have | |
1278 | a system with only one CPU, like most personal computers, say N. If | |
1279 | you have a system with more than one CPU, say Y. | |
1280 | ||
1281 | If you say N here, the kernel will run on single and multiprocessor | |
1282 | machines, but will use only one CPU of a multiprocessor machine. If | |
1283 | you say Y here, the kernel will run on many, but not all, single | |
1284 | processor machines. On a single processor machine, the kernel will | |
1285 | run faster if you say N here. | |
1286 | ||
03502faa | 1287 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1288 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1289 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1290 | |
1291 | If you don't know what to do here, say N. | |
1292 | ||
f00ec48f RK |
1293 | config SMP_ON_UP |
1294 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1295 | depends on EXPERIMENTAL | |
4d2692a7 | 1296 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1297 | default y |
1298 | help | |
1299 | SMP kernels contain instructions which fail on non-SMP processors. | |
1300 | Enabling this option allows the kernel to modify itself to make | |
1301 | these instructions safe. Disabling it allows about 1K of space | |
1302 | savings. | |
1303 | ||
1304 | If you don't know what to do here, say Y. | |
1305 | ||
a8cbcd92 RK |
1306 | config HAVE_ARM_SCU |
1307 | bool | |
1308 | depends on SMP | |
1309 | help | |
1310 | This option enables support for the ARM system coherency unit | |
1311 | ||
f32f4ce2 RK |
1312 | config HAVE_ARM_TWD |
1313 | bool | |
1314 | depends on SMP | |
15095bb0 | 1315 | select TICK_ONESHOT |
f32f4ce2 RK |
1316 | help |
1317 | This options enables support for the ARM timer and watchdog unit | |
1318 | ||
8d5796d2 LB |
1319 | choice |
1320 | prompt "Memory split" | |
1321 | default VMSPLIT_3G | |
1322 | help | |
1323 | Select the desired split between kernel and user memory. | |
1324 | ||
1325 | If you are not absolutely sure what you are doing, leave this | |
1326 | option alone! | |
1327 | ||
1328 | config VMSPLIT_3G | |
1329 | bool "3G/1G user/kernel split" | |
1330 | config VMSPLIT_2G | |
1331 | bool "2G/2G user/kernel split" | |
1332 | config VMSPLIT_1G | |
1333 | bool "1G/3G user/kernel split" | |
1334 | endchoice | |
1335 | ||
1336 | config PAGE_OFFSET | |
1337 | hex | |
1338 | default 0x40000000 if VMSPLIT_1G | |
1339 | default 0x80000000 if VMSPLIT_2G | |
1340 | default 0xC0000000 | |
1341 | ||
1da177e4 LT |
1342 | config NR_CPUS |
1343 | int "Maximum number of CPUs (2-32)" | |
1344 | range 2 32 | |
1345 | depends on SMP | |
1346 | default "4" | |
1347 | ||
a054a811 RK |
1348 | config HOTPLUG_CPU |
1349 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1350 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
176bfc44 | 1351 | depends on !ARCH_MSM |
a054a811 RK |
1352 | help |
1353 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1354 | can be controlled through /sys/devices/system/cpu. | |
1355 | ||
37ee16ae RK |
1356 | config LOCAL_TIMERS |
1357 | bool "Use local timer interrupts" | |
971acb9b | 1358 | depends on SMP |
37ee16ae | 1359 | default y |
89c3dedf | 1360 | select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP |
37ee16ae RK |
1361 | help |
1362 | Enable support for local timers on SMP platforms, rather then the | |
1363 | legacy IPI broadcast method. Local timers allows the system | |
1364 | accounting to be spread across the timer interval, preventing a | |
1365 | "thundering herd" at every timer tick. | |
1366 | ||
d45a398f | 1367 | source kernel/Kconfig.preempt |
1da177e4 | 1368 | |
f8065813 RK |
1369 | config HZ |
1370 | int | |
49b7a491 | 1371 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
2192482e | 1372 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
bfe65704 | 1373 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1374 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1375 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1376 | default 100 |
1377 | ||
16c79651 | 1378 | config THUMB2_KERNEL |
4a50bfe3 | 1379 | bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" |
6e6fc998 | 1380 | depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL |
16c79651 CM |
1381 | select AEABI |
1382 | select ARM_ASM_UNIFIED | |
1383 | help | |
1384 | By enabling this option, the kernel will be compiled in | |
1385 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1386 | ARM-Thumb syntax is needed. | |
1387 | ||
1388 | If unsure, say N. | |
1389 | ||
0becb088 CM |
1390 | config ARM_ASM_UNIFIED |
1391 | bool | |
1392 | ||
704bdda0 NP |
1393 | config AEABI |
1394 | bool "Use the ARM EABI to compile the kernel" | |
1395 | help | |
1396 | This option allows for the kernel to be compiled using the latest | |
1397 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1398 | space environment that is also compiled with EABI. | |
1399 | ||
1400 | Since there are major incompatibilities between the legacy ABI and | |
1401 | EABI, especially with regard to structure member alignment, this | |
1402 | option also changes the kernel syscall calling convention to | |
1403 | disambiguate both ABIs and allow for backward compatibility support | |
1404 | (selected with CONFIG_OABI_COMPAT). | |
1405 | ||
1406 | To use this you need GCC version 4.0.0 or later. | |
1407 | ||
6c90c872 | 1408 | config OABI_COMPAT |
a73a3ff1 | 1409 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1410 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1411 | default y |
1412 | help | |
1413 | This option preserves the old syscall interface along with the | |
1414 | new (ARM EABI) one. It also provides a compatibility layer to | |
1415 | intercept syscalls that have structure arguments which layout | |
1416 | in memory differs between the legacy ABI and the new ARM EABI | |
1417 | (only for non "thumb" binaries). This option adds a tiny | |
1418 | overhead to all syscalls and produces a slightly larger kernel. | |
1419 | If you know you'll be using only pure EABI user space then you | |
1420 | can say N here. If this option is not selected and you attempt | |
1421 | to execute a legacy ABI binary then the result will be | |
1422 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1423 | at all). If in doubt say Y. | |
1424 | ||
eb33575c | 1425 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1426 | bool |
e80d6a24 | 1427 | |
05944d74 RK |
1428 | config ARCH_SPARSEMEM_ENABLE |
1429 | bool | |
1430 | ||
07a2f737 RK |
1431 | config ARCH_SPARSEMEM_DEFAULT |
1432 | def_bool ARCH_SPARSEMEM_ENABLE | |
1433 | ||
05944d74 | 1434 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1435 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1436 | |
053a96ca NP |
1437 | config HIGHMEM |
1438 | bool "High Memory Support (EXPERIMENTAL)" | |
1439 | depends on MMU && EXPERIMENTAL | |
1440 | help | |
1441 | The address space of ARM processors is only 4 Gigabytes large | |
1442 | and it has to accommodate user address space, kernel address | |
1443 | space as well as some memory mapped IO. That means that, if you | |
1444 | have a large amount of physical memory and/or IO, not all of the | |
1445 | memory can be "permanently mapped" by the kernel. The physical | |
1446 | memory that is not permanently mapped is called "high memory". | |
1447 | ||
1448 | Depending on the selected kernel/user memory split, minimum | |
1449 | vmalloc space and actual amount of RAM, you may not need this | |
1450 | option which should result in a slightly faster kernel. | |
1451 | ||
1452 | If unsure, say n. | |
1453 | ||
65cec8e3 RK |
1454 | config HIGHPTE |
1455 | bool "Allocate 2nd-level pagetables from highmem" | |
1456 | depends on HIGHMEM | |
1457 | depends on !OUTER_CACHE | |
1458 | ||
1b8873a0 JI |
1459 | config HW_PERF_EVENTS |
1460 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1461 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1462 | default y |
1463 | help | |
1464 | Enable hardware performance counter support for perf events. If | |
1465 | disabled, perf events will use software events only. | |
1466 | ||
3f22ab27 DH |
1467 | source "mm/Kconfig" |
1468 | ||
c1b2d970 MD |
1469 | config FORCE_MAX_ZONEORDER |
1470 | int "Maximum zone order" if ARCH_SHMOBILE | |
1471 | range 11 64 if ARCH_SHMOBILE | |
1472 | default "9" if SA1111 | |
1473 | default "11" | |
1474 | help | |
1475 | The kernel memory allocator divides physically contiguous memory | |
1476 | blocks into "zones", where each zone is a power of two number of | |
1477 | pages. This option selects the largest power of two that the kernel | |
1478 | keeps in the memory allocator. If you need to allocate very large | |
1479 | blocks of physically contiguous memory, then you may need to | |
1480 | increase this value. | |
1481 | ||
1482 | This config option is actually maximum order plus one. For example, | |
1483 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1484 | ||
1da177e4 LT |
1485 | config LEDS |
1486 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1487 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1488 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1489 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1490 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1491 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1492 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1493 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1494 | help |
1495 | If you say Y here, the LEDs on your machine will be used | |
1496 | to provide useful information about your current system status. | |
1497 | ||
1498 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1499 | be able to select which LEDs are active using the options below. If | |
1500 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1501 | red LED will simply flash regularly to indicate that the system is | |
1502 | still functional. It is safe to say Y here if you have a CATS | |
1503 | system, but the driver will do nothing. | |
1504 | ||
1505 | config LEDS_TIMER | |
1506 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1507 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1508 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1509 | depends on LEDS |
0567a0c0 | 1510 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1511 | default y if ARCH_EBSA110 |
1512 | help | |
1513 | If you say Y here, one of the system LEDs (the green one on the | |
1514 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1515 | will flash regularly to indicate that the system is still | |
1516 | operational. This is mainly useful to kernel hackers who are | |
1517 | debugging unstable kernels. | |
1518 | ||
1519 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1520 | functions. You may choose to use both, but the Timer LED function | |
1521 | will overrule the CPU usage LED. | |
1522 | ||
1523 | config LEDS_CPU | |
1524 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1525 | !ARCH_OMAP) \ |
1526 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1527 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1528 | depends on LEDS |
1529 | help | |
1530 | If you say Y here, the red LED will be used to give a good real | |
1531 | time indication of CPU usage, by lighting whenever the idle task | |
1532 | is not currently executing. | |
1533 | ||
1534 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1535 | functions. You may choose to use both, but the Timer LED function | |
1536 | will overrule the CPU usage LED. | |
1537 | ||
1538 | config ALIGNMENT_TRAP | |
1539 | bool | |
f12d0d7c | 1540 | depends on CPU_CP15_MMU |
1da177e4 | 1541 | default y if !ARCH_EBSA110 |
e119bfff | 1542 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1543 | help |
84eb8d06 | 1544 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1545 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1546 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1547 | fetch/store instructions will be emulated in software if you say | |
1548 | here, which has a severe performance impact. This is necessary for | |
1549 | correct operation of some network protocols. With an IP-only | |
1550 | configuration it is safe to say N, otherwise say Y. | |
1551 | ||
39ec58f3 LB |
1552 | config UACCESS_WITH_MEMCPY |
1553 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1554 | depends on MMU && EXPERIMENTAL | |
1555 | default y if CPU_FEROCEON | |
1556 | help | |
1557 | Implement faster copy_to_user and clear_user methods for CPU | |
1558 | cores where a 8-word STM instruction give significantly higher | |
1559 | memory write throughput than a sequence of individual 32bit stores. | |
1560 | ||
1561 | A possible side effect is a slight increase in scheduling latency | |
1562 | between threads sharing the same address space if they invoke | |
1563 | such copy operations with large buffers. | |
1564 | ||
1565 | However, if the CPU data cache is using a write-allocate mode, | |
1566 | this option is unlikely to provide any performance gain. | |
1567 | ||
70c70d97 NP |
1568 | config SECCOMP |
1569 | bool | |
1570 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1571 | ---help--- | |
1572 | This kernel feature is useful for number crunching applications | |
1573 | that may need to compute untrusted bytecode during their | |
1574 | execution. By using pipes or other transports made available to | |
1575 | the process as file descriptors supporting the read/write | |
1576 | syscalls, it's possible to isolate those applications in | |
1577 | their own address space using seccomp. Once seccomp is | |
1578 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1579 | and the task is only allowed to execute a few safe syscalls | |
1580 | defined by each seccomp mode. | |
1581 | ||
c743f380 NP |
1582 | config CC_STACKPROTECTOR |
1583 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1584 | depends on EXPERIMENTAL |
c743f380 NP |
1585 | help |
1586 | This option turns on the -fstack-protector GCC feature. This | |
1587 | feature puts, at the beginning of functions, a canary value on | |
1588 | the stack just before the return address, and validates | |
1589 | the value just before actually returning. Stack based buffer | |
1590 | overflows (that need to overwrite this return address) now also | |
1591 | overwrite the canary, which gets detected and the attack is then | |
1592 | neutralized via a kernel panic. | |
1593 | This feature requires gcc version 4.2 or above. | |
1594 | ||
73a65b3f UKK |
1595 | config DEPRECATED_PARAM_STRUCT |
1596 | bool "Provide old way to pass kernel parameters" | |
1597 | help | |
1598 | This was deprecated in 2001 and announced to live on for 5 years. | |
1599 | Some old boot loaders still use this way. | |
1600 | ||
1da177e4 LT |
1601 | endmenu |
1602 | ||
1603 | menu "Boot options" | |
1604 | ||
1605 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1606 | # TEXT and BSS so we preserve their values in the config files. | |
1607 | config ZBOOT_ROM_TEXT | |
1608 | hex "Compressed ROM boot loader base address" | |
1609 | default "0" | |
1610 | help | |
1611 | The physical address at which the ROM-able zImage is to be | |
1612 | placed in the target. Platforms which normally make use of | |
1613 | ROM-able zImage formats normally set this to a suitable | |
1614 | value in their defconfig file. | |
1615 | ||
1616 | If ZBOOT_ROM is not enabled, this has no effect. | |
1617 | ||
1618 | config ZBOOT_ROM_BSS | |
1619 | hex "Compressed ROM boot loader BSS address" | |
1620 | default "0" | |
1621 | help | |
f8c440b2 DF |
1622 | The base address of an area of read/write memory in the target |
1623 | for the ROM-able zImage which must be available while the | |
1624 | decompressor is running. It must be large enough to hold the | |
1625 | entire decompressed kernel plus an additional 128 KiB. | |
1626 | Platforms which normally make use of ROM-able zImage formats | |
1627 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1628 | |
1629 | If ZBOOT_ROM is not enabled, this has no effect. | |
1630 | ||
1631 | config ZBOOT_ROM | |
1632 | bool "Compressed boot loader in ROM/flash" | |
1633 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1634 | help | |
1635 | Say Y here if you intend to execute your compressed kernel image | |
1636 | (zImage) directly from ROM or flash. If unsure, say N. | |
1637 | ||
1638 | config CMDLINE | |
1639 | string "Default kernel command string" | |
1640 | default "" | |
1641 | help | |
1642 | On some architectures (EBSA110 and CATS), there is currently no way | |
1643 | for the boot loader to pass arguments to the kernel. For these | |
1644 | architectures, you should supply some command-line options at build | |
1645 | time by entering them here. As a minimum, you should specify the | |
1646 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1647 | ||
92d2040d AH |
1648 | config CMDLINE_FORCE |
1649 | bool "Always use the default kernel command string" | |
1650 | depends on CMDLINE != "" | |
1651 | help | |
1652 | Always use the default kernel command string, even if the boot | |
1653 | loader passes other arguments to the kernel. | |
1654 | This is useful if you cannot or don't want to change the | |
1655 | command-line options your boot loader passes to the kernel. | |
1656 | ||
1657 | If unsure, say N. | |
1658 | ||
1da177e4 LT |
1659 | config XIP_KERNEL |
1660 | bool "Kernel Execute-In-Place from ROM" | |
1661 | depends on !ZBOOT_ROM | |
1662 | help | |
1663 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1664 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1665 | space since the text section of the kernel is not loaded from flash | |
1666 | to RAM. Read-write sections, such as the data section and stack, | |
1667 | are still copied to RAM. The XIP kernel is not compressed since | |
1668 | it has to run directly from flash, so it will take more space to | |
1669 | store it. The flash address used to link the kernel object files, | |
1670 | and for storing it, is configuration dependent. Therefore, if you | |
1671 | say Y here, you must know the proper physical address where to | |
1672 | store the kernel image depending on your own flash memory usage. | |
1673 | ||
1674 | Also note that the make target becomes "make xipImage" rather than | |
1675 | "make zImage" or "make Image". The final kernel binary to put in | |
1676 | ROM memory will be arch/arm/boot/xipImage. | |
1677 | ||
1678 | If unsure, say N. | |
1679 | ||
1680 | config XIP_PHYS_ADDR | |
1681 | hex "XIP Kernel Physical Location" | |
1682 | depends on XIP_KERNEL | |
1683 | default "0x00080000" | |
1684 | help | |
1685 | This is the physical address in your flash memory the kernel will | |
1686 | be linked for and stored to. This address is dependent on your | |
1687 | own flash usage. | |
1688 | ||
c587e4a6 RP |
1689 | config KEXEC |
1690 | bool "Kexec system call (EXPERIMENTAL)" | |
1691 | depends on EXPERIMENTAL | |
1692 | help | |
1693 | kexec is a system call that implements the ability to shutdown your | |
1694 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1695 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1696 | you can start any kernel with it, not just Linux. |
1697 | ||
1698 | It is an ongoing process to be certain the hardware in a machine | |
1699 | is properly shutdown, so do not be surprised if this code does not | |
1700 | initially work for you. It may help to enable device hotplugging | |
1701 | support. | |
1702 | ||
4cd9d6f7 RP |
1703 | config ATAGS_PROC |
1704 | bool "Export atags in procfs" | |
b98d7291 UL |
1705 | depends on KEXEC |
1706 | default y | |
4cd9d6f7 RP |
1707 | help |
1708 | Should the atags used to boot the kernel be exported in an "atags" | |
1709 | file in procfs. Useful with kexec. | |
1710 | ||
cb5d39b3 MW |
1711 | config CRASH_DUMP |
1712 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
1713 | depends on EXPERIMENTAL | |
1714 | help | |
1715 | Generate crash dump after being started by kexec. This should | |
1716 | be normally only set in special crash dump kernels which are | |
1717 | loaded in the main kernel with kexec-tools into a specially | |
1718 | reserved region and then later executed after a crash by | |
1719 | kdump/kexec. The crash dump kernel must be compiled to a | |
1720 | memory address not used by the main kernel | |
1721 | ||
1722 | For more details see Documentation/kdump/kdump.txt | |
1723 | ||
e69edc79 EM |
1724 | config AUTO_ZRELADDR |
1725 | bool "Auto calculation of the decompressed kernel image address" | |
1726 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1727 | help | |
1728 | ZRELADDR is the physical address where the decompressed kernel | |
1729 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1730 | will be determined at run-time by masking the current IP with | |
1731 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1732 | from start of memory. | |
1733 | ||
1da177e4 LT |
1734 | endmenu |
1735 | ||
ac9d7efc | 1736 | menu "CPU Power Management" |
1da177e4 | 1737 | |
89c52ed4 | 1738 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1739 | |
1740 | source "drivers/cpufreq/Kconfig" | |
1741 | ||
64f102b6 YS |
1742 | config CPU_FREQ_IMX |
1743 | tristate "CPUfreq driver for i.MX CPUs" | |
1744 | depends on ARCH_MXC && CPU_FREQ | |
1745 | help | |
1746 | This enables the CPUfreq driver for i.MX CPUs. | |
1747 | ||
1da177e4 LT |
1748 | config CPU_FREQ_SA1100 |
1749 | bool | |
1da177e4 LT |
1750 | |
1751 | config CPU_FREQ_SA1110 | |
1752 | bool | |
1da177e4 LT |
1753 | |
1754 | config CPU_FREQ_INTEGRATOR | |
1755 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1756 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1757 | default y | |
1758 | help | |
1759 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1760 | ||
1761 | For details, take a look at <file:Documentation/cpu-freq>. | |
1762 | ||
1763 | If in doubt, say Y. | |
1764 | ||
9e2697ff RK |
1765 | config CPU_FREQ_PXA |
1766 | bool | |
1767 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1768 | default y | |
1769 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1770 | ||
b3748ddd MB |
1771 | config CPU_FREQ_S3C64XX |
1772 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1773 | depends on CPU_FREQ && CPU_S3C6410 | |
1774 | ||
9d56c02a BD |
1775 | config CPU_FREQ_S3C |
1776 | bool | |
1777 | help | |
1778 | Internal configuration node for common cpufreq on Samsung SoC | |
1779 | ||
1780 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 1781 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
9d56c02a BD |
1782 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL |
1783 | select CPU_FREQ_S3C | |
1784 | help | |
1785 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1786 | of CPUs. | |
1787 | ||
1788 | For details, take a look at <file:Documentation/cpu-freq>. | |
1789 | ||
1790 | If in doubt, say N. | |
1791 | ||
1792 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 1793 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
1794 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
1795 | help | |
1796 | Compile in support for changing the PLL frequency from the | |
1797 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1798 | after a frequency change, so by default it is not enabled. | |
1799 | ||
1800 | This also means that the PLL tables for the selected CPU(s) will | |
1801 | be built which may increase the size of the kernel image. | |
1802 | ||
1803 | config CPU_FREQ_S3C24XX_DEBUG | |
1804 | bool "Debug CPUfreq Samsung driver core" | |
1805 | depends on CPU_FREQ_S3C24XX | |
1806 | help | |
1807 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1808 | ||
1809 | config CPU_FREQ_S3C24XX_IODEBUG | |
1810 | bool "Debug CPUfreq Samsung driver IO timing" | |
1811 | depends on CPU_FREQ_S3C24XX | |
1812 | help | |
1813 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1814 | ||
e6d197a6 BD |
1815 | config CPU_FREQ_S3C24XX_DEBUGFS |
1816 | bool "Export debugfs for CPUFreq" | |
1817 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1818 | help | |
1819 | Export status information via debugfs. | |
1820 | ||
1da177e4 LT |
1821 | endif |
1822 | ||
ac9d7efc RK |
1823 | source "drivers/cpuidle/Kconfig" |
1824 | ||
1825 | endmenu | |
1826 | ||
1da177e4 LT |
1827 | menu "Floating point emulation" |
1828 | ||
1829 | comment "At least one emulation must be selected" | |
1830 | ||
1831 | config FPE_NWFPE | |
1832 | bool "NWFPE math emulation" | |
593c252a | 1833 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
1834 | ---help--- |
1835 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1836 | This is necessary to run most binaries. Linux does not currently | |
1837 | support floating point hardware so you need to say Y here even if | |
1838 | your machine has an FPA or floating point co-processor podule. | |
1839 | ||
1840 | You may say N here if you are going to load the Acorn FPEmulator | |
1841 | early in the bootup. | |
1842 | ||
1843 | config FPE_NWFPE_XP | |
1844 | bool "Support extended precision" | |
bedf142b | 1845 | depends on FPE_NWFPE |
1da177e4 LT |
1846 | help |
1847 | Say Y to include 80-bit support in the kernel floating-point | |
1848 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1849 | Note that gcc does not generate 80-bit operations by default, | |
1850 | so in most cases this option only enlarges the size of the | |
1851 | floating point emulator without any good reason. | |
1852 | ||
1853 | You almost surely want to say N here. | |
1854 | ||
1855 | config FPE_FASTFPE | |
1856 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1857 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1858 | ---help--- |
1859 | Say Y here to include the FAST floating point emulator in the kernel. | |
1860 | This is an experimental much faster emulator which now also has full | |
1861 | precision for the mantissa. It does not support any exceptions. | |
1862 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1863 | ||
1864 | It should be sufficient for most programs. It may be not suitable | |
1865 | for scientific calculations, but you have to check this for yourself. | |
1866 | If you do not feel you need a faster FP emulation you should better | |
1867 | choose NWFPE. | |
1868 | ||
1869 | config VFP | |
1870 | bool "VFP-format floating point maths" | |
c00d4ffd | 1871 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1872 | help |
1873 | Say Y to include VFP support code in the kernel. This is needed | |
1874 | if your hardware includes a VFP unit. | |
1875 | ||
1876 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1877 | release notes and additional status information. | |
1878 | ||
1879 | Say N if your target does not have VFP hardware. | |
1880 | ||
25ebee02 CM |
1881 | config VFPv3 |
1882 | bool | |
1883 | depends on VFP | |
1884 | default y if CPU_V7 | |
1885 | ||
b5872db4 CM |
1886 | config NEON |
1887 | bool "Advanced SIMD (NEON) Extension support" | |
1888 | depends on VFPv3 && CPU_V7 | |
1889 | help | |
1890 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1891 | Extension. | |
1892 | ||
1da177e4 LT |
1893 | endmenu |
1894 | ||
1895 | menu "Userspace binary formats" | |
1896 | ||
1897 | source "fs/Kconfig.binfmt" | |
1898 | ||
1899 | config ARTHUR | |
1900 | tristate "RISC OS personality" | |
704bdda0 | 1901 | depends on !AEABI |
1da177e4 LT |
1902 | help |
1903 | Say Y here to include the kernel code necessary if you want to run | |
1904 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1905 | experimental; if this sounds frightening, say N and sleep in peace. | |
1906 | You can also say M here to compile this support as a module (which | |
1907 | will be called arthur). | |
1908 | ||
1909 | endmenu | |
1910 | ||
1911 | menu "Power management options" | |
1912 | ||
eceab4ac | 1913 | source "kernel/power/Kconfig" |
1da177e4 | 1914 | |
f4cb5700 JB |
1915 | config ARCH_SUSPEND_POSSIBLE |
1916 | def_bool y | |
1917 | ||
1da177e4 LT |
1918 | endmenu |
1919 | ||
d5950b43 SR |
1920 | source "net/Kconfig" |
1921 | ||
ac25150f | 1922 | source "drivers/Kconfig" |
1da177e4 LT |
1923 | |
1924 | source "fs/Kconfig" | |
1925 | ||
1da177e4 LT |
1926 | source "arch/arm/Kconfig.debug" |
1927 | ||
1928 | source "security/Kconfig" | |
1929 | ||
1930 | source "crypto/Kconfig" | |
1931 | ||
1932 | source "lib/Kconfig" |