]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/Kconfig
ARM: 6741/1: errata: pl310 cache sync operation may be faulty
[mirror_ubuntu-artful-kernel.git] / arch / arm / Kconfig
CommitLineData
1da177e4
LT
1config ARM
2 bool
3 default y
e17c6d56 4 select HAVE_AOUT
24056f52 5 select HAVE_DMA_API_DEBUG
2064c946 6 select HAVE_IDE
2778f620 7 select HAVE_MEMBLOCK
12b824fb 8 select RTC_LIB
75e7153a 9 select SYS_SUPPORTS_APM_EMULATION
d4c7b1f9 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
fe166148 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
5cbad0eb 12 select HAVE_ARCH_KGDB
ed7c84d5 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
9edddaa2 14 select HAVE_KRETPROBES if (HAVE_KPROBES)
606576ce 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
80be7a7f
RV
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
0e341af8 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
1fe53268 19 select HAVE_GENERIC_DMA_COHERENT
e7db7b42
AT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
6e8699f7 22 select HAVE_KERNEL_LZMA
e360adbe 23 select HAVE_IRQ_WORK
7ada189f
JI
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
e513f8bf 26 select HAVE_REGS_AND_STACK_ACCESS_API
19852e59 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
ed60453f 28 select HAVE_C_RECORDMCOUNT
e2a93ecc
LB
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
1da177e4
LT
31 help
32 The ARM series is a line of low-power-consumption RISC chip designs
f6c8965a 33 licensed by ARM Ltd and targeted at embedded applications and
1da177e4 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
f6c8965a 35 manufactured, but legacy ARM-based PC hardware remains popular in
1da177e4
LT
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
38
1a189b97
RK
39config HAVE_PWM
40 bool
41
0b05da72
HUK
42config MIGHT_HAVE_PCI
43 bool
44
75e7153a
RB
45config SYS_SUPPORTS_APM_EMULATION
46 bool
47
112f38a4
RK
48config HAVE_SCHED_CLOCK
49 bool
50
0a938b97
DB
51config GENERIC_GPIO
52 bool
0a938b97 53
5cfc8ee0
JS
54config ARCH_USES_GETTIMEOFFSET
55 bool
56 default n
746140c7 57
0567a0c0
KH
58config GENERIC_CLOCKEVENTS
59 bool
0567a0c0 60
a8655e83
CM
61config GENERIC_CLOCKEVENTS_BROADCAST
62 bool
63 depends on GENERIC_CLOCKEVENTS
5388a6b2 64 default y if SMP
a8655e83 65
bc581770
LW
66config HAVE_TCM
67 bool
68 select GENERIC_ALLOCATOR
69
e119bfff
RK
70config HAVE_PROC_CPU
71 bool
72
5ea81769
AV
73config NO_IOPORT
74 bool
5ea81769 75
1da177e4
LT
76config EISA
77 bool
78 ---help---
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
81
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
86
87 Say Y here if you are building a kernel for an EISA-based machine.
88
89 Otherwise, say N.
90
91config SBUS
92 bool
93
94config MCA
95 bool
96 help
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
101
f16fb1ec
RK
102config STACKTRACE_SUPPORT
103 bool
104 default y
105
f76e9154
NP
106config HAVE_LATENCYTOP_SUPPORT
107 bool
108 depends on !SMP
109 default y
110
f16fb1ec
RK
111config LOCKDEP_SUPPORT
112 bool
113 default y
114
7ad1bcb2
RK
115config TRACE_IRQFLAGS_SUPPORT
116 bool
117 default y
118
4a2581a0
TG
119config HARDIRQS_SW_RESEND
120 bool
121 default y
122
123config GENERIC_IRQ_PROBE
124 bool
125 default y
126
95c354fe
NP
127config GENERIC_LOCKBREAK
128 bool
129 default y
130 depends on SMP && PREEMPT
131
1da177e4
LT
132config RWSEM_GENERIC_SPINLOCK
133 bool
134 default y
135
136config RWSEM_XCHGADD_ALGORITHM
137 bool
138
f0d1b0b3
DH
139config ARCH_HAS_ILOG2_U32
140 bool
f0d1b0b3
DH
141
142config ARCH_HAS_ILOG2_U64
143 bool
f0d1b0b3 144
89c52ed4
BD
145config ARCH_HAS_CPUFREQ
146 bool
147 help
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
150 it.
151
c7b0aff4
KH
152config ARCH_HAS_CPU_IDLE_WAIT
153 def_bool y
154
b89c3b16
AM
155config GENERIC_HWEIGHT
156 bool
157 default y
158
1da177e4
LT
159config GENERIC_CALIBRATE_DELAY
160 bool
161 default y
162
a08b6b79
AV
163config ARCH_MAY_HAVE_PC_FDC
164 bool
165
5ac6da66
CL
166config ZONE_DMA
167 bool
5ac6da66 168
ccd7ab7f
FT
169config NEED_DMA_MAP_STATE
170 def_bool y
171
1da177e4
LT
172config GENERIC_ISA_DMA
173 bool
174
1da177e4
LT
175config FIQ
176 bool
177
034d2f5a
AV
178config ARCH_MTD_XIP
179 bool
180
d6d502fa
KK
181config ARM_L1_CACHE_SHIFT_6
182 bool
183 help
184 Setting ARM L1 cache line size to 64 Bytes.
185
c760fc19
HC
186config VECTORS_BASE
187 hex
6afd6fae 188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
c760fc19
HC
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
190 default 0x00000000
191 help
192 The base address of exception vectors.
193
1da177e4
LT
194source "init/Kconfig"
195
dc52ddc0
MH
196source "kernel/Kconfig.freezer"
197
1da177e4
LT
198menu "System Type"
199
3c427975
HC
200config MMU
201 bool "MMU-based Paged Memory Management Support"
202 default y
203 help
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
206
ccf50e23
RK
207#
208# The "ARM system type" choice list is ordered alphabetically by option
209# text. Please add new entries in the option alphabetic order.
210#
1da177e4
LT
211choice
212 prompt "ARM system type"
6a0e2430 213 default ARCH_VERSATILE
1da177e4 214
4af6fee1
DS
215config ARCH_AAEC2000
216 bool "Agilent AAEC-2000 based"
c750815e 217 select CPU_ARM920T
4af6fee1 218 select ARM_AMBA
9483a578 219 select HAVE_CLK
5cfc8ee0 220 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
221 help
222 This enables support for systems based on the Agilent AAEC-2000
223
224config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
226 select ARM_AMBA
89c52ed4 227 select ARCH_HAS_CPUFREQ
6d803ba7 228 select CLKDEV_LOOKUP
c5a0adb5 229 select ICST
13edd86d 230 select GENERIC_CLOCKEVENTS
f4b8b319 231 select PLAT_VERSATILE
4af6fee1
DS
232 help
233 Support for ARM's Integrator platform.
234
235config ARCH_REALVIEW
236 bool "ARM Ltd. RealView family"
237 select ARM_AMBA
6d803ba7 238 select CLKDEV_LOOKUP
1da0c89c 239 select HAVE_SCHED_CLOCK
c5a0adb5 240 select ICST
ae30ceac 241 select GENERIC_CLOCKEVENTS
eb7fffa3 242 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 243 select PLAT_VERSATILE
e3887714 244 select ARM_TIMER_SP804
b56ba8aa 245 select GPIO_PL061 if GPIOLIB
4af6fee1
DS
246 help
247 This enables support for ARM Ltd RealView boards.
248
249config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
251 select ARM_AMBA
252 select ARM_VIC
6d803ba7 253 select CLKDEV_LOOKUP
1da0c89c 254 select HAVE_SCHED_CLOCK
c5a0adb5 255 select ICST
89df1272 256 select GENERIC_CLOCKEVENTS
bbeddc43 257 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 258 select PLAT_VERSATILE
e3887714 259 select ARM_TIMER_SP804
4af6fee1
DS
260 help
261 This enables support for ARM Ltd Versatile board.
262
ceade897
RK
263config ARCH_VEXPRESS
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
266 select ARM_AMBA
267 select ARM_TIMER_SP804
6d803ba7 268 select CLKDEV_LOOKUP
ceade897 269 select GENERIC_CLOCKEVENTS
ceade897 270 select HAVE_CLK
0af85dda 271 select HAVE_SCHED_CLOCK
ceade897
RK
272 select ICST
273 select PLAT_VERSATILE
274 help
275 This enables support for the ARM Ltd Versatile Express boards.
276
8fc5ffa0
AV
277config ARCH_AT91
278 bool "Atmel AT91"
f373e8c0 279 select ARCH_REQUIRE_GPIOLIB
93686ae8 280 select HAVE_CLK
4af6fee1 281 help
2b3b3516
AV
282 This enables support for systems based on the Atmel AT91RM9200,
283 AT91SAM9 and AT91CAP9 processors.
4af6fee1 284
ccf50e23
RK
285config ARCH_BCMRING
286 bool "Broadcom BCMRING"
287 depends on MMU
288 select CPU_V6
289 select ARM_AMBA
6d803ba7 290 select CLKDEV_LOOKUP
ccf50e23
RK
291 select GENERIC_CLOCKEVENTS
292 select ARCH_WANT_OPTIONAL_GPIOLIB
293 help
294 Support for Broadcom's BCMRing platform.
295
1da177e4 296config ARCH_CLPS711X
4af6fee1 297 bool "Cirrus Logic CLPS711x/EP721x-based"
c750815e 298 select CPU_ARM720T
5cfc8ee0 299 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
300 help
301 Support for Cirrus Logic 711x/721x based boards.
1da177e4 302
d94f944e
AV
303config ARCH_CNS3XXX
304 bool "Cavium Networks CNS3XXX family"
305 select CPU_V6
d94f944e
AV
306 select GENERIC_CLOCKEVENTS
307 select ARM_GIC
0b05da72 308 select MIGHT_HAVE_PCI
5f32f7a0 309 select PCI_DOMAINS if PCI
d94f944e
AV
310 help
311 Support for Cavium Networks CNS3XXX platform.
312
788c9700
RK
313config ARCH_GEMINI
314 bool "Cortina Systems Gemini"
315 select CPU_FA526
788c9700 316 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 317 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
318 help
319 Support for the Cortina Systems Gemini family SoCs
320
1da177e4
LT
321config ARCH_EBSA110
322 bool "EBSA-110"
c750815e 323 select CPU_SA110
f7e68bbf 324 select ISA
c5eb2a2b 325 select NO_IOPORT
5cfc8ee0 326 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
327 help
328 This is an evaluation board for the StrongARM processor available
f6c8965a 329 from Digital. It has limited hardware on-board, including an
1da177e4
LT
330 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 parallel port.
332
e7736d47
LB
333config ARCH_EP93XX
334 bool "EP93xx-based"
c750815e 335 select CPU_ARM920T
e7736d47
LB
336 select ARM_AMBA
337 select ARM_VIC
6d803ba7 338 select CLKDEV_LOOKUP
7444a72e 339 select ARCH_REQUIRE_GPIOLIB
eb33575c 340 select ARCH_HAS_HOLES_MEMORYMODEL
5cfc8ee0 341 select ARCH_USES_GETTIMEOFFSET
e7736d47
LB
342 help
343 This enables support for the Cirrus EP93xx series of CPUs.
344
1da177e4
LT
345config ARCH_FOOTBRIDGE
346 bool "FootBridge"
c750815e 347 select CPU_SA110
1da177e4 348 select FOOTBRIDGE
5cfc8ee0 349 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
350 help
351 Support for systems based on the DC21285 companion chip
352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
1da177e4 353
788c9700
RK
354config ARCH_MXC
355 bool "Freescale MXC/iMX-based"
788c9700 356 select GENERIC_CLOCKEVENTS
788c9700 357 select ARCH_REQUIRE_GPIOLIB
6d803ba7 358 select CLKDEV_LOOKUP
788c9700
RK
359 help
360 Support for Freescale MXC/iMX-based family of processors
361
1d3f33d5
SG
362config ARCH_MXS
363 bool "Freescale MXS-based"
364 select GENERIC_CLOCKEVENTS
365 select ARCH_REQUIRE_GPIOLIB
b9214b97 366 select CLKDEV_LOOKUP
1d3f33d5
SG
367 help
368 Support for Freescale MXS-based family of processors
369
7bd0f2f5 370config ARCH_STMP3XXX
371 bool "Freescale STMP3xxx"
372 select CPU_ARM926T
6d803ba7 373 select CLKDEV_LOOKUP
7bd0f2f5 374 select ARCH_REQUIRE_GPIOLIB
7bd0f2f5 375 select GENERIC_CLOCKEVENTS
7bd0f2f5 376 select USB_ARCH_HAS_EHCI
377 help
378 Support for systems based on the Freescale 3xxx CPUs.
379
4af6fee1
DS
380config ARCH_NETX
381 bool "Hilscher NetX based"
c750815e 382 select CPU_ARM926T
4af6fee1 383 select ARM_VIC
2fcfe6b8 384 select GENERIC_CLOCKEVENTS
f999b8bd 385 help
4af6fee1
DS
386 This enables support for systems based on the Hilscher NetX Soc
387
388config ARCH_H720X
389 bool "Hynix HMS720x-based"
c750815e 390 select CPU_ARM720T
4af6fee1 391 select ISA_DMA_API
5cfc8ee0 392 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
393 help
394 This enables support for systems based on the Hynix HMS720x
395
3b938be6
RK
396config ARCH_IOP13XX
397 bool "IOP13xx-based"
398 depends on MMU
c750815e 399 select CPU_XSC3
3b938be6
RK
400 select PLAT_IOP
401 select PCI
402 select ARCH_SUPPORTS_MSI
8d5796d2 403 select VMSPLIT_1G
3b938be6
RK
404 help
405 Support for Intel's IOP13XX (XScale) family of processors.
406
3f7e5815
LB
407config ARCH_IOP32X
408 bool "IOP32x-based"
a4f7e763 409 depends on MMU
c750815e 410 select CPU_XSCALE
7ae1f7ec 411 select PLAT_IOP
f7e68bbf 412 select PCI
bb2b180c 413 select ARCH_REQUIRE_GPIOLIB
f999b8bd 414 help
3f7e5815
LB
415 Support for Intel's 80219 and IOP32X (XScale) family of
416 processors.
417
418config ARCH_IOP33X
419 bool "IOP33x-based"
420 depends on MMU
c750815e 421 select CPU_XSCALE
7ae1f7ec 422 select PLAT_IOP
3f7e5815 423 select PCI
bb2b180c 424 select ARCH_REQUIRE_GPIOLIB
3f7e5815
LB
425 help
426 Support for Intel's IOP33X (XScale) family of processors.
1da177e4 427
3b938be6
RK
428config ARCH_IXP23XX
429 bool "IXP23XX-based"
a4f7e763 430 depends on MMU
c750815e 431 select CPU_XSC3
3b938be6 432 select PCI
5cfc8ee0 433 select ARCH_USES_GETTIMEOFFSET
f999b8bd 434 help
3b938be6 435 Support for Intel's IXP23xx (XScale) family of processors.
1da177e4
LT
436
437config ARCH_IXP2000
438 bool "IXP2400/2800-based"
a4f7e763 439 depends on MMU
c750815e 440 select CPU_XSCALE
f7e68bbf 441 select PCI
5cfc8ee0 442 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
443 help
444 Support for Intel's IXP2400/2800 (XScale) family of processors.
1da177e4 445
3b938be6
RK
446config ARCH_IXP4XX
447 bool "IXP4xx-based"
a4f7e763 448 depends on MMU
c750815e 449 select CPU_XSCALE
8858e9af 450 select GENERIC_GPIO
3b938be6 451 select GENERIC_CLOCKEVENTS
5b0d495c 452 select HAVE_SCHED_CLOCK
0b05da72 453 select MIGHT_HAVE_PCI
485bdde7 454 select DMABOUNCE if PCI
c4713074 455 help
3b938be6 456 Support for Intel's IXP4XX (XScale) family of processors.
c4713074 457
edabd38e
SB
458config ARCH_DOVE
459 bool "Marvell Dove"
460 select PCI
edabd38e 461 select ARCH_REQUIRE_GPIOLIB
edabd38e
SB
462 select GENERIC_CLOCKEVENTS
463 select PLAT_ORION
464 help
465 Support for the Marvell Dove SoC 88AP510
466
651c74c7
SB
467config ARCH_KIRKWOOD
468 bool "Marvell Kirkwood"
c750815e 469 select CPU_FEROCEON
651c74c7 470 select PCI
a8865655 471 select ARCH_REQUIRE_GPIOLIB
651c74c7
SB
472 select GENERIC_CLOCKEVENTS
473 select PLAT_ORION
474 help
475 Support for the following Marvell Kirkwood series SoCs:
476 88F6180, 88F6192 and 88F6281.
477
777f9beb
LB
478config ARCH_LOKI
479 bool "Marvell Loki (88RC8480)"
c750815e 480 select CPU_FEROCEON
777f9beb
LB
481 select GENERIC_CLOCKEVENTS
482 select PLAT_ORION
483 help
484 Support for the Marvell Loki (88RC8480) SoC.
485
40805949
KW
486config ARCH_LPC32XX
487 bool "NXP LPC32XX"
488 select CPU_ARM926T
489 select ARCH_REQUIRE_GPIOLIB
490 select HAVE_IDE
491 select ARM_AMBA
492 select USB_ARCH_HAS_OHCI
6d803ba7 493 select CLKDEV_LOOKUP
40805949
KW
494 select GENERIC_TIME
495 select GENERIC_CLOCKEVENTS
496 help
497 Support for the NXP LPC32XX family of processors
498
794d15b2
SS
499config ARCH_MV78XX0
500 bool "Marvell MV78xx0"
c750815e 501 select CPU_FEROCEON
794d15b2 502 select PCI
a8865655 503 select ARCH_REQUIRE_GPIOLIB
794d15b2
SS
504 select GENERIC_CLOCKEVENTS
505 select PLAT_ORION
506 help
507 Support for the following Marvell MV78xx0 series SoCs:
508 MV781x0, MV782x0.
509
9dd0b194 510config ARCH_ORION5X
585cf175
TP
511 bool "Marvell Orion"
512 depends on MMU
c750815e 513 select CPU_FEROCEON
038ee083 514 select PCI
a8865655 515 select ARCH_REQUIRE_GPIOLIB
51cbff1d 516 select GENERIC_CLOCKEVENTS
69b02f6a 517 select PLAT_ORION
585cf175 518 help
9dd0b194 519 Support for the following Marvell Orion 5x series SoCs:
d2b2a6bb 520 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
d323ade1 521 Orion-2 (5281), Orion-1-90 (6183).
585cf175 522
788c9700 523config ARCH_MMP
2f7e8fae 524 bool "Marvell PXA168/910/MMP2"
788c9700 525 depends on MMU
788c9700 526 select ARCH_REQUIRE_GPIOLIB
6d803ba7 527 select CLKDEV_LOOKUP
788c9700 528 select GENERIC_CLOCKEVENTS
28bb7bc6 529 select HAVE_SCHED_CLOCK
788c9700
RK
530 select TICK_ONESHOT
531 select PLAT_PXA
0bd86961 532 select SPARSE_IRQ
788c9700 533 help
2f7e8fae 534 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
788c9700
RK
535
536config ARCH_KS8695
537 bool "Micrel/Kendin KS8695"
538 select CPU_ARM922T
98830bc9 539 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 540 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
541 help
542 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
543 System-on-Chip devices.
544
545config ARCH_NS9XXX
546 bool "NetSilicon NS9xxx"
547 select CPU_ARM926T
548 select GENERIC_GPIO
788c9700
RK
549 select GENERIC_CLOCKEVENTS
550 select HAVE_CLK
551 help
552 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
553 System.
554
555 <http://www.digi.com/products/microprocessors/index.jsp>
556
557config ARCH_W90X900
558 bool "Nuvoton W90X900 CPU"
559 select CPU_ARM926T
c52d3d68 560 select ARCH_REQUIRE_GPIOLIB
6d803ba7 561 select CLKDEV_LOOKUP
58b5369e 562 select GENERIC_CLOCKEVENTS
788c9700 563 help
a8bc4ead 564 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
565 At present, the w90x900 has been renamed nuc900, regarding
566 the ARM series product line, you can login the following
567 link address to know more.
568
569 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
570 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
788c9700 571
a62e9030 572config ARCH_NUC93X
573 bool "Nuvoton NUC93X CPU"
574 select CPU_ARM926T
6d803ba7 575 select CLKDEV_LOOKUP
a62e9030 576 help
577 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
578 low-power and high performance MPEG-4/JPEG multimedia controller chip.
579
c5f80065
EG
580config ARCH_TEGRA
581 bool "NVIDIA Tegra"
4073723a 582 select CLKDEV_LOOKUP
c5f80065
EG
583 select GENERIC_TIME
584 select GENERIC_CLOCKEVENTS
585 select GENERIC_GPIO
586 select HAVE_CLK
e3f4c0ab 587 select HAVE_SCHED_CLOCK
c5f80065 588 select ARCH_HAS_BARRIERS if CACHE_L2X0
7056d423 589 select ARCH_HAS_CPUFREQ
c5f80065
EG
590 help
591 This enables support for NVIDIA Tegra based systems (Tegra APX,
592 Tegra 6xx and Tegra 2 series).
593
4af6fee1
DS
594config ARCH_PNX4008
595 bool "Philips Nexperia PNX4008 Mobile"
c750815e 596 select CPU_ARM926T
6d803ba7 597 select CLKDEV_LOOKUP
5cfc8ee0 598 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
599 help
600 This enables support for Philips PNX4008 mobile platform.
601
1da177e4 602config ARCH_PXA
2c8086a5 603 bool "PXA2xx/PXA3xx-based"
a4f7e763 604 depends on MMU
034d2f5a 605 select ARCH_MTD_XIP
89c52ed4 606 select ARCH_HAS_CPUFREQ
6d803ba7 607 select CLKDEV_LOOKUP
7444a72e 608 select ARCH_REQUIRE_GPIOLIB
981d0f39 609 select GENERIC_CLOCKEVENTS
7ce83018 610 select HAVE_SCHED_CLOCK
a88264c2 611 select TICK_ONESHOT
bd5ce433 612 select PLAT_PXA
6ac6b817 613 select SPARSE_IRQ
f999b8bd 614 help
2c8086a5 615 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
1da177e4 616
788c9700
RK
617config ARCH_MSM
618 bool "Qualcomm MSM"
4b536b8d 619 select HAVE_CLK
49cbe786 620 select GENERIC_CLOCKEVENTS
923a081c 621 select ARCH_REQUIRE_GPIOLIB
49cbe786 622 help
4b53eb4f
DW
623 Support for Qualcomm MSM/QSD based systems. This runs on the
624 apps processor of the MSM/QSD and depends on a shared memory
625 interface to the modem processor which runs the baseband
626 stack and controls some vital subsystems
627 (clock and power control, etc).
49cbe786 628
c793c1b0 629config ARCH_SHMOBILE
6d72ad35
PM
630 bool "Renesas SH-Mobile / R-Mobile"
631 select HAVE_CLK
5e93c6b4 632 select CLKDEV_LOOKUP
6d72ad35
PM
633 select GENERIC_CLOCKEVENTS
634 select NO_IOPORT
635 select SPARSE_IRQ
60f1435c 636 select MULTI_IRQ_HANDLER
c793c1b0 637 help
6d72ad35 638 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
c793c1b0 639
1da177e4
LT
640config ARCH_RPC
641 bool "RiscPC"
642 select ARCH_ACORN
643 select FIQ
644 select TIMER_ACORN
a08b6b79 645 select ARCH_MAY_HAVE_PC_FDC
341eb781 646 select HAVE_PATA_PLATFORM
065909b9 647 select ISA_DMA_API
5ea81769 648 select NO_IOPORT
07f841b7 649 select ARCH_SPARSEMEM_ENABLE
5cfc8ee0 650 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
651 help
652 On the Acorn Risc-PC, Linux can support the internal IDE disk and
653 CD-ROM interface, serial and parallel port, and the floppy drive.
654
655config ARCH_SA1100
656 bool "SA1100-based"
c750815e 657 select CPU_SA1100
f7e68bbf 658 select ISA
05944d74 659 select ARCH_SPARSEMEM_ENABLE
034d2f5a 660 select ARCH_MTD_XIP
89c52ed4 661 select ARCH_HAS_CPUFREQ
1937f5b9 662 select CPU_FREQ
3e238be2 663 select GENERIC_CLOCKEVENTS
9483a578 664 select HAVE_CLK
5094b92f 665 select HAVE_SCHED_CLOCK
3e238be2 666 select TICK_ONESHOT
7444a72e 667 select ARCH_REQUIRE_GPIOLIB
f999b8bd
MM
668 help
669 Support for StrongARM 11x0 based boards.
1da177e4
LT
670
671config ARCH_S3C2410
63b1f51b 672 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
0a938b97 673 select GENERIC_GPIO
9d56c02a 674 select ARCH_HAS_CPUFREQ
9483a578 675 select HAVE_CLK
5cfc8ee0 676 select ARCH_USES_GETTIMEOFFSET
20676c15 677 select HAVE_S3C2410_I2C if I2C
1da177e4
LT
678 help
679 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
680 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
f6c8965a 681 the Samsung SMDK2410 development board (and derivatives).
1da177e4 682
63b1f51b
BD
683 Note, the S3C2416 and the S3C2450 are so close that they even share
684 the same SoC ID code. This means that there is no seperate machine
685 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
686
a08ab637
BD
687config ARCH_S3C64XX
688 bool "Samsung S3C64XX"
89f1fa08 689 select PLAT_SAMSUNG
89f0ce72 690 select CPU_V6
89f0ce72 691 select ARM_VIC
a08ab637 692 select HAVE_CLK
89f0ce72 693 select NO_IOPORT
5cfc8ee0 694 select ARCH_USES_GETTIMEOFFSET
89c52ed4 695 select ARCH_HAS_CPUFREQ
89f0ce72
BD
696 select ARCH_REQUIRE_GPIOLIB
697 select SAMSUNG_CLKSRC
698 select SAMSUNG_IRQ_VIC_TIMER
699 select SAMSUNG_IRQ_UART
700 select S3C_GPIO_TRACK
701 select S3C_GPIO_PULL_UPDOWN
702 select S3C_GPIO_CFG_S3C24XX
703 select S3C_GPIO_CFG_S3C64XX
704 select S3C_DEV_NAND
705 select USB_ARCH_HAS_OHCI
706 select SAMSUNG_GPIOLIB_4BIT
20676c15 707 select HAVE_S3C2410_I2C if I2C
c39d8d55 708 select HAVE_S3C2410_WATCHDOG if WATCHDOG
a08ab637
BD
709 help
710 Samsung S3C64XX series based systems
711
49b7a491
KK
712config ARCH_S5P64X0
713 bool "Samsung S5P6440 S5P6450"
c4ffccdd
KK
714 select CPU_V6
715 select GENERIC_GPIO
716 select HAVE_CLK
c39d8d55 717 select HAVE_S3C2410_WATCHDOG if WATCHDOG
925c68cd 718 select ARCH_USES_GETTIMEOFFSET
20676c15 719 select HAVE_S3C2410_I2C if I2C
754961a8 720 select HAVE_S3C_RTC if RTC_CLASS
c4ffccdd 721 help
49b7a491
KK
722 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
723 SMDK6450.
c4ffccdd 724
550db7f1
KK
725config ARCH_S5P6442
726 bool "Samsung S5P6442"
727 select CPU_V6
728 select GENERIC_GPIO
729 select HAVE_CLK
925c68cd 730 select ARCH_USES_GETTIMEOFFSET
c39d8d55 731 select HAVE_S3C2410_WATCHDOG if WATCHDOG
550db7f1
KK
732 help
733 Samsung S5P6442 CPU based systems
734
acc84707
MS
735config ARCH_S5PC100
736 bool "Samsung S5PC100"
5a7652f2
BM
737 select GENERIC_GPIO
738 select HAVE_CLK
739 select CPU_V7
d6d502fa 740 select ARM_L1_CACHE_SHIFT_6
925c68cd 741 select ARCH_USES_GETTIMEOFFSET
20676c15 742 select HAVE_S3C2410_I2C if I2C
754961a8 743 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
5a7652f2 745 help
acc84707 746 Samsung S5PC100 series based systems
5a7652f2 747
170f4e42
KK
748config ARCH_S5PV210
749 bool "Samsung S5PV210/S5PC110"
750 select CPU_V7
eecb6a84 751 select ARCH_SPARSEMEM_ENABLE
170f4e42
KK
752 select GENERIC_GPIO
753 select HAVE_CLK
754 select ARM_L1_CACHE_SHIFT_6
d8144aea 755 select ARCH_HAS_CPUFREQ
925c68cd 756 select ARCH_USES_GETTIMEOFFSET
20676c15 757 select HAVE_S3C2410_I2C if I2C
754961a8 758 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 759 select HAVE_S3C2410_WATCHDOG if WATCHDOG
170f4e42
KK
760 help
761 Samsung S5PV210/S5PC110 series based systems
762
cc0e72b8
CY
763config ARCH_S5PV310
764 bool "Samsung S5PV310/S5PC210"
765 select CPU_V7
f567fa6f 766 select ARCH_SPARSEMEM_ENABLE
cc0e72b8
CY
767 select GENERIC_GPIO
768 select HAVE_CLK
b333fb16 769 select ARCH_HAS_CPUFREQ
cc0e72b8 770 select GENERIC_CLOCKEVENTS
754961a8 771 select HAVE_S3C_RTC if RTC_CLASS
20676c15 772 select HAVE_S3C2410_I2C if I2C
c39d8d55 773 select HAVE_S3C2410_WATCHDOG if WATCHDOG
cc0e72b8
CY
774 help
775 Samsung S5PV310 series based systems
776
1da177e4
LT
777config ARCH_SHARK
778 bool "Shark"
c750815e 779 select CPU_SA110
f7e68bbf
RK
780 select ISA
781 select ISA_DMA
3bca103a 782 select ZONE_DMA
f7e68bbf 783 select PCI
5cfc8ee0 784 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
785 help
786 Support for the StrongARM based Digital DNARD machine, also known
787 as "Shark" (<http://www.shark-linux.de/shark.html>).
1da177e4 788
83ef3338
HK
789config ARCH_TCC_926
790 bool "Telechips TCC ARM926-based systems"
791 select CPU_ARM926T
792 select HAVE_CLK
6d803ba7 793 select CLKDEV_LOOKUP
83ef3338
HK
794 select GENERIC_CLOCKEVENTS
795 help
796 Support for Telechips TCC ARM926-based systems.
797
1da177e4
LT
798config ARCH_LH7A40X
799 bool "Sharp LH7A40X"
c750815e 800 select CPU_ARM922T
4ba3f7c5 801 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
5cfc8ee0 802 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
803 help
804 Say Y here for systems based on one of the Sharp LH7A40X
805 System on a Chip processors. These CPUs include an ARM922T
806 core with a wide array of integrated devices for
807 hand-held and low-power applications.
808
d98aac75
LW
809config ARCH_U300
810 bool "ST-Ericsson U300 Series"
811 depends on MMU
812 select CPU_ARM926T
5c21b7ca 813 select HAVE_SCHED_CLOCK
bc581770 814 select HAVE_TCM
d98aac75
LW
815 select ARM_AMBA
816 select ARM_VIC
d98aac75 817 select GENERIC_CLOCKEVENTS
6d803ba7 818 select CLKDEV_LOOKUP
d98aac75
LW
819 select GENERIC_GPIO
820 help
821 Support for ST-Ericsson U300 series mobile platforms.
822
ccf50e23
RK
823config ARCH_U8500
824 bool "ST-Ericsson U8500 Series"
825 select CPU_V7
826 select ARM_AMBA
ccf50e23 827 select GENERIC_CLOCKEVENTS
6d803ba7 828 select CLKDEV_LOOKUP
94bdc0e2 829 select ARCH_REQUIRE_GPIOLIB
7c1a70e9 830 select ARCH_HAS_CPUFREQ
ccf50e23
RK
831 help
832 Support for ST-Ericsson's Ux500 architecture
833
834config ARCH_NOMADIK
835 bool "STMicroelectronics Nomadik"
836 select ARM_AMBA
837 select ARM_VIC
838 select CPU_ARM926T
6d803ba7 839 select CLKDEV_LOOKUP
ccf50e23 840 select GENERIC_CLOCKEVENTS
ccf50e23
RK
841 select ARCH_REQUIRE_GPIOLIB
842 help
843 Support for the Nomadik platform by ST-Ericsson
844
7c6337e2
KH
845config ARCH_DAVINCI
846 bool "TI DaVinci"
7c6337e2 847 select GENERIC_CLOCKEVENTS
dce1115b 848 select ARCH_REQUIRE_GPIOLIB
3bca103a 849 select ZONE_DMA
9232fcc9 850 select HAVE_IDE
6d803ba7 851 select CLKDEV_LOOKUP
20e9969b 852 select GENERIC_ALLOCATOR
ae88e05a 853 select ARCH_HAS_HOLES_MEMORYMODEL
7c6337e2
KH
854 help
855 Support for TI's DaVinci platform.
856
3b938be6
RK
857config ARCH_OMAP
858 bool "TI OMAP"
9483a578 859 select HAVE_CLK
7444a72e 860 select ARCH_REQUIRE_GPIOLIB
89c52ed4 861 select ARCH_HAS_CPUFREQ
06cad098 862 select GENERIC_CLOCKEVENTS
dc548fbb 863 select HAVE_SCHED_CLOCK
9af915da 864 select ARCH_HAS_HOLES_MEMORYMODEL
3b938be6 865 help
6e457bb0 866 Support for TI's OMAP platform (OMAP1/2/3/4).
3b938be6 867
cee37e50
VK
868config PLAT_SPEAR
869 bool "ST SPEAr"
870 select ARM_AMBA
871 select ARCH_REQUIRE_GPIOLIB
6d803ba7 872 select CLKDEV_LOOKUP
cee37e50 873 select GENERIC_CLOCKEVENTS
cee37e50
VK
874 select HAVE_CLK
875 help
876 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
877
1da177e4
LT
878endchoice
879
ccf50e23
RK
880#
881# This is sorted alphabetically by mach-* pathname. However, plat-*
882# Kconfigs may be included either alphabetically (according to the
883# plat- suffix) or along side the corresponding mach-* source.
884#
95b8f20f
RK
885source "arch/arm/mach-aaec2000/Kconfig"
886
887source "arch/arm/mach-at91/Kconfig"
888
889source "arch/arm/mach-bcmring/Kconfig"
890
1da177e4
LT
891source "arch/arm/mach-clps711x/Kconfig"
892
d94f944e
AV
893source "arch/arm/mach-cns3xxx/Kconfig"
894
95b8f20f
RK
895source "arch/arm/mach-davinci/Kconfig"
896
897source "arch/arm/mach-dove/Kconfig"
898
e7736d47
LB
899source "arch/arm/mach-ep93xx/Kconfig"
900
1da177e4
LT
901source "arch/arm/mach-footbridge/Kconfig"
902
59d3a193
PZ
903source "arch/arm/mach-gemini/Kconfig"
904
95b8f20f
RK
905source "arch/arm/mach-h720x/Kconfig"
906
1da177e4
LT
907source "arch/arm/mach-integrator/Kconfig"
908
3f7e5815
LB
909source "arch/arm/mach-iop32x/Kconfig"
910
911source "arch/arm/mach-iop33x/Kconfig"
1da177e4 912
285f5fa7
DW
913source "arch/arm/mach-iop13xx/Kconfig"
914
1da177e4
LT
915source "arch/arm/mach-ixp4xx/Kconfig"
916
917source "arch/arm/mach-ixp2000/Kconfig"
918
c4713074
LB
919source "arch/arm/mach-ixp23xx/Kconfig"
920
95b8f20f
RK
921source "arch/arm/mach-kirkwood/Kconfig"
922
923source "arch/arm/mach-ks8695/Kconfig"
924
925source "arch/arm/mach-lh7a40x/Kconfig"
926
777f9beb
LB
927source "arch/arm/mach-loki/Kconfig"
928
40805949
KW
929source "arch/arm/mach-lpc32xx/Kconfig"
930
95b8f20f
RK
931source "arch/arm/mach-msm/Kconfig"
932
794d15b2
SS
933source "arch/arm/mach-mv78xx0/Kconfig"
934
95b8f20f 935source "arch/arm/plat-mxc/Kconfig"
1da177e4 936
1d3f33d5
SG
937source "arch/arm/mach-mxs/Kconfig"
938
95b8f20f 939source "arch/arm/mach-netx/Kconfig"
49cbe786 940
95b8f20f
RK
941source "arch/arm/mach-nomadik/Kconfig"
942source "arch/arm/plat-nomadik/Kconfig"
943
944source "arch/arm/mach-ns9xxx/Kconfig"
1da177e4 945
186f93ea 946source "arch/arm/mach-nuc93x/Kconfig"
1da177e4 947
d48af15e
TL
948source "arch/arm/plat-omap/Kconfig"
949
950source "arch/arm/mach-omap1/Kconfig"
1da177e4 951
1dbae815
TL
952source "arch/arm/mach-omap2/Kconfig"
953
9dd0b194 954source "arch/arm/mach-orion5x/Kconfig"
585cf175 955
95b8f20f
RK
956source "arch/arm/mach-pxa/Kconfig"
957source "arch/arm/plat-pxa/Kconfig"
585cf175 958
95b8f20f
RK
959source "arch/arm/mach-mmp/Kconfig"
960
961source "arch/arm/mach-realview/Kconfig"
962
963source "arch/arm/mach-sa1100/Kconfig"
edabd38e 964
cf383678 965source "arch/arm/plat-samsung/Kconfig"
a21765a7 966source "arch/arm/plat-s3c24xx/Kconfig"
c4ffccdd 967source "arch/arm/plat-s5p/Kconfig"
a21765a7 968
cee37e50 969source "arch/arm/plat-spear/Kconfig"
a21765a7 970
83ef3338
HK
971source "arch/arm/plat-tcc/Kconfig"
972
a21765a7
BD
973if ARCH_S3C2410
974source "arch/arm/mach-s3c2400/Kconfig"
1da177e4 975source "arch/arm/mach-s3c2410/Kconfig"
a21765a7 976source "arch/arm/mach-s3c2412/Kconfig"
f1290a49 977source "arch/arm/mach-s3c2416/Kconfig"
a21765a7 978source "arch/arm/mach-s3c2440/Kconfig"
e4d06e39 979source "arch/arm/mach-s3c2443/Kconfig"
a21765a7 980endif
1da177e4 981
a08ab637 982if ARCH_S3C64XX
431107ea 983source "arch/arm/mach-s3c64xx/Kconfig"
a08ab637
BD
984endif
985
49b7a491 986source "arch/arm/mach-s5p64x0/Kconfig"
c4ffccdd 987
550db7f1 988source "arch/arm/mach-s5p6442/Kconfig"
7bd0f2f5 989
5a7652f2 990source "arch/arm/mach-s5pc100/Kconfig"
5a7652f2 991
170f4e42
KK
992source "arch/arm/mach-s5pv210/Kconfig"
993
cc0e72b8
CY
994source "arch/arm/mach-s5pv310/Kconfig"
995
882d01f9 996source "arch/arm/mach-shmobile/Kconfig"
52c543f9 997
882d01f9 998source "arch/arm/plat-stmp3xxx/Kconfig"
9e73c84c 999
c5f80065
EG
1000source "arch/arm/mach-tegra/Kconfig"
1001
95b8f20f 1002source "arch/arm/mach-u300/Kconfig"
1da177e4 1003
95b8f20f 1004source "arch/arm/mach-ux500/Kconfig"
1da177e4
LT
1005
1006source "arch/arm/mach-versatile/Kconfig"
1007
ceade897
RK
1008source "arch/arm/mach-vexpress/Kconfig"
1009
7ec80ddf 1010source "arch/arm/mach-w90x900/Kconfig"
1011
1da177e4
LT
1012# Definitions to make life easier
1013config ARCH_ACORN
1014 bool
1015
7ae1f7ec
LB
1016config PLAT_IOP
1017 bool
469d3044 1018 select GENERIC_CLOCKEVENTS
08f26b1e 1019 select HAVE_SCHED_CLOCK
7ae1f7ec 1020
69b02f6a
LB
1021config PLAT_ORION
1022 bool
f06a1624 1023 select HAVE_SCHED_CLOCK
69b02f6a 1024
bd5ce433
EM
1025config PLAT_PXA
1026 bool
1027
f4b8b319
RK
1028config PLAT_VERSATILE
1029 bool
1030
e3887714
RK
1031config ARM_TIMER_SP804
1032 bool
1033
1da177e4
LT
1034source arch/arm/mm/Kconfig
1035
afe4b25e
LB
1036config IWMMXT
1037 bool "Enable iWMMXt support"
ef6c8445
HZ
1038 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1039 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
afe4b25e
LB
1040 help
1041 Enable support for iWMMXt context switching at run time if
1042 running on a CPU that supports it.
1043
1da177e4
LT
1044# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1045config XSCALE_PMU
1046 bool
1047 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1048 default y
1049
0f4f0672 1050config CPU_HAS_PMU
8954bb0d
WD
1051 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1052 (!ARCH_OMAP3 || OMAP3_EMU)
0f4f0672
JI
1053 default y
1054 bool
1055
52108641 1056config MULTI_IRQ_HANDLER
1057 bool
1058 help
1059 Allow each machine to specify it's own IRQ handler at run time.
1060
3b93e7b0
HC
1061if !MMU
1062source "arch/arm/Kconfig-nommu"
1063endif
1064
9cba3ccc
CM
1065config ARM_ERRATA_411920
1066 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
81d11955 1067 depends on CPU_V6
9cba3ccc
CM
1068 help
1069 Invalidation of the Instruction Cache operation can
1070 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1071 It does not affect the MPCore. This option enables the ARM Ltd.
1072 recommended workaround.
1073
7ce236fc
CM
1074config ARM_ERRATA_430973
1075 bool "ARM errata: Stale prediction on replaced interworking branch"
1076 depends on CPU_V7
1077 help
1078 This option enables the workaround for the 430973 Cortex-A8
1079 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1080 interworking branch is replaced with another code sequence at the
1081 same virtual address, whether due to self-modifying code or virtual
1082 to physical address re-mapping, Cortex-A8 does not recover from the
1083 stale interworking branch prediction. This results in Cortex-A8
1084 executing the new code sequence in the incorrect ARM or Thumb state.
1085 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1086 and also flushes the branch target cache at every context switch.
1087 Note that setting specific bits in the ACTLR register may not be
1088 available in non-secure mode.
1089
855c551f
CM
1090config ARM_ERRATA_458693
1091 bool "ARM errata: Processor deadlock when a false hazard is created"
1092 depends on CPU_V7
1093 help
1094 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1095 erratum. For very specific sequences of memory operations, it is
1096 possible for a hazard condition intended for a cache line to instead
1097 be incorrectly associated with a different cache line. This false
1098 hazard might then cause a processor deadlock. The workaround enables
1099 the L1 caching of the NEON accesses and disables the PLD instruction
1100 in the ACTLR register. Note that setting specific bits in the ACTLR
1101 register may not be available in non-secure mode.
1102
0516e464
CM
1103config ARM_ERRATA_460075
1104 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1105 depends on CPU_V7
1106 help
1107 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1108 erratum. Any asynchronous access to the L2 cache may encounter a
1109 situation in which recent store transactions to the L2 cache are lost
1110 and overwritten with stale memory contents from external memory. The
1111 workaround disables the write-allocate mode for the L2 cache via the
1112 ACTLR register. Note that setting specific bits in the ACTLR register
1113 may not be available in non-secure mode.
1114
9f05027c
WD
1115config ARM_ERRATA_742230
1116 bool "ARM errata: DMB operation may be faulty"
1117 depends on CPU_V7 && SMP
1118 help
1119 This option enables the workaround for the 742230 Cortex-A9
1120 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1121 between two write operations may not ensure the correct visibility
1122 ordering of the two writes. This workaround sets a specific bit in
1123 the diagnostic register of the Cortex-A9 which causes the DMB
1124 instruction to behave as a DSB, ensuring the correct behaviour of
1125 the two writes.
1126
a672e99b
WD
1127config ARM_ERRATA_742231
1128 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1129 depends on CPU_V7 && SMP
1130 help
1131 This option enables the workaround for the 742231 Cortex-A9
1132 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1133 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1134 accessing some data located in the same cache line, may get corrupted
1135 data due to bad handling of the address hazard when the line gets
1136 replaced from one of the CPUs at the same time as another CPU is
1137 accessing it. This workaround sets specific bits in the diagnostic
1138 register of the Cortex-A9 which reduces the linefill issuing
1139 capabilities of the processor.
1140
9e65582a
SS
1141config PL310_ERRATA_588369
1142 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1143 depends on CACHE_L2X0 && ARCH_OMAP4
1144 help
1145 The PL310 L2 cache controller implements three types of Clean &
1146 Invalidate maintenance operations: by Physical Address
1147 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1148 They are architecturally defined to behave as the execution of a
1149 clean operation followed immediately by an invalidate operation,
1150 both performing to the same memory location. This functionality
1151 is not correctly implemented in PL310 as clean lines are not
1152 invalidated as a result of these operations. Note that this errata
1153 uses Texas Instrument's secure monitor api.
cdf357f1
WD
1154
1155config ARM_ERRATA_720789
1156 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1157 depends on CPU_V7 && SMP
1158 help
1159 This option enables the workaround for the 720789 Cortex-A9 (prior to
1160 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1161 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1162 As a consequence of this erratum, some TLB entries which should be
1163 invalidated are not, resulting in an incoherency in the system page
1164 tables. The workaround changes the TLB flushing routines to invalidate
1165 entries regardless of the ASID.
475d92fc
WD
1166
1167config ARM_ERRATA_743622
1168 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1169 depends on CPU_V7
1170 help
1171 This option enables the workaround for the 743622 Cortex-A9
1172 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1173 optimisation in the Cortex-A9 Store Buffer may lead to data
1174 corruption. This workaround sets a specific bit in the diagnostic
1175 register of the Cortex-A9 which disables the Store Buffer
1176 optimisation, preventing the defect from occurring. This has no
1177 visible impact on the overall performance or power consumption of the
1178 processor.
1179
885028e4
SK
1180config ARM_ERRATA_753970
1181 bool "ARM errata: cache sync operation may be faulty"
1182 depends on CACHE_PL310
1183 help
1184 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1185
1186 Under some condition the effect of cache sync operation on
1187 the store buffer still remains when the operation completes.
1188 This means that the store buffer is always asked to drain and
1189 this prevents it from merging any further writes. The workaround
1190 is to replace the normal offset of cache sync operation (0x730)
1191 by another offset targeting an unmapped PL310 register 0x740.
1192 This has the same effect as the cache sync operation: store buffer
1193 drain and waiting for all buffers empty.
1194
1da177e4
LT
1195endmenu
1196
1197source "arch/arm/common/Kconfig"
1198
1da177e4
LT
1199menu "Bus support"
1200
1201config ARM_AMBA
1202 bool
1203
1204config ISA
1205 bool
1da177e4
LT
1206 help
1207 Find out whether you have ISA slots on your motherboard. ISA is the
1208 name of a bus system, i.e. the way the CPU talks to the other stuff
1209 inside your box. Other bus systems are PCI, EISA, MicroChannel
1210 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1211 newer boards don't support it. If you have ISA, say Y, otherwise N.
1212
065909b9 1213# Select ISA DMA controller support
1da177e4
LT
1214config ISA_DMA
1215 bool
065909b9 1216 select ISA_DMA_API
1da177e4 1217
065909b9 1218# Select ISA DMA interface
5cae841b
AV
1219config ISA_DMA_API
1220 bool
5cae841b 1221
1da177e4 1222config PCI
0b05da72 1223 bool "PCI support" if MIGHT_HAVE_PCI
1da177e4
LT
1224 help
1225 Find out whether you have a PCI motherboard. PCI is the name of a
1226 bus system, i.e. the way the CPU talks to the other stuff inside
1227 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1228 VESA. If you have PCI, say Y, otherwise N.
1229
52882173
AV
1230config PCI_DOMAINS
1231 bool
1232 depends on PCI
1233
b080ac8a
MRJ
1234config PCI_NANOENGINE
1235 bool "BSE nanoEngine PCI support"
1236 depends on SA1100_NANOENGINE
1237 help
1238 Enable PCI on the BSE nanoEngine board.
1239
36e23590
MW
1240config PCI_SYSCALL
1241 def_bool PCI
1242
1da177e4
LT
1243# Select the host bridge type
1244config PCI_HOST_VIA82C505
1245 bool
1246 depends on PCI && ARCH_SHARK
1247 default y
1248
a0113a99
MR
1249config PCI_HOST_ITE8152
1250 bool
1251 depends on PCI && MACH_ARMCORE
1252 default y
1253 select DMABOUNCE
1254
1da177e4
LT
1255source "drivers/pci/Kconfig"
1256
1257source "drivers/pcmcia/Kconfig"
1258
1259endmenu
1260
1261menu "Kernel Features"
1262
0567a0c0
KH
1263source "kernel/time/Kconfig"
1264
1da177e4
LT
1265config SMP
1266 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
971acb9b 1267 depends on EXPERIMENTAL
bc28248e 1268 depends on GENERIC_CLOCKEVENTS
971acb9b 1269 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
89c3dedf
DW
1270 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1271 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
e9d728f5 1272 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
f6dd9fa5 1273 select USE_GENERIC_SMP_HELPERS
89c3dedf 1274 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1da177e4
LT
1275 help
1276 This enables support for systems with more than one CPU. If you have
1277 a system with only one CPU, like most personal computers, say N. If
1278 you have a system with more than one CPU, say Y.
1279
1280 If you say N here, the kernel will run on single and multiprocessor
1281 machines, but will use only one CPU of a multiprocessor machine. If
1282 you say Y here, the kernel will run on many, but not all, single
1283 processor machines. On a single processor machine, the kernel will
1284 run faster if you say N here.
1285
03502faa 1286 See also <file:Documentation/i386/IO-APIC.txt>,
1da177e4 1287 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
50a23e6e 1288 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1da177e4
LT
1289
1290 If you don't know what to do here, say N.
1291
f00ec48f
RK
1292config SMP_ON_UP
1293 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1294 depends on EXPERIMENTAL
4d2692a7 1295 depends on SMP && !XIP_KERNEL
f00ec48f
RK
1296 default y
1297 help
1298 SMP kernels contain instructions which fail on non-SMP processors.
1299 Enabling this option allows the kernel to modify itself to make
1300 these instructions safe. Disabling it allows about 1K of space
1301 savings.
1302
1303 If you don't know what to do here, say Y.
1304
a8cbcd92
RK
1305config HAVE_ARM_SCU
1306 bool
1307 depends on SMP
1308 help
1309 This option enables support for the ARM system coherency unit
1310
f32f4ce2
RK
1311config HAVE_ARM_TWD
1312 bool
1313 depends on SMP
15095bb0 1314 select TICK_ONESHOT
f32f4ce2
RK
1315 help
1316 This options enables support for the ARM timer and watchdog unit
1317
8d5796d2
LB
1318choice
1319 prompt "Memory split"
1320 default VMSPLIT_3G
1321 help
1322 Select the desired split between kernel and user memory.
1323
1324 If you are not absolutely sure what you are doing, leave this
1325 option alone!
1326
1327 config VMSPLIT_3G
1328 bool "3G/1G user/kernel split"
1329 config VMSPLIT_2G
1330 bool "2G/2G user/kernel split"
1331 config VMSPLIT_1G
1332 bool "1G/3G user/kernel split"
1333endchoice
1334
1335config PAGE_OFFSET
1336 hex
1337 default 0x40000000 if VMSPLIT_1G
1338 default 0x80000000 if VMSPLIT_2G
1339 default 0xC0000000
1340
1da177e4
LT
1341config NR_CPUS
1342 int "Maximum number of CPUs (2-32)"
1343 range 2 32
1344 depends on SMP
1345 default "4"
1346
a054a811
RK
1347config HOTPLUG_CPU
1348 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1349 depends on SMP && HOTPLUG && EXPERIMENTAL
176bfc44 1350 depends on !ARCH_MSM
a054a811
RK
1351 help
1352 Say Y here to experiment with turning CPUs off and on. CPUs
1353 can be controlled through /sys/devices/system/cpu.
1354
37ee16ae
RK
1355config LOCAL_TIMERS
1356 bool "Use local timer interrupts"
971acb9b 1357 depends on SMP
37ee16ae 1358 default y
89c3dedf 1359 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
37ee16ae
RK
1360 help
1361 Enable support for local timers on SMP platforms, rather then the
1362 legacy IPI broadcast method. Local timers allows the system
1363 accounting to be spread across the timer interval, preventing a
1364 "thundering herd" at every timer tick.
1365
d45a398f 1366source kernel/Kconfig.preempt
1da177e4 1367
f8065813
RK
1368config HZ
1369 int
49b7a491 1370 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
2192482e 1371 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
bfe65704 1372 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
5248c657 1373 default AT91_TIMER_HZ if ARCH_AT91
5da3e714 1374 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
f8065813
RK
1375 default 100
1376
16c79651 1377config THUMB2_KERNEL
4a50bfe3 1378 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
6e6fc998 1379 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
16c79651
CM
1380 select AEABI
1381 select ARM_ASM_UNIFIED
1382 help
1383 By enabling this option, the kernel will be compiled in
1384 Thumb-2 mode. A compiler/assembler that understand the unified
1385 ARM-Thumb syntax is needed.
1386
1387 If unsure, say N.
1388
0becb088
CM
1389config ARM_ASM_UNIFIED
1390 bool
1391
704bdda0
NP
1392config AEABI
1393 bool "Use the ARM EABI to compile the kernel"
1394 help
1395 This option allows for the kernel to be compiled using the latest
1396 ARM ABI (aka EABI). This is only useful if you are using a user
1397 space environment that is also compiled with EABI.
1398
1399 Since there are major incompatibilities between the legacy ABI and
1400 EABI, especially with regard to structure member alignment, this
1401 option also changes the kernel syscall calling convention to
1402 disambiguate both ABIs and allow for backward compatibility support
1403 (selected with CONFIG_OABI_COMPAT).
1404
1405 To use this you need GCC version 4.0.0 or later.
1406
6c90c872 1407config OABI_COMPAT
a73a3ff1 1408 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
9bc433a1 1409 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
6c90c872
NP
1410 default y
1411 help
1412 This option preserves the old syscall interface along with the
1413 new (ARM EABI) one. It also provides a compatibility layer to
1414 intercept syscalls that have structure arguments which layout
1415 in memory differs between the legacy ABI and the new ARM EABI
1416 (only for non "thumb" binaries). This option adds a tiny
1417 overhead to all syscalls and produces a slightly larger kernel.
1418 If you know you'll be using only pure EABI user space then you
1419 can say N here. If this option is not selected and you attempt
1420 to execute a legacy ABI binary then the result will be
1421 UNPREDICTABLE (in fact it can be predicted that it won't work
1422 at all). If in doubt say Y.
1423
eb33575c 1424config ARCH_HAS_HOLES_MEMORYMODEL
e80d6a24 1425 bool
e80d6a24 1426
05944d74
RK
1427config ARCH_SPARSEMEM_ENABLE
1428 bool
1429
07a2f737
RK
1430config ARCH_SPARSEMEM_DEFAULT
1431 def_bool ARCH_SPARSEMEM_ENABLE
1432
05944d74 1433config ARCH_SELECT_MEMORY_MODEL
be370302 1434 def_bool ARCH_SPARSEMEM_ENABLE
c80d79d7 1435
053a96ca
NP
1436config HIGHMEM
1437 bool "High Memory Support (EXPERIMENTAL)"
1438 depends on MMU && EXPERIMENTAL
1439 help
1440 The address space of ARM processors is only 4 Gigabytes large
1441 and it has to accommodate user address space, kernel address
1442 space as well as some memory mapped IO. That means that, if you
1443 have a large amount of physical memory and/or IO, not all of the
1444 memory can be "permanently mapped" by the kernel. The physical
1445 memory that is not permanently mapped is called "high memory".
1446
1447 Depending on the selected kernel/user memory split, minimum
1448 vmalloc space and actual amount of RAM, you may not need this
1449 option which should result in a slightly faster kernel.
1450
1451 If unsure, say n.
1452
65cec8e3
RK
1453config HIGHPTE
1454 bool "Allocate 2nd-level pagetables from highmem"
1455 depends on HIGHMEM
1456 depends on !OUTER_CACHE
1457
1b8873a0
JI
1458config HW_PERF_EVENTS
1459 bool "Enable hardware performance counter support for perf events"
fe166148 1460 depends on PERF_EVENTS && CPU_HAS_PMU
1b8873a0
JI
1461 default y
1462 help
1463 Enable hardware performance counter support for perf events. If
1464 disabled, perf events will use software events only.
1465
3f22ab27
DH
1466source "mm/Kconfig"
1467
c1b2d970
MD
1468config FORCE_MAX_ZONEORDER
1469 int "Maximum zone order" if ARCH_SHMOBILE
1470 range 11 64 if ARCH_SHMOBILE
1471 default "9" if SA1111
1472 default "11"
1473 help
1474 The kernel memory allocator divides physically contiguous memory
1475 blocks into "zones", where each zone is a power of two number of
1476 pages. This option selects the largest power of two that the kernel
1477 keeps in the memory allocator. If you need to allocate very large
1478 blocks of physically contiguous memory, then you may need to
1479 increase this value.
1480
1481 This config option is actually maximum order plus one. For example,
1482 a value of 11 means that the largest free memory block is 2^10 pages.
1483
1da177e4
LT
1484config LEDS
1485 bool "Timer and CPU usage LEDs"
e055d5bf 1486 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
8c8fdbc9 1487 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1da177e4
LT
1488 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1489 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
73a59c1c 1490 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
25329671 1491 ARCH_AT91 || ARCH_DAVINCI || \
ff3042fb 1492 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1da177e4
LT
1493 help
1494 If you say Y here, the LEDs on your machine will be used
1495 to provide useful information about your current system status.
1496
1497 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1498 be able to select which LEDs are active using the options below. If
1499 you are compiling a kernel for the EBSA-110 or the LART however, the
1500 red LED will simply flash regularly to indicate that the system is
1501 still functional. It is safe to say Y here if you have a CATS
1502 system, but the driver will do nothing.
1503
1504config LEDS_TIMER
1505 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
eebdf7d7
DB
1506 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1507 || MACH_OMAP_PERSEUS2
1da177e4 1508 depends on LEDS
0567a0c0 1509 depends on !GENERIC_CLOCKEVENTS
1da177e4
LT
1510 default y if ARCH_EBSA110
1511 help
1512 If you say Y here, one of the system LEDs (the green one on the
1513 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1514 will flash regularly to indicate that the system is still
1515 operational. This is mainly useful to kernel hackers who are
1516 debugging unstable kernels.
1517
1518 The LART uses the same LED for both Timer LED and CPU usage LED
1519 functions. You may choose to use both, but the Timer LED function
1520 will overrule the CPU usage LED.
1521
1522config LEDS_CPU
1523 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
eebdf7d7
DB
1524 !ARCH_OMAP) \
1525 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1526 || MACH_OMAP_PERSEUS2
1da177e4
LT
1527 depends on LEDS
1528 help
1529 If you say Y here, the red LED will be used to give a good real
1530 time indication of CPU usage, by lighting whenever the idle task
1531 is not currently executing.
1532
1533 The LART uses the same LED for both Timer LED and CPU usage LED
1534 functions. You may choose to use both, but the Timer LED function
1535 will overrule the CPU usage LED.
1536
1537config ALIGNMENT_TRAP
1538 bool
f12d0d7c 1539 depends on CPU_CP15_MMU
1da177e4 1540 default y if !ARCH_EBSA110
e119bfff 1541 select HAVE_PROC_CPU if PROC_FS
1da177e4 1542 help
84eb8d06 1543 ARM processors cannot fetch/store information which is not
1da177e4
LT
1544 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1545 address divisible by 4. On 32-bit ARM processors, these non-aligned
1546 fetch/store instructions will be emulated in software if you say
1547 here, which has a severe performance impact. This is necessary for
1548 correct operation of some network protocols. With an IP-only
1549 configuration it is safe to say N, otherwise say Y.
1550
39ec58f3
LB
1551config UACCESS_WITH_MEMCPY
1552 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1553 depends on MMU && EXPERIMENTAL
1554 default y if CPU_FEROCEON
1555 help
1556 Implement faster copy_to_user and clear_user methods for CPU
1557 cores where a 8-word STM instruction give significantly higher
1558 memory write throughput than a sequence of individual 32bit stores.
1559
1560 A possible side effect is a slight increase in scheduling latency
1561 between threads sharing the same address space if they invoke
1562 such copy operations with large buffers.
1563
1564 However, if the CPU data cache is using a write-allocate mode,
1565 this option is unlikely to provide any performance gain.
1566
70c70d97
NP
1567config SECCOMP
1568 bool
1569 prompt "Enable seccomp to safely compute untrusted bytecode"
1570 ---help---
1571 This kernel feature is useful for number crunching applications
1572 that may need to compute untrusted bytecode during their
1573 execution. By using pipes or other transports made available to
1574 the process as file descriptors supporting the read/write
1575 syscalls, it's possible to isolate those applications in
1576 their own address space using seccomp. Once seccomp is
1577 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1578 and the task is only allowed to execute a few safe syscalls
1579 defined by each seccomp mode.
1580
c743f380
NP
1581config CC_STACKPROTECTOR
1582 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
4a50bfe3 1583 depends on EXPERIMENTAL
c743f380
NP
1584 help
1585 This option turns on the -fstack-protector GCC feature. This
1586 feature puts, at the beginning of functions, a canary value on
1587 the stack just before the return address, and validates
1588 the value just before actually returning. Stack based buffer
1589 overflows (that need to overwrite this return address) now also
1590 overwrite the canary, which gets detected and the attack is then
1591 neutralized via a kernel panic.
1592 This feature requires gcc version 4.2 or above.
1593
73a65b3f
UKK
1594config DEPRECATED_PARAM_STRUCT
1595 bool "Provide old way to pass kernel parameters"
1596 help
1597 This was deprecated in 2001 and announced to live on for 5 years.
1598 Some old boot loaders still use this way.
1599
1da177e4
LT
1600endmenu
1601
1602menu "Boot options"
1603
1604# Compressed boot loader in ROM. Yes, we really want to ask about
1605# TEXT and BSS so we preserve their values in the config files.
1606config ZBOOT_ROM_TEXT
1607 hex "Compressed ROM boot loader base address"
1608 default "0"
1609 help
1610 The physical address at which the ROM-able zImage is to be
1611 placed in the target. Platforms which normally make use of
1612 ROM-able zImage formats normally set this to a suitable
1613 value in their defconfig file.
1614
1615 If ZBOOT_ROM is not enabled, this has no effect.
1616
1617config ZBOOT_ROM_BSS
1618 hex "Compressed ROM boot loader BSS address"
1619 default "0"
1620 help
f8c440b2
DF
1621 The base address of an area of read/write memory in the target
1622 for the ROM-able zImage which must be available while the
1623 decompressor is running. It must be large enough to hold the
1624 entire decompressed kernel plus an additional 128 KiB.
1625 Platforms which normally make use of ROM-able zImage formats
1626 normally set this to a suitable value in their defconfig file.
1da177e4
LT
1627
1628 If ZBOOT_ROM is not enabled, this has no effect.
1629
1630config ZBOOT_ROM
1631 bool "Compressed boot loader in ROM/flash"
1632 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1633 help
1634 Say Y here if you intend to execute your compressed kernel image
1635 (zImage) directly from ROM or flash. If unsure, say N.
1636
1637config CMDLINE
1638 string "Default kernel command string"
1639 default ""
1640 help
1641 On some architectures (EBSA110 and CATS), there is currently no way
1642 for the boot loader to pass arguments to the kernel. For these
1643 architectures, you should supply some command-line options at build
1644 time by entering them here. As a minimum, you should specify the
1645 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1646
92d2040d
AH
1647config CMDLINE_FORCE
1648 bool "Always use the default kernel command string"
1649 depends on CMDLINE != ""
1650 help
1651 Always use the default kernel command string, even if the boot
1652 loader passes other arguments to the kernel.
1653 This is useful if you cannot or don't want to change the
1654 command-line options your boot loader passes to the kernel.
1655
1656 If unsure, say N.
1657
1da177e4
LT
1658config XIP_KERNEL
1659 bool "Kernel Execute-In-Place from ROM"
1660 depends on !ZBOOT_ROM
1661 help
1662 Execute-In-Place allows the kernel to run from non-volatile storage
1663 directly addressable by the CPU, such as NOR flash. This saves RAM
1664 space since the text section of the kernel is not loaded from flash
1665 to RAM. Read-write sections, such as the data section and stack,
1666 are still copied to RAM. The XIP kernel is not compressed since
1667 it has to run directly from flash, so it will take more space to
1668 store it. The flash address used to link the kernel object files,
1669 and for storing it, is configuration dependent. Therefore, if you
1670 say Y here, you must know the proper physical address where to
1671 store the kernel image depending on your own flash memory usage.
1672
1673 Also note that the make target becomes "make xipImage" rather than
1674 "make zImage" or "make Image". The final kernel binary to put in
1675 ROM memory will be arch/arm/boot/xipImage.
1676
1677 If unsure, say N.
1678
1679config XIP_PHYS_ADDR
1680 hex "XIP Kernel Physical Location"
1681 depends on XIP_KERNEL
1682 default "0x00080000"
1683 help
1684 This is the physical address in your flash memory the kernel will
1685 be linked for and stored to. This address is dependent on your
1686 own flash usage.
1687
c587e4a6
RP
1688config KEXEC
1689 bool "Kexec system call (EXPERIMENTAL)"
1690 depends on EXPERIMENTAL
1691 help
1692 kexec is a system call that implements the ability to shutdown your
1693 current kernel, and to start another kernel. It is like a reboot
01dd2fbf 1694 but it is independent of the system firmware. And like a reboot
c587e4a6
RP
1695 you can start any kernel with it, not just Linux.
1696
1697 It is an ongoing process to be certain the hardware in a machine
1698 is properly shutdown, so do not be surprised if this code does not
1699 initially work for you. It may help to enable device hotplugging
1700 support.
1701
4cd9d6f7
RP
1702config ATAGS_PROC
1703 bool "Export atags in procfs"
b98d7291
UL
1704 depends on KEXEC
1705 default y
4cd9d6f7
RP
1706 help
1707 Should the atags used to boot the kernel be exported in an "atags"
1708 file in procfs. Useful with kexec.
1709
cb5d39b3
MW
1710config CRASH_DUMP
1711 bool "Build kdump crash kernel (EXPERIMENTAL)"
1712 depends on EXPERIMENTAL
1713 help
1714 Generate crash dump after being started by kexec. This should
1715 be normally only set in special crash dump kernels which are
1716 loaded in the main kernel with kexec-tools into a specially
1717 reserved region and then later executed after a crash by
1718 kdump/kexec. The crash dump kernel must be compiled to a
1719 memory address not used by the main kernel
1720
1721 For more details see Documentation/kdump/kdump.txt
1722
e69edc79
EM
1723config AUTO_ZRELADDR
1724 bool "Auto calculation of the decompressed kernel image address"
1725 depends on !ZBOOT_ROM && !ARCH_U300
1726 help
1727 ZRELADDR is the physical address where the decompressed kernel
1728 image will be placed. If AUTO_ZRELADDR is selected, the address
1729 will be determined at run-time by masking the current IP with
1730 0xf8000000. This assumes the zImage being placed in the first 128MB
1731 from start of memory.
1732
1da177e4
LT
1733endmenu
1734
ac9d7efc 1735menu "CPU Power Management"
1da177e4 1736
89c52ed4 1737if ARCH_HAS_CPUFREQ
1da177e4
LT
1738
1739source "drivers/cpufreq/Kconfig"
1740
64f102b6
YS
1741config CPU_FREQ_IMX
1742 tristate "CPUfreq driver for i.MX CPUs"
1743 depends on ARCH_MXC && CPU_FREQ
1744 help
1745 This enables the CPUfreq driver for i.MX CPUs.
1746
1da177e4
LT
1747config CPU_FREQ_SA1100
1748 bool
1da177e4
LT
1749
1750config CPU_FREQ_SA1110
1751 bool
1da177e4
LT
1752
1753config CPU_FREQ_INTEGRATOR
1754 tristate "CPUfreq driver for ARM Integrator CPUs"
1755 depends on ARCH_INTEGRATOR && CPU_FREQ
1756 default y
1757 help
1758 This enables the CPUfreq driver for ARM Integrator CPUs.
1759
1760 For details, take a look at <file:Documentation/cpu-freq>.
1761
1762 If in doubt, say Y.
1763
9e2697ff
RK
1764config CPU_FREQ_PXA
1765 bool
1766 depends on CPU_FREQ && ARCH_PXA && PXA25x
1767 default y
1768 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1769
b3748ddd
MB
1770config CPU_FREQ_S3C64XX
1771 bool "CPUfreq support for Samsung S3C64XX CPUs"
1772 depends on CPU_FREQ && CPU_S3C6410
1773
9d56c02a
BD
1774config CPU_FREQ_S3C
1775 bool
1776 help
1777 Internal configuration node for common cpufreq on Samsung SoC
1778
1779config CPU_FREQ_S3C24XX
4a50bfe3 1780 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
9d56c02a
BD
1781 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1782 select CPU_FREQ_S3C
1783 help
1784 This enables the CPUfreq driver for the Samsung S3C24XX family
1785 of CPUs.
1786
1787 For details, take a look at <file:Documentation/cpu-freq>.
1788
1789 If in doubt, say N.
1790
1791config CPU_FREQ_S3C24XX_PLL
4a50bfe3 1792 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
9d56c02a
BD
1793 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1794 help
1795 Compile in support for changing the PLL frequency from the
1796 S3C24XX series CPUfreq driver. The PLL takes time to settle
1797 after a frequency change, so by default it is not enabled.
1798
1799 This also means that the PLL tables for the selected CPU(s) will
1800 be built which may increase the size of the kernel image.
1801
1802config CPU_FREQ_S3C24XX_DEBUG
1803 bool "Debug CPUfreq Samsung driver core"
1804 depends on CPU_FREQ_S3C24XX
1805 help
1806 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1807
1808config CPU_FREQ_S3C24XX_IODEBUG
1809 bool "Debug CPUfreq Samsung driver IO timing"
1810 depends on CPU_FREQ_S3C24XX
1811 help
1812 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1813
e6d197a6
BD
1814config CPU_FREQ_S3C24XX_DEBUGFS
1815 bool "Export debugfs for CPUFreq"
1816 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1817 help
1818 Export status information via debugfs.
1819
1da177e4
LT
1820endif
1821
ac9d7efc
RK
1822source "drivers/cpuidle/Kconfig"
1823
1824endmenu
1825
1da177e4
LT
1826menu "Floating point emulation"
1827
1828comment "At least one emulation must be selected"
1829
1830config FPE_NWFPE
1831 bool "NWFPE math emulation"
593c252a 1832 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1da177e4
LT
1833 ---help---
1834 Say Y to include the NWFPE floating point emulator in the kernel.
1835 This is necessary to run most binaries. Linux does not currently
1836 support floating point hardware so you need to say Y here even if
1837 your machine has an FPA or floating point co-processor podule.
1838
1839 You may say N here if you are going to load the Acorn FPEmulator
1840 early in the bootup.
1841
1842config FPE_NWFPE_XP
1843 bool "Support extended precision"
bedf142b 1844 depends on FPE_NWFPE
1da177e4
LT
1845 help
1846 Say Y to include 80-bit support in the kernel floating-point
1847 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1848 Note that gcc does not generate 80-bit operations by default,
1849 so in most cases this option only enlarges the size of the
1850 floating point emulator without any good reason.
1851
1852 You almost surely want to say N here.
1853
1854config FPE_FASTFPE
1855 bool "FastFPE math emulation (EXPERIMENTAL)"
8993a44c 1856 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1da177e4
LT
1857 ---help---
1858 Say Y here to include the FAST floating point emulator in the kernel.
1859 This is an experimental much faster emulator which now also has full
1860 precision for the mantissa. It does not support any exceptions.
1861 It is very simple, and approximately 3-6 times faster than NWFPE.
1862
1863 It should be sufficient for most programs. It may be not suitable
1864 for scientific calculations, but you have to check this for yourself.
1865 If you do not feel you need a faster FP emulation you should better
1866 choose NWFPE.
1867
1868config VFP
1869 bool "VFP-format floating point maths"
c00d4ffd 1870 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1da177e4
LT
1871 help
1872 Say Y to include VFP support code in the kernel. This is needed
1873 if your hardware includes a VFP unit.
1874
1875 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1876 release notes and additional status information.
1877
1878 Say N if your target does not have VFP hardware.
1879
25ebee02
CM
1880config VFPv3
1881 bool
1882 depends on VFP
1883 default y if CPU_V7
1884
b5872db4
CM
1885config NEON
1886 bool "Advanced SIMD (NEON) Extension support"
1887 depends on VFPv3 && CPU_V7
1888 help
1889 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1890 Extension.
1891
1da177e4
LT
1892endmenu
1893
1894menu "Userspace binary formats"
1895
1896source "fs/Kconfig.binfmt"
1897
1898config ARTHUR
1899 tristate "RISC OS personality"
704bdda0 1900 depends on !AEABI
1da177e4
LT
1901 help
1902 Say Y here to include the kernel code necessary if you want to run
1903 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1904 experimental; if this sounds frightening, say N and sleep in peace.
1905 You can also say M here to compile this support as a module (which
1906 will be called arthur).
1907
1908endmenu
1909
1910menu "Power management options"
1911
eceab4ac 1912source "kernel/power/Kconfig"
1da177e4 1913
f4cb5700
JB
1914config ARCH_SUSPEND_POSSIBLE
1915 def_bool y
1916
1da177e4
LT
1917endmenu
1918
d5950b43
SR
1919source "net/Kconfig"
1920
ac25150f 1921source "drivers/Kconfig"
1da177e4
LT
1922
1923source "fs/Kconfig"
1924
1da177e4
LT
1925source "arch/arm/Kconfig.debug"
1926
1927source "security/Kconfig"
1928
1929source "crypto/Kconfig"
1930
1931source "lib/Kconfig"